1// SPDX-License-Identifier: GPL-2.0-or-later 2/** 3 * 4 * GSPCA sub driver for W996[78]CF JPEG USB Dual Mode Camera Chip. 5 * 6 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com> 7 * 8 * This module is adapted from the in kernel v4l1 w9968cf driver: 9 * 10 * Copyright (C) 2002-2004 by Luca Risolia <luca.risolia@studio.unibo.it> 11 */ 12 13/* Note this is not a stand alone driver, it gets included in ov519.c, this 14 is a bit of a hack, but it needs the driver code for a lot of different 15 ov sensors which is already present in ov519.c (the old v4l1 driver used 16 the ovchipcam framework). When we have the time we really should move 17 the sensor drivers to v4l2 sub drivers, and properly split of this 18 driver from ov519.c */ 19 20#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 21 22#define W9968CF_I2C_BUS_DELAY 4 /* delay in us for I2C bit r/w operations */ 23 24#define Y_QUANTABLE (&sd->jpeg_hdr[JPEG_QT0_OFFSET]) 25#define UV_QUANTABLE (&sd->jpeg_hdr[JPEG_QT1_OFFSET]) 26 27static const struct v4l2_pix_format w9968cf_vga_mode[] = { 28 {160, 120, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE, 29 .bytesperline = 160 * 2, 30 .sizeimage = 160 * 120 * 2, 31 .colorspace = V4L2_COLORSPACE_JPEG}, 32 {176, 144, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE, 33 .bytesperline = 176 * 2, 34 .sizeimage = 176 * 144 * 2, 35 .colorspace = V4L2_COLORSPACE_JPEG}, 36 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 37 .bytesperline = 320 * 2, 38 .sizeimage = 320 * 240 * 2, 39 .colorspace = V4L2_COLORSPACE_JPEG}, 40 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 41 .bytesperline = 352 * 2, 42 .sizeimage = 352 * 288 * 2, 43 .colorspace = V4L2_COLORSPACE_JPEG}, 44 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE, 45 .bytesperline = 640 * 2, 46 .sizeimage = 640 * 480 * 2, 47 .colorspace = V4L2_COLORSPACE_JPEG}, 48}; 49 50static void reg_w(struct sd *sd, u16 index, u16 value); 51 52/*-------------------------------------------------------------------------- 53 Write 64-bit data to the fast serial bus registers. 54 Return 0 on success, -1 otherwise. 55 --------------------------------------------------------------------------*/ 56static void w9968cf_write_fsb(struct sd *sd, u16* data) 57{ 58 struct usb_device *udev = sd->gspca_dev.dev; 59 u16 value; 60 int ret; 61 62 if (sd->gspca_dev.usb_err < 0) 63 return; 64 65 value = *data++; 66 memcpy(sd->gspca_dev.usb_buf, data, 6); 67 68 /* Avoid things going to fast for the bridge with a xhci host */ 69 udelay(150); 70 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0, 71 USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE, 72 value, 0x06, sd->gspca_dev.usb_buf, 6, 500); 73 if (ret < 0) { 74 pr_err("Write FSB registers failed (%d)\n", ret); 75 sd->gspca_dev.usb_err = ret; 76 } 77} 78 79/*-------------------------------------------------------------------------- 80 Write data to the serial bus control register. 81 Return 0 on success, a negative number otherwise. 82 --------------------------------------------------------------------------*/ 83static void w9968cf_write_sb(struct sd *sd, u16 value) 84{ 85 int ret; 86 87 if (sd->gspca_dev.usb_err < 0) 88 return; 89 90 /* Avoid things going to fast for the bridge with a xhci host */ 91 udelay(150); 92 93 /* We don't use reg_w here, as that would cause all writes when 94 bitbanging i2c to be logged, making the logs impossible to read */ 95 ret = usb_control_msg(sd->gspca_dev.dev, 96 usb_sndctrlpipe(sd->gspca_dev.dev, 0), 97 0, 98 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 99 value, 0x01, NULL, 0, 500); 100 101 udelay(W9968CF_I2C_BUS_DELAY); 102 103 if (ret < 0) { 104 pr_err("Write SB reg [01] %04x failed\n", value); 105 sd->gspca_dev.usb_err = ret; 106 } 107} 108 109/*-------------------------------------------------------------------------- 110 Read data from the serial bus control register. 111 Return 0 on success, a negative number otherwise. 112 --------------------------------------------------------------------------*/ 113static int w9968cf_read_sb(struct sd *sd) 114{ 115 int ret; 116 117 if (sd->gspca_dev.usb_err < 0) 118 return -1; 119 120 /* Avoid things going to fast for the bridge with a xhci host */ 121 udelay(150); 122 123 /* We don't use reg_r here, as the w9968cf is special and has 16 124 bit registers instead of 8 bit */ 125 ret = usb_control_msg(sd->gspca_dev.dev, 126 usb_rcvctrlpipe(sd->gspca_dev.dev, 0), 127 1, 128 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 129 0, 0x01, sd->gspca_dev.usb_buf, 2, 500); 130 if (ret >= 0) { 131 ret = sd->gspca_dev.usb_buf[0] | 132 (sd->gspca_dev.usb_buf[1] << 8); 133 } else { 134 pr_err("Read SB reg [01] failed\n"); 135 sd->gspca_dev.usb_err = ret; 136 /* 137 * Make sure the buffer is zeroed to avoid uninitialized 138 * values. 139 */ 140 memset(sd->gspca_dev.usb_buf, 0, 2); 141 } 142 143 udelay(W9968CF_I2C_BUS_DELAY); 144 145 return ret; 146} 147 148/*-------------------------------------------------------------------------- 149 Upload quantization tables for the JPEG compression. 150 This function is called by w9968cf_start_transfer(). 151 Return 0 on success, a negative number otherwise. 152 --------------------------------------------------------------------------*/ 153static void w9968cf_upload_quantizationtables(struct sd *sd) 154{ 155 u16 a, b; 156 int i, j; 157 158 reg_w(sd, 0x39, 0x0010); /* JPEG clock enable */ 159 160 for (i = 0, j = 0; i < 32; i++, j += 2) { 161 a = Y_QUANTABLE[j] | ((unsigned)(Y_QUANTABLE[j + 1]) << 8); 162 b = UV_QUANTABLE[j] | ((unsigned)(UV_QUANTABLE[j + 1]) << 8); 163 reg_w(sd, 0x40 + i, a); 164 reg_w(sd, 0x60 + i, b); 165 } 166 reg_w(sd, 0x39, 0x0012); /* JPEG encoder enable */ 167} 168 169/**************************************************************************** 170 * Low-level I2C I/O functions. * 171 * The adapter supports the following I2C transfer functions: * 172 * i2c_adap_fastwrite_byte_data() (at 400 kHz bit frequency only) * 173 * i2c_adap_read_byte_data() * 174 * i2c_adap_read_byte() * 175 ****************************************************************************/ 176 177static void w9968cf_smbus_start(struct sd *sd) 178{ 179 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */ 180 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */ 181} 182 183static void w9968cf_smbus_stop(struct sd *sd) 184{ 185 w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */ 186 w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */ 187 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */ 188} 189 190static void w9968cf_smbus_write_byte(struct sd *sd, u8 v) 191{ 192 u8 bit; 193 int sda; 194 195 for (bit = 0 ; bit < 8 ; bit++) { 196 sda = (v & 0x80) ? 2 : 0; 197 v <<= 1; 198 /* SDE=1, SDA=sda, SCL=0 */ 199 w9968cf_write_sb(sd, 0x10 | sda); 200 /* SDE=1, SDA=sda, SCL=1 */ 201 w9968cf_write_sb(sd, 0x11 | sda); 202 /* SDE=1, SDA=sda, SCL=0 */ 203 w9968cf_write_sb(sd, 0x10 | sda); 204 } 205} 206 207static void w9968cf_smbus_read_byte(struct sd *sd, u8 *v) 208{ 209 u8 bit; 210 211 /* No need to ensure SDA is high as we are always called after 212 read_ack which ends with SDA high */ 213 *v = 0; 214 for (bit = 0 ; bit < 8 ; bit++) { 215 *v <<= 1; 216 /* SDE=1, SDA=1, SCL=1 */ 217 w9968cf_write_sb(sd, 0x0013); 218 *v |= (w9968cf_read_sb(sd) & 0x0008) ? 1 : 0; 219 /* SDE=1, SDA=1, SCL=0 */ 220 w9968cf_write_sb(sd, 0x0012); 221 } 222} 223 224static void w9968cf_smbus_write_nack(struct sd *sd) 225{ 226 /* No need to ensure SDA is high as we are always called after 227 read_byte which ends with SDA high */ 228 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */ 229 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */ 230} 231 232static void w9968cf_smbus_read_ack(struct sd *sd) 233{ 234 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 235 int sda; 236 237 /* Ensure SDA is high before raising clock to avoid a spurious stop */ 238 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */ 239 w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */ 240 sda = w9968cf_read_sb(sd); 241 w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */ 242 if (sda >= 0 && (sda & 0x08)) { 243 gspca_dbg(gspca_dev, D_USBI, "Did not receive i2c ACK\n"); 244 sd->gspca_dev.usb_err = -EIO; 245 } 246} 247 248/* SMBus protocol: S Addr Wr [A] Subaddr [A] Value [A] P */ 249static void w9968cf_i2c_w(struct sd *sd, u8 reg, u8 value) 250{ 251 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 252 u16* data = (u16 *)sd->gspca_dev.usb_buf; 253 254 data[0] = 0x082f | ((sd->sensor_addr & 0x80) ? 0x1500 : 0x0); 255 data[0] |= (sd->sensor_addr & 0x40) ? 0x4000 : 0x0; 256 data[1] = 0x2082 | ((sd->sensor_addr & 0x40) ? 0x0005 : 0x0); 257 data[1] |= (sd->sensor_addr & 0x20) ? 0x0150 : 0x0; 258 data[1] |= (sd->sensor_addr & 0x10) ? 0x5400 : 0x0; 259 data[2] = 0x8208 | ((sd->sensor_addr & 0x08) ? 0x0015 : 0x0); 260 data[2] |= (sd->sensor_addr & 0x04) ? 0x0540 : 0x0; 261 data[2] |= (sd->sensor_addr & 0x02) ? 0x5000 : 0x0; 262 data[3] = 0x1d20 | ((sd->sensor_addr & 0x02) ? 0x0001 : 0x0); 263 data[3] |= (sd->sensor_addr & 0x01) ? 0x0054 : 0x0; 264 265 w9968cf_write_fsb(sd, data); 266 267 data[0] = 0x8208 | ((reg & 0x80) ? 0x0015 : 0x0); 268 data[0] |= (reg & 0x40) ? 0x0540 : 0x0; 269 data[0] |= (reg & 0x20) ? 0x5000 : 0x0; 270 data[1] = 0x0820 | ((reg & 0x20) ? 0x0001 : 0x0); 271 data[1] |= (reg & 0x10) ? 0x0054 : 0x0; 272 data[1] |= (reg & 0x08) ? 0x1500 : 0x0; 273 data[1] |= (reg & 0x04) ? 0x4000 : 0x0; 274 data[2] = 0x2082 | ((reg & 0x04) ? 0x0005 : 0x0); 275 data[2] |= (reg & 0x02) ? 0x0150 : 0x0; 276 data[2] |= (reg & 0x01) ? 0x5400 : 0x0; 277 data[3] = 0x001d; 278 279 w9968cf_write_fsb(sd, data); 280 281 data[0] = 0x8208 | ((value & 0x80) ? 0x0015 : 0x0); 282 data[0] |= (value & 0x40) ? 0x0540 : 0x0; 283 data[0] |= (value & 0x20) ? 0x5000 : 0x0; 284 data[1] = 0x0820 | ((value & 0x20) ? 0x0001 : 0x0); 285 data[1] |= (value & 0x10) ? 0x0054 : 0x0; 286 data[1] |= (value & 0x08) ? 0x1500 : 0x0; 287 data[1] |= (value & 0x04) ? 0x4000 : 0x0; 288 data[2] = 0x2082 | ((value & 0x04) ? 0x0005 : 0x0); 289 data[2] |= (value & 0x02) ? 0x0150 : 0x0; 290 data[2] |= (value & 0x01) ? 0x5400 : 0x0; 291 data[3] = 0xfe1d; 292 293 w9968cf_write_fsb(sd, data); 294 295 gspca_dbg(gspca_dev, D_USBO, "i2c 0x%02x -> [0x%02x]\n", value, reg); 296} 297 298/* SMBus protocol: S Addr Wr [A] Subaddr [A] P S Addr+1 Rd [A] [Value] NA P */ 299static int w9968cf_i2c_r(struct sd *sd, u8 reg) 300{ 301 struct gspca_dev *gspca_dev = (struct gspca_dev *)sd; 302 int ret = 0; 303 u8 value; 304 305 /* Fast serial bus data control disable */ 306 w9968cf_write_sb(sd, 0x0013); /* don't change ! */ 307 308 w9968cf_smbus_start(sd); 309 w9968cf_smbus_write_byte(sd, sd->sensor_addr); 310 w9968cf_smbus_read_ack(sd); 311 w9968cf_smbus_write_byte(sd, reg); 312 w9968cf_smbus_read_ack(sd); 313 w9968cf_smbus_stop(sd); 314 w9968cf_smbus_start(sd); 315 w9968cf_smbus_write_byte(sd, sd->sensor_addr + 1); 316 w9968cf_smbus_read_ack(sd); 317 w9968cf_smbus_read_byte(sd, &value); 318 /* signal we don't want to read anymore, the v4l1 driver used to 319 send an ack here which is very wrong! (and then fixed 320 the issues this gave by retrying reads) */ 321 w9968cf_smbus_write_nack(sd); 322 w9968cf_smbus_stop(sd); 323 324 /* Fast serial bus data control re-enable */ 325 w9968cf_write_sb(sd, 0x0030); 326 327 if (sd->gspca_dev.usb_err >= 0) { 328 ret = value; 329 gspca_dbg(gspca_dev, D_USBI, "i2c [0x%02X] -> 0x%02X\n", 330 reg, value); 331 } else 332 gspca_err(gspca_dev, "i2c read [0x%02x] failed\n", reg); 333 334 return ret; 335} 336 337/*-------------------------------------------------------------------------- 338 Turn on the LED on some webcams. A beep should be heard too. 339 Return 0 on success, a negative number otherwise. 340 --------------------------------------------------------------------------*/ 341static void w9968cf_configure(struct sd *sd) 342{ 343 reg_w(sd, 0x00, 0xff00); /* power-down */ 344 reg_w(sd, 0x00, 0xbf17); /* reset everything */ 345 reg_w(sd, 0x00, 0xbf10); /* normal operation */ 346 reg_w(sd, 0x01, 0x0010); /* serial bus, SDS high */ 347 reg_w(sd, 0x01, 0x0000); /* serial bus, SDS low */ 348 reg_w(sd, 0x01, 0x0010); /* ..high 'beep-beep' */ 349 reg_w(sd, 0x01, 0x0030); /* Set sda scl to FSB mode */ 350 351 sd->stopped = 1; 352} 353 354static void w9968cf_init(struct sd *sd) 355{ 356 unsigned long hw_bufsize = sd->sif ? (352 * 288 * 2) : (640 * 480 * 2), 357 y0 = 0x0000, 358 u0 = y0 + hw_bufsize / 2, 359 v0 = u0 + hw_bufsize / 4, 360 y1 = v0 + hw_bufsize / 4, 361 u1 = y1 + hw_bufsize / 2, 362 v1 = u1 + hw_bufsize / 4; 363 364 reg_w(sd, 0x00, 0xff00); /* power off */ 365 reg_w(sd, 0x00, 0xbf10); /* power on */ 366 367 reg_w(sd, 0x03, 0x405d); /* DRAM timings */ 368 reg_w(sd, 0x04, 0x0030); /* SDRAM timings */ 369 370 reg_w(sd, 0x20, y0 & 0xffff); /* Y buf.0, low */ 371 reg_w(sd, 0x21, y0 >> 16); /* Y buf.0, high */ 372 reg_w(sd, 0x24, u0 & 0xffff); /* U buf.0, low */ 373 reg_w(sd, 0x25, u0 >> 16); /* U buf.0, high */ 374 reg_w(sd, 0x28, v0 & 0xffff); /* V buf.0, low */ 375 reg_w(sd, 0x29, v0 >> 16); /* V buf.0, high */ 376 377 reg_w(sd, 0x22, y1 & 0xffff); /* Y buf.1, low */ 378 reg_w(sd, 0x23, y1 >> 16); /* Y buf.1, high */ 379 reg_w(sd, 0x26, u1 & 0xffff); /* U buf.1, low */ 380 reg_w(sd, 0x27, u1 >> 16); /* U buf.1, high */ 381 reg_w(sd, 0x2a, v1 & 0xffff); /* V buf.1, low */ 382 reg_w(sd, 0x2b, v1 >> 16); /* V buf.1, high */ 383 384 reg_w(sd, 0x32, y1 & 0xffff); /* JPEG buf 0 low */ 385 reg_w(sd, 0x33, y1 >> 16); /* JPEG buf 0 high */ 386 387 reg_w(sd, 0x34, y1 & 0xffff); /* JPEG buf 1 low */ 388 reg_w(sd, 0x35, y1 >> 16); /* JPEG bug 1 high */ 389 390 reg_w(sd, 0x36, 0x0000);/* JPEG restart interval */ 391 reg_w(sd, 0x37, 0x0804);/*JPEG VLE FIFO threshold*/ 392 reg_w(sd, 0x38, 0x0000);/* disable hw up-scaling */ 393 reg_w(sd, 0x3f, 0x0000); /* JPEG/MCTL test data */ 394} 395 396static void w9968cf_set_crop_window(struct sd *sd) 397{ 398 int start_cropx, start_cropy, x, y, fw, fh, cw, ch, 399 max_width, max_height; 400 401 if (sd->sif) { 402 max_width = 352; 403 max_height = 288; 404 } else { 405 max_width = 640; 406 max_height = 480; 407 } 408 409 if (sd->sensor == SEN_OV7620) { 410 /* 411 * Sigh, this is dependend on the clock / framerate changes 412 * made by the frequency control, sick. 413 * 414 * Note we cannot use v4l2_ctrl_g_ctrl here, as we get called 415 * from ov519.c:setfreq() with the ctrl lock held! 416 */ 417 if (sd->freq->val == 1) { 418 start_cropx = 277; 419 start_cropy = 37; 420 } else { 421 start_cropx = 105; 422 start_cropy = 37; 423 } 424 } else { 425 start_cropx = 320; 426 start_cropy = 35; 427 } 428 429 /* Work around to avoid FP arithmetic */ 430 #define SC(x) ((x) << 10) 431 432 /* Scaling factors */ 433 fw = SC(sd->gspca_dev.pixfmt.width) / max_width; 434 fh = SC(sd->gspca_dev.pixfmt.height) / max_height; 435 436 cw = (fw >= fh) ? max_width : SC(sd->gspca_dev.pixfmt.width) / fh; 437 ch = (fw >= fh) ? SC(sd->gspca_dev.pixfmt.height) / fw : max_height; 438 439 sd->sensor_width = max_width; 440 sd->sensor_height = max_height; 441 442 x = (max_width - cw) / 2; 443 y = (max_height - ch) / 2; 444 445 reg_w(sd, 0x10, start_cropx + x); 446 reg_w(sd, 0x11, start_cropy + y); 447 reg_w(sd, 0x12, start_cropx + x + cw); 448 reg_w(sd, 0x13, start_cropy + y + ch); 449} 450 451static void w9968cf_mode_init_regs(struct sd *sd) 452{ 453 int val, vs_polarity, hs_polarity; 454 455 w9968cf_set_crop_window(sd); 456 457 reg_w(sd, 0x14, sd->gspca_dev.pixfmt.width); 458 reg_w(sd, 0x15, sd->gspca_dev.pixfmt.height); 459 460 /* JPEG width & height */ 461 reg_w(sd, 0x30, sd->gspca_dev.pixfmt.width); 462 reg_w(sd, 0x31, sd->gspca_dev.pixfmt.height); 463 464 /* Y & UV frame buffer strides (in WORD) */ 465 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat == 466 V4L2_PIX_FMT_JPEG) { 467 reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width / 2); 468 reg_w(sd, 0x2d, sd->gspca_dev.pixfmt.width / 4); 469 } else 470 reg_w(sd, 0x2c, sd->gspca_dev.pixfmt.width); 471 472 reg_w(sd, 0x00, 0xbf17); /* reset everything */ 473 reg_w(sd, 0x00, 0xbf10); /* normal operation */ 474 475 /* Transfer size in WORDS (for UYVY format only) */ 476 val = sd->gspca_dev.pixfmt.width * sd->gspca_dev.pixfmt.height; 477 reg_w(sd, 0x3d, val & 0xffff); /* low bits */ 478 reg_w(sd, 0x3e, val >> 16); /* high bits */ 479 480 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat == 481 V4L2_PIX_FMT_JPEG) { 482 /* We may get called multiple times (usb isoc bw negotiat.) */ 483 jpeg_define(sd->jpeg_hdr, sd->gspca_dev.pixfmt.height, 484 sd->gspca_dev.pixfmt.width, 0x22); /* JPEG 420 */ 485 jpeg_set_qual(sd->jpeg_hdr, v4l2_ctrl_g_ctrl(sd->jpegqual)); 486 w9968cf_upload_quantizationtables(sd); 487 v4l2_ctrl_grab(sd->jpegqual, true); 488 } 489 490 /* Video Capture Control Register */ 491 if (sd->sensor == SEN_OV7620) { 492 /* Seems to work around a bug in the image sensor */ 493 vs_polarity = 1; 494 hs_polarity = 1; 495 } else { 496 vs_polarity = 1; 497 hs_polarity = 0; 498 } 499 500 val = (vs_polarity << 12) | (hs_polarity << 11); 501 502 /* NOTE: We may not have enough memory to do double buffering while 503 doing compression (amount of memory differs per model cam). 504 So we use the second image buffer also as jpeg stream buffer 505 (see w9968cf_init), and disable double buffering. */ 506 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat == 507 V4L2_PIX_FMT_JPEG) { 508 /* val |= 0x0002; YUV422P */ 509 val |= 0x0003; /* YUV420P */ 510 } else 511 val |= 0x0080; /* Enable HW double buffering */ 512 513 /* val |= 0x0020; enable clamping */ 514 /* val |= 0x0008; enable (1-2-1) filter */ 515 /* val |= 0x000c; enable (2-3-6-3-2) filter */ 516 517 val |= 0x8000; /* capt. enable */ 518 519 reg_w(sd, 0x16, val); 520 521 sd->gspca_dev.empty_packet = 0; 522} 523 524static void w9968cf_stop0(struct sd *sd) 525{ 526 v4l2_ctrl_grab(sd->jpegqual, false); 527 reg_w(sd, 0x39, 0x0000); /* disable JPEG encoder */ 528 reg_w(sd, 0x16, 0x0000); /* stop video capture */ 529} 530 531/* The w9968cf docs say that a 0 sized packet means EOF (and also SOF 532 for the next frame). This seems to simply not be true when operating 533 in JPEG mode, in this case there may be empty packets within the 534 frame. So in JPEG mode use the JPEG SOI marker to detect SOF. 535 536 Note to make things even more interesting the w9968cf sends *PLANAR* jpeg, 537 to be precise it sends: SOI, SOF, DRI, SOS, Y-data, SOS, U-data, SOS, 538 V-data, EOI. */ 539static void w9968cf_pkt_scan(struct gspca_dev *gspca_dev, 540 u8 *data, /* isoc packet */ 541 int len) /* iso packet length */ 542{ 543 struct sd *sd = (struct sd *) gspca_dev; 544 545 if (w9968cf_vga_mode[gspca_dev->curr_mode].pixelformat == 546 V4L2_PIX_FMT_JPEG) { 547 if (len >= 2 && 548 data[0] == 0xff && 549 data[1] == 0xd8) { 550 gspca_frame_add(gspca_dev, LAST_PACKET, 551 NULL, 0); 552 gspca_frame_add(gspca_dev, FIRST_PACKET, 553 sd->jpeg_hdr, JPEG_HDR_SZ); 554 /* Strip the ff d8, our own header (which adds 555 huffman and quantization tables) already has this */ 556 len -= 2; 557 data += 2; 558 } 559 } else { 560 /* In UYVY mode an empty packet signals EOF */ 561 if (gspca_dev->empty_packet) { 562 gspca_frame_add(gspca_dev, LAST_PACKET, 563 NULL, 0); 564 gspca_frame_add(gspca_dev, FIRST_PACKET, 565 NULL, 0); 566 gspca_dev->empty_packet = 0; 567 } 568 } 569 gspca_frame_add(gspca_dev, INTER_PACKET, data, len); 570} 571