18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+
28c2ecf20Sopenharmony_ci//
38c2ecf20Sopenharmony_ci// em28xx-i2c.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
48c2ecf20Sopenharmony_ci//
58c2ecf20Sopenharmony_ci// Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
68c2ecf20Sopenharmony_ci//		      Markus Rechberger <mrechberger@gmail.com>
78c2ecf20Sopenharmony_ci//		      Mauro Carvalho Chehab <mchehab@kernel.org>
88c2ecf20Sopenharmony_ci//		      Sascha Sommer <saschasommer@freenet.de>
98c2ecf20Sopenharmony_ci// Copyright (C) 2013 Frank Schäfer <fschaefer.oss@googlemail.com>
108c2ecf20Sopenharmony_ci//
118c2ecf20Sopenharmony_ci// This program is free software; you can redistribute it and/or modify
128c2ecf20Sopenharmony_ci// it under the terms of the GNU General Public License as published by
138c2ecf20Sopenharmony_ci// the Free Software Foundation; either version 2 of the License, or
148c2ecf20Sopenharmony_ci// (at your option) any later version.
158c2ecf20Sopenharmony_ci//
168c2ecf20Sopenharmony_ci// This program is distributed in the hope that it will be useful,
178c2ecf20Sopenharmony_ci// but WITHOUT ANY WARRANTY; without even the implied warranty of
188c2ecf20Sopenharmony_ci// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
198c2ecf20Sopenharmony_ci// GNU General Public License for more details.
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci#include "em28xx.h"
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci#include <linux/module.h>
248c2ecf20Sopenharmony_ci#include <linux/kernel.h>
258c2ecf20Sopenharmony_ci#include <linux/usb.h>
268c2ecf20Sopenharmony_ci#include <linux/i2c.h>
278c2ecf20Sopenharmony_ci#include <linux/jiffies.h>
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci#include "tuner-xc2028.h"
308c2ecf20Sopenharmony_ci#include <media/v4l2-common.h>
318c2ecf20Sopenharmony_ci#include <media/tuner.h>
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_cistatic unsigned int i2c_scan;
368c2ecf20Sopenharmony_cimodule_param(i2c_scan, int, 0444);
378c2ecf20Sopenharmony_ciMODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time");
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_cistatic unsigned int i2c_debug;
408c2ecf20Sopenharmony_cimodule_param(i2c_debug, int, 0644);
418c2ecf20Sopenharmony_ciMODULE_PARM_DESC(i2c_debug, "i2c debug message level (1: normal debug, 2: show I2C transfers)");
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci#define dprintk(level, fmt, arg...) do {				\
448c2ecf20Sopenharmony_ci	if (i2c_debug > level)						\
458c2ecf20Sopenharmony_ci		dev_printk(KERN_DEBUG, &dev->intf->dev,			\
468c2ecf20Sopenharmony_ci			   "i2c: %s: " fmt, __func__, ## arg);		\
478c2ecf20Sopenharmony_ci} while (0)
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci/*
508c2ecf20Sopenharmony_ci * Time in msecs to wait for i2c xfers to finish.
518c2ecf20Sopenharmony_ci * 35ms is the maximum time a SMBUS device could wait when
528c2ecf20Sopenharmony_ci * clock stretching is used. As the transfer itself will take
538c2ecf20Sopenharmony_ci * some time to happen, set it to 35 ms.
548c2ecf20Sopenharmony_ci *
558c2ecf20Sopenharmony_ci * Ok, I2C doesn't specify any limit. So, eventually, we may need
568c2ecf20Sopenharmony_ci * to increase this timeout.
578c2ecf20Sopenharmony_ci */
588c2ecf20Sopenharmony_ci#define EM28XX_I2C_XFER_TIMEOUT         35 /* ms */
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_cistatic int em28xx_i2c_timeout(struct em28xx *dev)
618c2ecf20Sopenharmony_ci{
628c2ecf20Sopenharmony_ci	int time = EM28XX_I2C_XFER_TIMEOUT;
638c2ecf20Sopenharmony_ci
648c2ecf20Sopenharmony_ci	switch (dev->i2c_speed & 0x03) {
658c2ecf20Sopenharmony_ci	case EM28XX_I2C_FREQ_25_KHZ:
668c2ecf20Sopenharmony_ci		time += 4;		/* Assume 4 ms for transfers */
678c2ecf20Sopenharmony_ci		break;
688c2ecf20Sopenharmony_ci	case EM28XX_I2C_FREQ_100_KHZ:
698c2ecf20Sopenharmony_ci	case EM28XX_I2C_FREQ_400_KHZ:
708c2ecf20Sopenharmony_ci		time += 1;		/* Assume 1 ms for transfers */
718c2ecf20Sopenharmony_ci		break;
728c2ecf20Sopenharmony_ci	default: /* EM28XX_I2C_FREQ_1_5_MHZ */
738c2ecf20Sopenharmony_ci		break;
748c2ecf20Sopenharmony_ci	}
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci	return msecs_to_jiffies(time);
778c2ecf20Sopenharmony_ci}
788c2ecf20Sopenharmony_ci
798c2ecf20Sopenharmony_ci/*
808c2ecf20Sopenharmony_ci * em2800_i2c_send_bytes()
818c2ecf20Sopenharmony_ci * send up to 4 bytes to the em2800 i2c device
828c2ecf20Sopenharmony_ci */
838c2ecf20Sopenharmony_cistatic int em2800_i2c_send_bytes(struct em28xx *dev, u8 addr, u8 *buf, u16 len)
848c2ecf20Sopenharmony_ci{
858c2ecf20Sopenharmony_ci	unsigned long timeout = jiffies + em28xx_i2c_timeout(dev);
868c2ecf20Sopenharmony_ci	int ret;
878c2ecf20Sopenharmony_ci	u8 b2[6];
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ci	if (len < 1 || len > 4)
908c2ecf20Sopenharmony_ci		return -EOPNOTSUPP;
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_ci	b2[5] = 0x80 + len - 1;
938c2ecf20Sopenharmony_ci	b2[4] = addr;
948c2ecf20Sopenharmony_ci	b2[3] = buf[0];
958c2ecf20Sopenharmony_ci	if (len > 1)
968c2ecf20Sopenharmony_ci		b2[2] = buf[1];
978c2ecf20Sopenharmony_ci	if (len > 2)
988c2ecf20Sopenharmony_ci		b2[1] = buf[2];
998c2ecf20Sopenharmony_ci	if (len > 3)
1008c2ecf20Sopenharmony_ci		b2[0] = buf[3];
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci	/* trigger write */
1038c2ecf20Sopenharmony_ci	ret = dev->em28xx_write_regs(dev, 4 - len, &b2[4 - len], 2 + len);
1048c2ecf20Sopenharmony_ci	if (ret != 2 + len) {
1058c2ecf20Sopenharmony_ci		dev_warn(&dev->intf->dev,
1068c2ecf20Sopenharmony_ci			 "failed to trigger write to i2c address 0x%x (error=%i)\n",
1078c2ecf20Sopenharmony_ci			    addr, ret);
1088c2ecf20Sopenharmony_ci		return (ret < 0) ? ret : -EIO;
1098c2ecf20Sopenharmony_ci	}
1108c2ecf20Sopenharmony_ci	/* wait for completion */
1118c2ecf20Sopenharmony_ci	while (time_is_after_jiffies(timeout)) {
1128c2ecf20Sopenharmony_ci		ret = dev->em28xx_read_reg(dev, 0x05);
1138c2ecf20Sopenharmony_ci		if (ret == 0x80 + len - 1)
1148c2ecf20Sopenharmony_ci			return len;
1158c2ecf20Sopenharmony_ci		if (ret == 0x94 + len - 1) {
1168c2ecf20Sopenharmony_ci			dprintk(1, "R05 returned 0x%02x: I2C ACK error\n", ret);
1178c2ecf20Sopenharmony_ci			return -ENXIO;
1188c2ecf20Sopenharmony_ci		}
1198c2ecf20Sopenharmony_ci		if (ret < 0) {
1208c2ecf20Sopenharmony_ci			dev_warn(&dev->intf->dev,
1218c2ecf20Sopenharmony_ci				 "failed to get i2c transfer status from bridge register (error=%i)\n",
1228c2ecf20Sopenharmony_ci				ret);
1238c2ecf20Sopenharmony_ci			return ret;
1248c2ecf20Sopenharmony_ci		}
1258c2ecf20Sopenharmony_ci		usleep_range(5000, 6000);
1268c2ecf20Sopenharmony_ci	}
1278c2ecf20Sopenharmony_ci	dprintk(0, "write to i2c device at 0x%x timed out\n", addr);
1288c2ecf20Sopenharmony_ci	return -ETIMEDOUT;
1298c2ecf20Sopenharmony_ci}
1308c2ecf20Sopenharmony_ci
1318c2ecf20Sopenharmony_ci/*
1328c2ecf20Sopenharmony_ci * em2800_i2c_recv_bytes()
1338c2ecf20Sopenharmony_ci * read up to 4 bytes from the em2800 i2c device
1348c2ecf20Sopenharmony_ci */
1358c2ecf20Sopenharmony_cistatic int em2800_i2c_recv_bytes(struct em28xx *dev, u8 addr, u8 *buf, u16 len)
1368c2ecf20Sopenharmony_ci{
1378c2ecf20Sopenharmony_ci	unsigned long timeout = jiffies + em28xx_i2c_timeout(dev);
1388c2ecf20Sopenharmony_ci	u8 buf2[4];
1398c2ecf20Sopenharmony_ci	int ret;
1408c2ecf20Sopenharmony_ci	int i;
1418c2ecf20Sopenharmony_ci
1428c2ecf20Sopenharmony_ci	if (len < 1 || len > 4)
1438c2ecf20Sopenharmony_ci		return -EOPNOTSUPP;
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_ci	/* trigger read */
1468c2ecf20Sopenharmony_ci	buf2[1] = 0x84 + len - 1;
1478c2ecf20Sopenharmony_ci	buf2[0] = addr;
1488c2ecf20Sopenharmony_ci	ret = dev->em28xx_write_regs(dev, 0x04, buf2, 2);
1498c2ecf20Sopenharmony_ci	if (ret != 2) {
1508c2ecf20Sopenharmony_ci		dev_warn(&dev->intf->dev,
1518c2ecf20Sopenharmony_ci			 "failed to trigger read from i2c address 0x%x (error=%i)\n",
1528c2ecf20Sopenharmony_ci			 addr, ret);
1538c2ecf20Sopenharmony_ci		return (ret < 0) ? ret : -EIO;
1548c2ecf20Sopenharmony_ci	}
1558c2ecf20Sopenharmony_ci
1568c2ecf20Sopenharmony_ci	/* wait for completion */
1578c2ecf20Sopenharmony_ci	while (time_is_after_jiffies(timeout)) {
1588c2ecf20Sopenharmony_ci		ret = dev->em28xx_read_reg(dev, 0x05);
1598c2ecf20Sopenharmony_ci		if (ret == 0x84 + len - 1)
1608c2ecf20Sopenharmony_ci			break;
1618c2ecf20Sopenharmony_ci		if (ret == 0x94 + len - 1) {
1628c2ecf20Sopenharmony_ci			dprintk(1, "R05 returned 0x%02x: I2C ACK error\n",
1638c2ecf20Sopenharmony_ci				ret);
1648c2ecf20Sopenharmony_ci			return -ENXIO;
1658c2ecf20Sopenharmony_ci		}
1668c2ecf20Sopenharmony_ci		if (ret < 0) {
1678c2ecf20Sopenharmony_ci			dev_warn(&dev->intf->dev,
1688c2ecf20Sopenharmony_ci				 "failed to get i2c transfer status from bridge register (error=%i)\n",
1698c2ecf20Sopenharmony_ci				 ret);
1708c2ecf20Sopenharmony_ci			return ret;
1718c2ecf20Sopenharmony_ci		}
1728c2ecf20Sopenharmony_ci		usleep_range(5000, 6000);
1738c2ecf20Sopenharmony_ci	}
1748c2ecf20Sopenharmony_ci	if (ret != 0x84 + len - 1)
1758c2ecf20Sopenharmony_ci		dprintk(0, "read from i2c device at 0x%x timed out\n", addr);
1768c2ecf20Sopenharmony_ci
1778c2ecf20Sopenharmony_ci	/* get the received message */
1788c2ecf20Sopenharmony_ci	ret = dev->em28xx_read_reg_req_len(dev, 0x00, 4 - len, buf2, len);
1798c2ecf20Sopenharmony_ci	if (ret != len) {
1808c2ecf20Sopenharmony_ci		dev_warn(&dev->intf->dev,
1818c2ecf20Sopenharmony_ci			 "reading from i2c device at 0x%x failed: couldn't get the received message from the bridge (error=%i)\n",
1828c2ecf20Sopenharmony_ci			 addr, ret);
1838c2ecf20Sopenharmony_ci		return (ret < 0) ? ret : -EIO;
1848c2ecf20Sopenharmony_ci	}
1858c2ecf20Sopenharmony_ci	for (i = 0; i < len; i++)
1868c2ecf20Sopenharmony_ci		buf[i] = buf2[len - 1 - i];
1878c2ecf20Sopenharmony_ci
1888c2ecf20Sopenharmony_ci	return ret;
1898c2ecf20Sopenharmony_ci}
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_ci/*
1928c2ecf20Sopenharmony_ci * em2800_i2c_check_for_device()
1938c2ecf20Sopenharmony_ci * check if there is an i2c device at the supplied address
1948c2ecf20Sopenharmony_ci */
1958c2ecf20Sopenharmony_cistatic int em2800_i2c_check_for_device(struct em28xx *dev, u8 addr)
1968c2ecf20Sopenharmony_ci{
1978c2ecf20Sopenharmony_ci	u8 buf;
1988c2ecf20Sopenharmony_ci	int ret;
1998c2ecf20Sopenharmony_ci
2008c2ecf20Sopenharmony_ci	ret = em2800_i2c_recv_bytes(dev, addr, &buf, 1);
2018c2ecf20Sopenharmony_ci	if (ret == 1)
2028c2ecf20Sopenharmony_ci		return 0;
2038c2ecf20Sopenharmony_ci	return (ret < 0) ? ret : -EIO;
2048c2ecf20Sopenharmony_ci}
2058c2ecf20Sopenharmony_ci
2068c2ecf20Sopenharmony_ci/*
2078c2ecf20Sopenharmony_ci * em28xx_i2c_send_bytes()
2088c2ecf20Sopenharmony_ci */
2098c2ecf20Sopenharmony_cistatic int em28xx_i2c_send_bytes(struct em28xx *dev, u16 addr, u8 *buf,
2108c2ecf20Sopenharmony_ci				 u16 len, int stop)
2118c2ecf20Sopenharmony_ci{
2128c2ecf20Sopenharmony_ci	unsigned long timeout = jiffies + em28xx_i2c_timeout(dev);
2138c2ecf20Sopenharmony_ci	int ret;
2148c2ecf20Sopenharmony_ci
2158c2ecf20Sopenharmony_ci	if (len < 1 || len > 64)
2168c2ecf20Sopenharmony_ci		return -EOPNOTSUPP;
2178c2ecf20Sopenharmony_ci	/*
2188c2ecf20Sopenharmony_ci	 * NOTE: limited by the USB ctrl message constraints
2198c2ecf20Sopenharmony_ci	 * Zero length reads always succeed, even if no device is connected
2208c2ecf20Sopenharmony_ci	 */
2218c2ecf20Sopenharmony_ci
2228c2ecf20Sopenharmony_ci	/* Write to i2c device */
2238c2ecf20Sopenharmony_ci	ret = dev->em28xx_write_regs_req(dev, stop ? 2 : 3, addr, buf, len);
2248c2ecf20Sopenharmony_ci	if (ret != len) {
2258c2ecf20Sopenharmony_ci		if (ret < 0) {
2268c2ecf20Sopenharmony_ci			dev_warn(&dev->intf->dev,
2278c2ecf20Sopenharmony_ci				 "writing to i2c device at 0x%x failed (error=%i)\n",
2288c2ecf20Sopenharmony_ci				 addr, ret);
2298c2ecf20Sopenharmony_ci			return ret;
2308c2ecf20Sopenharmony_ci		}
2318c2ecf20Sopenharmony_ci		dev_warn(&dev->intf->dev,
2328c2ecf20Sopenharmony_ci			 "%i bytes write to i2c device at 0x%x requested, but %i bytes written\n",
2338c2ecf20Sopenharmony_ci				len, addr, ret);
2348c2ecf20Sopenharmony_ci		return -EIO;
2358c2ecf20Sopenharmony_ci	}
2368c2ecf20Sopenharmony_ci
2378c2ecf20Sopenharmony_ci	/* wait for completion */
2388c2ecf20Sopenharmony_ci	while (time_is_after_jiffies(timeout)) {
2398c2ecf20Sopenharmony_ci		ret = dev->em28xx_read_reg(dev, 0x05);
2408c2ecf20Sopenharmony_ci		if (ret == 0) /* success */
2418c2ecf20Sopenharmony_ci			return len;
2428c2ecf20Sopenharmony_ci		if (ret == 0x10) {
2438c2ecf20Sopenharmony_ci			dprintk(1, "I2C ACK error on writing to addr 0x%02x\n",
2448c2ecf20Sopenharmony_ci				addr);
2458c2ecf20Sopenharmony_ci			return -ENXIO;
2468c2ecf20Sopenharmony_ci		}
2478c2ecf20Sopenharmony_ci		if (ret < 0) {
2488c2ecf20Sopenharmony_ci			dev_warn(&dev->intf->dev,
2498c2ecf20Sopenharmony_ci				 "failed to get i2c transfer status from bridge register (error=%i)\n",
2508c2ecf20Sopenharmony_ci				 ret);
2518c2ecf20Sopenharmony_ci			return ret;
2528c2ecf20Sopenharmony_ci		}
2538c2ecf20Sopenharmony_ci		usleep_range(5000, 6000);
2548c2ecf20Sopenharmony_ci		/*
2558c2ecf20Sopenharmony_ci		 * NOTE: do we really have to wait for success ?
2568c2ecf20Sopenharmony_ci		 * Never seen anything else than 0x00 or 0x10
2578c2ecf20Sopenharmony_ci		 * (even with high payload) ...
2588c2ecf20Sopenharmony_ci		 */
2598c2ecf20Sopenharmony_ci	}
2608c2ecf20Sopenharmony_ci
2618c2ecf20Sopenharmony_ci	if (ret == 0x02 || ret == 0x04) {
2628c2ecf20Sopenharmony_ci		/* NOTE: these errors seem to be related to clock stretching */
2638c2ecf20Sopenharmony_ci		dprintk(0,
2648c2ecf20Sopenharmony_ci			"write to i2c device at 0x%x timed out (status=%i)\n",
2658c2ecf20Sopenharmony_ci			addr, ret);
2668c2ecf20Sopenharmony_ci		return -ETIMEDOUT;
2678c2ecf20Sopenharmony_ci	}
2688c2ecf20Sopenharmony_ci
2698c2ecf20Sopenharmony_ci	dev_warn(&dev->intf->dev,
2708c2ecf20Sopenharmony_ci		 "write to i2c device at 0x%x failed with unknown error (status=%i)\n",
2718c2ecf20Sopenharmony_ci		 addr, ret);
2728c2ecf20Sopenharmony_ci	return -EIO;
2738c2ecf20Sopenharmony_ci}
2748c2ecf20Sopenharmony_ci
2758c2ecf20Sopenharmony_ci/*
2768c2ecf20Sopenharmony_ci * em28xx_i2c_recv_bytes()
2778c2ecf20Sopenharmony_ci * read a byte from the i2c device
2788c2ecf20Sopenharmony_ci */
2798c2ecf20Sopenharmony_cistatic int em28xx_i2c_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf, u16 len)
2808c2ecf20Sopenharmony_ci{
2818c2ecf20Sopenharmony_ci	int ret;
2828c2ecf20Sopenharmony_ci
2838c2ecf20Sopenharmony_ci	if (len < 1 || len > 64)
2848c2ecf20Sopenharmony_ci		return -EOPNOTSUPP;
2858c2ecf20Sopenharmony_ci	/*
2868c2ecf20Sopenharmony_ci	 * NOTE: limited by the USB ctrl message constraints
2878c2ecf20Sopenharmony_ci	 * Zero length reads always succeed, even if no device is connected
2888c2ecf20Sopenharmony_ci	 */
2898c2ecf20Sopenharmony_ci
2908c2ecf20Sopenharmony_ci	/* Read data from i2c device */
2918c2ecf20Sopenharmony_ci	ret = dev->em28xx_read_reg_req_len(dev, 2, addr, buf, len);
2928c2ecf20Sopenharmony_ci	if (ret < 0) {
2938c2ecf20Sopenharmony_ci		dev_warn(&dev->intf->dev,
2948c2ecf20Sopenharmony_ci			 "reading from i2c device at 0x%x failed (error=%i)\n",
2958c2ecf20Sopenharmony_ci			 addr, ret);
2968c2ecf20Sopenharmony_ci		return ret;
2978c2ecf20Sopenharmony_ci	}
2988c2ecf20Sopenharmony_ci	/*
2998c2ecf20Sopenharmony_ci	 * NOTE: some devices with two i2c buses have the bad habit to return 0
3008c2ecf20Sopenharmony_ci	 * bytes if we are on bus B AND there was no write attempt to the
3018c2ecf20Sopenharmony_ci	 * specified slave address before AND no device is present at the
3028c2ecf20Sopenharmony_ci	 * requested slave address.
3038c2ecf20Sopenharmony_ci	 * Anyway, the next check will fail with -ENXIO in this case, so avoid
3048c2ecf20Sopenharmony_ci	 * spamming the system log on device probing and do nothing here.
3058c2ecf20Sopenharmony_ci	 */
3068c2ecf20Sopenharmony_ci
3078c2ecf20Sopenharmony_ci	/* Check success of the i2c operation */
3088c2ecf20Sopenharmony_ci	ret = dev->em28xx_read_reg(dev, 0x05);
3098c2ecf20Sopenharmony_ci	if (ret == 0) /* success */
3108c2ecf20Sopenharmony_ci		return len;
3118c2ecf20Sopenharmony_ci	if (ret < 0) {
3128c2ecf20Sopenharmony_ci		dev_warn(&dev->intf->dev,
3138c2ecf20Sopenharmony_ci			 "failed to get i2c transfer status from bridge register (error=%i)\n",
3148c2ecf20Sopenharmony_ci			 ret);
3158c2ecf20Sopenharmony_ci		return ret;
3168c2ecf20Sopenharmony_ci	}
3178c2ecf20Sopenharmony_ci	if (ret == 0x10) {
3188c2ecf20Sopenharmony_ci		dprintk(1, "I2C ACK error on writing to addr 0x%02x\n",
3198c2ecf20Sopenharmony_ci			addr);
3208c2ecf20Sopenharmony_ci		return -ENXIO;
3218c2ecf20Sopenharmony_ci	}
3228c2ecf20Sopenharmony_ci
3238c2ecf20Sopenharmony_ci	if (ret == 0x02 || ret == 0x04) {
3248c2ecf20Sopenharmony_ci		/* NOTE: these errors seem to be related to clock stretching */
3258c2ecf20Sopenharmony_ci		dprintk(0,
3268c2ecf20Sopenharmony_ci			"write to i2c device at 0x%x timed out (status=%i)\n",
3278c2ecf20Sopenharmony_ci			addr, ret);
3288c2ecf20Sopenharmony_ci		return -ETIMEDOUT;
3298c2ecf20Sopenharmony_ci	}
3308c2ecf20Sopenharmony_ci
3318c2ecf20Sopenharmony_ci	dev_warn(&dev->intf->dev,
3328c2ecf20Sopenharmony_ci		 "write to i2c device at 0x%x failed with unknown error (status=%i)\n",
3338c2ecf20Sopenharmony_ci		 addr, ret);
3348c2ecf20Sopenharmony_ci	return -EIO;
3358c2ecf20Sopenharmony_ci}
3368c2ecf20Sopenharmony_ci
3378c2ecf20Sopenharmony_ci/*
3388c2ecf20Sopenharmony_ci * em28xx_i2c_check_for_device()
3398c2ecf20Sopenharmony_ci * check if there is a i2c_device at the supplied address
3408c2ecf20Sopenharmony_ci */
3418c2ecf20Sopenharmony_cistatic int em28xx_i2c_check_for_device(struct em28xx *dev, u16 addr)
3428c2ecf20Sopenharmony_ci{
3438c2ecf20Sopenharmony_ci	int ret;
3448c2ecf20Sopenharmony_ci	u8 buf;
3458c2ecf20Sopenharmony_ci
3468c2ecf20Sopenharmony_ci	ret = em28xx_i2c_recv_bytes(dev, addr, &buf, 1);
3478c2ecf20Sopenharmony_ci	if (ret == 1)
3488c2ecf20Sopenharmony_ci		return 0;
3498c2ecf20Sopenharmony_ci	return (ret < 0) ? ret : -EIO;
3508c2ecf20Sopenharmony_ci}
3518c2ecf20Sopenharmony_ci
3528c2ecf20Sopenharmony_ci/*
3538c2ecf20Sopenharmony_ci * em25xx_bus_B_send_bytes
3548c2ecf20Sopenharmony_ci * write bytes to the i2c device
3558c2ecf20Sopenharmony_ci */
3568c2ecf20Sopenharmony_cistatic int em25xx_bus_B_send_bytes(struct em28xx *dev, u16 addr, u8 *buf,
3578c2ecf20Sopenharmony_ci				   u16 len)
3588c2ecf20Sopenharmony_ci{
3598c2ecf20Sopenharmony_ci	int ret;
3608c2ecf20Sopenharmony_ci
3618c2ecf20Sopenharmony_ci	if (len < 1 || len > 64)
3628c2ecf20Sopenharmony_ci		return -EOPNOTSUPP;
3638c2ecf20Sopenharmony_ci	/*
3648c2ecf20Sopenharmony_ci	 * NOTE: limited by the USB ctrl message constraints
3658c2ecf20Sopenharmony_ci	 * Zero length reads always succeed, even if no device is connected
3668c2ecf20Sopenharmony_ci	 */
3678c2ecf20Sopenharmony_ci
3688c2ecf20Sopenharmony_ci	/* Set register and write value */
3698c2ecf20Sopenharmony_ci	ret = dev->em28xx_write_regs_req(dev, 0x06, addr, buf, len);
3708c2ecf20Sopenharmony_ci	if (ret != len) {
3718c2ecf20Sopenharmony_ci		if (ret < 0) {
3728c2ecf20Sopenharmony_ci			dev_warn(&dev->intf->dev,
3738c2ecf20Sopenharmony_ci				 "writing to i2c device at 0x%x failed (error=%i)\n",
3748c2ecf20Sopenharmony_ci				 addr, ret);
3758c2ecf20Sopenharmony_ci			return ret;
3768c2ecf20Sopenharmony_ci		}
3778c2ecf20Sopenharmony_ci
3788c2ecf20Sopenharmony_ci		dev_warn(&dev->intf->dev,
3798c2ecf20Sopenharmony_ci			 "%i bytes write to i2c device at 0x%x requested, but %i bytes written\n",
3808c2ecf20Sopenharmony_ci			 len, addr, ret);
3818c2ecf20Sopenharmony_ci		return -EIO;
3828c2ecf20Sopenharmony_ci	}
3838c2ecf20Sopenharmony_ci	/* Check success */
3848c2ecf20Sopenharmony_ci	ret = dev->em28xx_read_reg_req(dev, 0x08, 0x0000);
3858c2ecf20Sopenharmony_ci	/*
3868c2ecf20Sopenharmony_ci	 * NOTE: the only error we've seen so far is
3878c2ecf20Sopenharmony_ci	 * 0x01 when the slave device is not present
3888c2ecf20Sopenharmony_ci	 */
3898c2ecf20Sopenharmony_ci	if (!ret)
3908c2ecf20Sopenharmony_ci		return len;
3918c2ecf20Sopenharmony_ci
3928c2ecf20Sopenharmony_ci	if (ret > 0) {
3938c2ecf20Sopenharmony_ci		dprintk(1, "Bus B R08 returned 0x%02x: I2C ACK error\n", ret);
3948c2ecf20Sopenharmony_ci		return -ENXIO;
3958c2ecf20Sopenharmony_ci	}
3968c2ecf20Sopenharmony_ci
3978c2ecf20Sopenharmony_ci	return ret;
3988c2ecf20Sopenharmony_ci	/*
3998c2ecf20Sopenharmony_ci	 * NOTE: With chip types (other chip IDs) which actually don't support
4008c2ecf20Sopenharmony_ci	 * this operation, it seems to succeed ALWAYS ! (even if there is no
4018c2ecf20Sopenharmony_ci	 * slave device or even no second i2c bus provided)
4028c2ecf20Sopenharmony_ci	 */
4038c2ecf20Sopenharmony_ci}
4048c2ecf20Sopenharmony_ci
4058c2ecf20Sopenharmony_ci/*
4068c2ecf20Sopenharmony_ci * em25xx_bus_B_recv_bytes
4078c2ecf20Sopenharmony_ci * read bytes from the i2c device
4088c2ecf20Sopenharmony_ci */
4098c2ecf20Sopenharmony_cistatic int em25xx_bus_B_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf,
4108c2ecf20Sopenharmony_ci				   u16 len)
4118c2ecf20Sopenharmony_ci{
4128c2ecf20Sopenharmony_ci	int ret;
4138c2ecf20Sopenharmony_ci
4148c2ecf20Sopenharmony_ci	if (len < 1 || len > 64)
4158c2ecf20Sopenharmony_ci		return -EOPNOTSUPP;
4168c2ecf20Sopenharmony_ci	/*
4178c2ecf20Sopenharmony_ci	 * NOTE: limited by the USB ctrl message constraints
4188c2ecf20Sopenharmony_ci	 * Zero length reads always succeed, even if no device is connected
4198c2ecf20Sopenharmony_ci	 */
4208c2ecf20Sopenharmony_ci
4218c2ecf20Sopenharmony_ci	/* Read value */
4228c2ecf20Sopenharmony_ci	ret = dev->em28xx_read_reg_req_len(dev, 0x06, addr, buf, len);
4238c2ecf20Sopenharmony_ci	if (ret < 0) {
4248c2ecf20Sopenharmony_ci		dev_warn(&dev->intf->dev,
4258c2ecf20Sopenharmony_ci			 "reading from i2c device at 0x%x failed (error=%i)\n",
4268c2ecf20Sopenharmony_ci			 addr, ret);
4278c2ecf20Sopenharmony_ci		return ret;
4288c2ecf20Sopenharmony_ci	}
4298c2ecf20Sopenharmony_ci	/*
4308c2ecf20Sopenharmony_ci	 * NOTE: some devices with two i2c buses have the bad habit to return 0
4318c2ecf20Sopenharmony_ci	 * bytes if we are on bus B AND there was no write attempt to the
4328c2ecf20Sopenharmony_ci	 * specified slave address before AND no device is present at the
4338c2ecf20Sopenharmony_ci	 * requested slave address.
4348c2ecf20Sopenharmony_ci	 * Anyway, the next check will fail with -ENXIO in this case, so avoid
4358c2ecf20Sopenharmony_ci	 * spamming the system log on device probing and do nothing here.
4368c2ecf20Sopenharmony_ci	 */
4378c2ecf20Sopenharmony_ci
4388c2ecf20Sopenharmony_ci	/* Check success */
4398c2ecf20Sopenharmony_ci	ret = dev->em28xx_read_reg_req(dev, 0x08, 0x0000);
4408c2ecf20Sopenharmony_ci	/*
4418c2ecf20Sopenharmony_ci	 * NOTE: the only error we've seen so far is
4428c2ecf20Sopenharmony_ci	 * 0x01 when the slave device is not present
4438c2ecf20Sopenharmony_ci	 */
4448c2ecf20Sopenharmony_ci	if (!ret)
4458c2ecf20Sopenharmony_ci		return len;
4468c2ecf20Sopenharmony_ci
4478c2ecf20Sopenharmony_ci	if (ret > 0) {
4488c2ecf20Sopenharmony_ci		dprintk(1, "Bus B R08 returned 0x%02x: I2C ACK error\n", ret);
4498c2ecf20Sopenharmony_ci		return -ENXIO;
4508c2ecf20Sopenharmony_ci	}
4518c2ecf20Sopenharmony_ci
4528c2ecf20Sopenharmony_ci	return ret;
4538c2ecf20Sopenharmony_ci	/*
4548c2ecf20Sopenharmony_ci	 * NOTE: With chip types (other chip IDs) which actually don't support
4558c2ecf20Sopenharmony_ci	 * this operation, it seems to succeed ALWAYS ! (even if there is no
4568c2ecf20Sopenharmony_ci	 * slave device or even no second i2c bus provided)
4578c2ecf20Sopenharmony_ci	 */
4588c2ecf20Sopenharmony_ci}
4598c2ecf20Sopenharmony_ci
4608c2ecf20Sopenharmony_ci/*
4618c2ecf20Sopenharmony_ci * em25xx_bus_B_check_for_device()
4628c2ecf20Sopenharmony_ci * check if there is a i2c device at the supplied address
4638c2ecf20Sopenharmony_ci */
4648c2ecf20Sopenharmony_cistatic int em25xx_bus_B_check_for_device(struct em28xx *dev, u16 addr)
4658c2ecf20Sopenharmony_ci{
4668c2ecf20Sopenharmony_ci	u8 buf;
4678c2ecf20Sopenharmony_ci	int ret;
4688c2ecf20Sopenharmony_ci
4698c2ecf20Sopenharmony_ci	ret = em25xx_bus_B_recv_bytes(dev, addr, &buf, 1);
4708c2ecf20Sopenharmony_ci	if (ret < 0)
4718c2ecf20Sopenharmony_ci		return ret;
4728c2ecf20Sopenharmony_ci
4738c2ecf20Sopenharmony_ci	return 0;
4748c2ecf20Sopenharmony_ci	/*
4758c2ecf20Sopenharmony_ci	 * NOTE: With chips which do not support this operation,
4768c2ecf20Sopenharmony_ci	 * it seems to succeed ALWAYS ! (even if no device connected)
4778c2ecf20Sopenharmony_ci	 */
4788c2ecf20Sopenharmony_ci}
4798c2ecf20Sopenharmony_ci
4808c2ecf20Sopenharmony_cistatic inline int i2c_check_for_device(struct em28xx_i2c_bus *i2c_bus, u16 addr)
4818c2ecf20Sopenharmony_ci{
4828c2ecf20Sopenharmony_ci	struct em28xx *dev = i2c_bus->dev;
4838c2ecf20Sopenharmony_ci	int rc = -EOPNOTSUPP;
4848c2ecf20Sopenharmony_ci
4858c2ecf20Sopenharmony_ci	if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX)
4868c2ecf20Sopenharmony_ci		rc = em28xx_i2c_check_for_device(dev, addr);
4878c2ecf20Sopenharmony_ci	else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800)
4888c2ecf20Sopenharmony_ci		rc = em2800_i2c_check_for_device(dev, addr);
4898c2ecf20Sopenharmony_ci	else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B)
4908c2ecf20Sopenharmony_ci		rc = em25xx_bus_B_check_for_device(dev, addr);
4918c2ecf20Sopenharmony_ci	return rc;
4928c2ecf20Sopenharmony_ci}
4938c2ecf20Sopenharmony_ci
4948c2ecf20Sopenharmony_cistatic inline int i2c_recv_bytes(struct em28xx_i2c_bus *i2c_bus,
4958c2ecf20Sopenharmony_ci				 struct i2c_msg msg)
4968c2ecf20Sopenharmony_ci{
4978c2ecf20Sopenharmony_ci	struct em28xx *dev = i2c_bus->dev;
4988c2ecf20Sopenharmony_ci	u16 addr = msg.addr << 1;
4998c2ecf20Sopenharmony_ci	int rc = -EOPNOTSUPP;
5008c2ecf20Sopenharmony_ci
5018c2ecf20Sopenharmony_ci	if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX)
5028c2ecf20Sopenharmony_ci		rc = em28xx_i2c_recv_bytes(dev, addr, msg.buf, msg.len);
5038c2ecf20Sopenharmony_ci	else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800)
5048c2ecf20Sopenharmony_ci		rc = em2800_i2c_recv_bytes(dev, addr, msg.buf, msg.len);
5058c2ecf20Sopenharmony_ci	else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B)
5068c2ecf20Sopenharmony_ci		rc = em25xx_bus_B_recv_bytes(dev, addr, msg.buf, msg.len);
5078c2ecf20Sopenharmony_ci	return rc;
5088c2ecf20Sopenharmony_ci}
5098c2ecf20Sopenharmony_ci
5108c2ecf20Sopenharmony_cistatic inline int i2c_send_bytes(struct em28xx_i2c_bus *i2c_bus,
5118c2ecf20Sopenharmony_ci				 struct i2c_msg msg, int stop)
5128c2ecf20Sopenharmony_ci{
5138c2ecf20Sopenharmony_ci	struct em28xx *dev = i2c_bus->dev;
5148c2ecf20Sopenharmony_ci	u16 addr = msg.addr << 1;
5158c2ecf20Sopenharmony_ci	int rc = -EOPNOTSUPP;
5168c2ecf20Sopenharmony_ci
5178c2ecf20Sopenharmony_ci	if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX)
5188c2ecf20Sopenharmony_ci		rc = em28xx_i2c_send_bytes(dev, addr, msg.buf, msg.len, stop);
5198c2ecf20Sopenharmony_ci	else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800)
5208c2ecf20Sopenharmony_ci		rc = em2800_i2c_send_bytes(dev, addr, msg.buf, msg.len);
5218c2ecf20Sopenharmony_ci	else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B)
5228c2ecf20Sopenharmony_ci		rc = em25xx_bus_B_send_bytes(dev, addr, msg.buf, msg.len);
5238c2ecf20Sopenharmony_ci	return rc;
5248c2ecf20Sopenharmony_ci}
5258c2ecf20Sopenharmony_ci
5268c2ecf20Sopenharmony_ci/*
5278c2ecf20Sopenharmony_ci * em28xx_i2c_xfer()
5288c2ecf20Sopenharmony_ci * the main i2c transfer function
5298c2ecf20Sopenharmony_ci */
5308c2ecf20Sopenharmony_cistatic int em28xx_i2c_xfer(struct i2c_adapter *i2c_adap,
5318c2ecf20Sopenharmony_ci			   struct i2c_msg msgs[], int num)
5328c2ecf20Sopenharmony_ci{
5338c2ecf20Sopenharmony_ci	struct em28xx_i2c_bus *i2c_bus = i2c_adap->algo_data;
5348c2ecf20Sopenharmony_ci	struct em28xx *dev = i2c_bus->dev;
5358c2ecf20Sopenharmony_ci	unsigned int bus = i2c_bus->bus;
5368c2ecf20Sopenharmony_ci	int addr, rc, i;
5378c2ecf20Sopenharmony_ci	u8 reg;
5388c2ecf20Sopenharmony_ci
5398c2ecf20Sopenharmony_ci	/*
5408c2ecf20Sopenharmony_ci	 * prevent i2c xfer attempts after device is disconnected
5418c2ecf20Sopenharmony_ci	 * some fe's try to do i2c writes/reads from their release
5428c2ecf20Sopenharmony_ci	 * interfaces when called in disconnect path
5438c2ecf20Sopenharmony_ci	 */
5448c2ecf20Sopenharmony_ci	if (dev->disconnected)
5458c2ecf20Sopenharmony_ci		return -ENODEV;
5468c2ecf20Sopenharmony_ci
5478c2ecf20Sopenharmony_ci	if (!rt_mutex_trylock(&dev->i2c_bus_lock))
5488c2ecf20Sopenharmony_ci		return -EAGAIN;
5498c2ecf20Sopenharmony_ci
5508c2ecf20Sopenharmony_ci	/* Switch I2C bus if needed */
5518c2ecf20Sopenharmony_ci	if (bus != dev->cur_i2c_bus &&
5528c2ecf20Sopenharmony_ci	    i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX) {
5538c2ecf20Sopenharmony_ci		if (bus == 1)
5548c2ecf20Sopenharmony_ci			reg = EM2874_I2C_SECONDARY_BUS_SELECT;
5558c2ecf20Sopenharmony_ci		else
5568c2ecf20Sopenharmony_ci			reg = 0;
5578c2ecf20Sopenharmony_ci		em28xx_write_reg_bits(dev, EM28XX_R06_I2C_CLK, reg,
5588c2ecf20Sopenharmony_ci				      EM2874_I2C_SECONDARY_BUS_SELECT);
5598c2ecf20Sopenharmony_ci		dev->cur_i2c_bus = bus;
5608c2ecf20Sopenharmony_ci	}
5618c2ecf20Sopenharmony_ci
5628c2ecf20Sopenharmony_ci	for (i = 0; i < num; i++) {
5638c2ecf20Sopenharmony_ci		addr = msgs[i].addr << 1;
5648c2ecf20Sopenharmony_ci		if (!msgs[i].len) {
5658c2ecf20Sopenharmony_ci			/*
5668c2ecf20Sopenharmony_ci			 * no len: check only for device presence
5678c2ecf20Sopenharmony_ci			 * This code is only called during device probe.
5688c2ecf20Sopenharmony_ci			 */
5698c2ecf20Sopenharmony_ci			rc = i2c_check_for_device(i2c_bus, addr);
5708c2ecf20Sopenharmony_ci
5718c2ecf20Sopenharmony_ci			if (rc == -ENXIO)
5728c2ecf20Sopenharmony_ci				rc = -ENODEV;
5738c2ecf20Sopenharmony_ci		} else if (msgs[i].flags & I2C_M_RD) {
5748c2ecf20Sopenharmony_ci			/* read bytes */
5758c2ecf20Sopenharmony_ci			rc = i2c_recv_bytes(i2c_bus, msgs[i]);
5768c2ecf20Sopenharmony_ci		} else {
5778c2ecf20Sopenharmony_ci			/* write bytes */
5788c2ecf20Sopenharmony_ci			rc = i2c_send_bytes(i2c_bus, msgs[i], i == num - 1);
5798c2ecf20Sopenharmony_ci		}
5808c2ecf20Sopenharmony_ci
5818c2ecf20Sopenharmony_ci		if (rc < 0)
5828c2ecf20Sopenharmony_ci			goto error;
5838c2ecf20Sopenharmony_ci
5848c2ecf20Sopenharmony_ci		dprintk(2, "%s %s addr=%02x len=%d: %*ph\n",
5858c2ecf20Sopenharmony_ci			(msgs[i].flags & I2C_M_RD) ? "read" : "write",
5868c2ecf20Sopenharmony_ci			i == num - 1 ? "stop" : "nonstop",
5878c2ecf20Sopenharmony_ci			addr, msgs[i].len,
5888c2ecf20Sopenharmony_ci			msgs[i].len, msgs[i].buf);
5898c2ecf20Sopenharmony_ci	}
5908c2ecf20Sopenharmony_ci
5918c2ecf20Sopenharmony_ci	rt_mutex_unlock(&dev->i2c_bus_lock);
5928c2ecf20Sopenharmony_ci	return num;
5938c2ecf20Sopenharmony_ci
5948c2ecf20Sopenharmony_cierror:
5958c2ecf20Sopenharmony_ci	dprintk(2, "%s %s addr=%02x len=%d: %sERROR: %i\n",
5968c2ecf20Sopenharmony_ci		(msgs[i].flags & I2C_M_RD) ? "read" : "write",
5978c2ecf20Sopenharmony_ci		i == num - 1 ? "stop" : "nonstop",
5988c2ecf20Sopenharmony_ci		addr, msgs[i].len,
5998c2ecf20Sopenharmony_ci		(rc == -ENODEV) ? "no device " : "",
6008c2ecf20Sopenharmony_ci		rc);
6018c2ecf20Sopenharmony_ci
6028c2ecf20Sopenharmony_ci	rt_mutex_unlock(&dev->i2c_bus_lock);
6038c2ecf20Sopenharmony_ci	return rc;
6048c2ecf20Sopenharmony_ci}
6058c2ecf20Sopenharmony_ci
6068c2ecf20Sopenharmony_ci/*
6078c2ecf20Sopenharmony_ci * based on linux/sunrpc/svcauth.h and linux/hash.h
6088c2ecf20Sopenharmony_ci * The original hash function returns a different value, if arch is x86_64
6098c2ecf20Sopenharmony_ci * or i386.
6108c2ecf20Sopenharmony_ci */
6118c2ecf20Sopenharmony_cistatic inline unsigned long em28xx_hash_mem(char *buf, int length, int bits)
6128c2ecf20Sopenharmony_ci{
6138c2ecf20Sopenharmony_ci	unsigned long hash = 0;
6148c2ecf20Sopenharmony_ci	unsigned long l = 0;
6158c2ecf20Sopenharmony_ci	int len = 0;
6168c2ecf20Sopenharmony_ci	unsigned char c;
6178c2ecf20Sopenharmony_ci
6188c2ecf20Sopenharmony_ci	do {
6198c2ecf20Sopenharmony_ci		if (len == length) {
6208c2ecf20Sopenharmony_ci			c = (char)len;
6218c2ecf20Sopenharmony_ci			len = -1;
6228c2ecf20Sopenharmony_ci		} else {
6238c2ecf20Sopenharmony_ci			c = *buf++;
6248c2ecf20Sopenharmony_ci		}
6258c2ecf20Sopenharmony_ci		l = (l << 8) | c;
6268c2ecf20Sopenharmony_ci		len++;
6278c2ecf20Sopenharmony_ci		if ((len & (32 / 8 - 1)) == 0)
6288c2ecf20Sopenharmony_ci			hash = ((hash ^ l) * 0x9e370001UL);
6298c2ecf20Sopenharmony_ci	} while (len);
6308c2ecf20Sopenharmony_ci
6318c2ecf20Sopenharmony_ci	return (hash >> (32 - bits)) & 0xffffffffUL;
6328c2ecf20Sopenharmony_ci}
6338c2ecf20Sopenharmony_ci
6348c2ecf20Sopenharmony_ci/*
6358c2ecf20Sopenharmony_ci * Helper function to read data blocks from i2c clients with 8 or 16 bit
6368c2ecf20Sopenharmony_ci * address width, 8 bit register width and auto incrementation been activated
6378c2ecf20Sopenharmony_ci */
6388c2ecf20Sopenharmony_cistatic int em28xx_i2c_read_block(struct em28xx *dev, unsigned int bus, u16 addr,
6398c2ecf20Sopenharmony_ci				 bool addr_w16, u16 len, u8 *data)
6408c2ecf20Sopenharmony_ci{
6418c2ecf20Sopenharmony_ci	int remain = len, rsize, rsize_max, ret;
6428c2ecf20Sopenharmony_ci	u8 buf[2];
6438c2ecf20Sopenharmony_ci
6448c2ecf20Sopenharmony_ci	/* Sanity check */
6458c2ecf20Sopenharmony_ci	if (addr + remain > (addr_w16 * 0xff00 + 0xff + 1))
6468c2ecf20Sopenharmony_ci		return -EINVAL;
6478c2ecf20Sopenharmony_ci	/* Select address */
6488c2ecf20Sopenharmony_ci	buf[0] = addr >> 8;
6498c2ecf20Sopenharmony_ci	buf[1] = addr & 0xff;
6508c2ecf20Sopenharmony_ci	ret = i2c_master_send(&dev->i2c_client[bus],
6518c2ecf20Sopenharmony_ci			      buf + !addr_w16, 1 + addr_w16);
6528c2ecf20Sopenharmony_ci	if (ret < 0)
6538c2ecf20Sopenharmony_ci		return ret;
6548c2ecf20Sopenharmony_ci	/* Read data */
6558c2ecf20Sopenharmony_ci	if (dev->board.is_em2800)
6568c2ecf20Sopenharmony_ci		rsize_max = 4;
6578c2ecf20Sopenharmony_ci	else
6588c2ecf20Sopenharmony_ci		rsize_max = 64;
6598c2ecf20Sopenharmony_ci	while (remain > 0) {
6608c2ecf20Sopenharmony_ci		if (remain > rsize_max)
6618c2ecf20Sopenharmony_ci			rsize = rsize_max;
6628c2ecf20Sopenharmony_ci		else
6638c2ecf20Sopenharmony_ci			rsize = remain;
6648c2ecf20Sopenharmony_ci
6658c2ecf20Sopenharmony_ci		ret = i2c_master_recv(&dev->i2c_client[bus], data, rsize);
6668c2ecf20Sopenharmony_ci		if (ret < 0)
6678c2ecf20Sopenharmony_ci			return ret;
6688c2ecf20Sopenharmony_ci
6698c2ecf20Sopenharmony_ci		remain -= rsize;
6708c2ecf20Sopenharmony_ci		data += rsize;
6718c2ecf20Sopenharmony_ci	}
6728c2ecf20Sopenharmony_ci
6738c2ecf20Sopenharmony_ci	return len;
6748c2ecf20Sopenharmony_ci}
6758c2ecf20Sopenharmony_ci
6768c2ecf20Sopenharmony_cistatic int em28xx_i2c_eeprom(struct em28xx *dev, unsigned int bus,
6778c2ecf20Sopenharmony_ci			     u8 **eedata, u16 *eedata_len)
6788c2ecf20Sopenharmony_ci{
6798c2ecf20Sopenharmony_ci	const u16 len = 256;
6808c2ecf20Sopenharmony_ci	/*
6818c2ecf20Sopenharmony_ci	 * FIXME common length/size for bytes to read, to display, hash
6828c2ecf20Sopenharmony_ci	 * calculation and returned device dataset. Simplifies the code a lot,
6838c2ecf20Sopenharmony_ci	 * but we might have to deal with multiple sizes in the future !
6848c2ecf20Sopenharmony_ci	 */
6858c2ecf20Sopenharmony_ci	int err;
6868c2ecf20Sopenharmony_ci	struct em28xx_eeprom *dev_config;
6878c2ecf20Sopenharmony_ci	u8 buf, *data;
6888c2ecf20Sopenharmony_ci
6898c2ecf20Sopenharmony_ci	*eedata = NULL;
6908c2ecf20Sopenharmony_ci	*eedata_len = 0;
6918c2ecf20Sopenharmony_ci
6928c2ecf20Sopenharmony_ci	/* EEPROM is always on i2c bus 0 on all known devices. */
6938c2ecf20Sopenharmony_ci
6948c2ecf20Sopenharmony_ci	dev->i2c_client[bus].addr = 0xa0 >> 1;
6958c2ecf20Sopenharmony_ci
6968c2ecf20Sopenharmony_ci	/* Check if board has eeprom */
6978c2ecf20Sopenharmony_ci	err = i2c_master_recv(&dev->i2c_client[bus], &buf, 0);
6988c2ecf20Sopenharmony_ci	if (err < 0) {
6998c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev, "board has no eeprom\n");
7008c2ecf20Sopenharmony_ci		return -ENODEV;
7018c2ecf20Sopenharmony_ci	}
7028c2ecf20Sopenharmony_ci
7038c2ecf20Sopenharmony_ci	data = kzalloc(len, GFP_KERNEL);
7048c2ecf20Sopenharmony_ci	if (!data)
7058c2ecf20Sopenharmony_ci		return -ENOMEM;
7068c2ecf20Sopenharmony_ci
7078c2ecf20Sopenharmony_ci	/* Read EEPROM content */
7088c2ecf20Sopenharmony_ci	err = em28xx_i2c_read_block(dev, bus, 0x0000,
7098c2ecf20Sopenharmony_ci				    dev->eeprom_addrwidth_16bit,
7108c2ecf20Sopenharmony_ci				    len, data);
7118c2ecf20Sopenharmony_ci	if (err != len) {
7128c2ecf20Sopenharmony_ci		dev_err(&dev->intf->dev,
7138c2ecf20Sopenharmony_ci			"failed to read eeprom (err=%d)\n", err);
7148c2ecf20Sopenharmony_ci		goto error;
7158c2ecf20Sopenharmony_ci	}
7168c2ecf20Sopenharmony_ci
7178c2ecf20Sopenharmony_ci	if (i2c_debug) {
7188c2ecf20Sopenharmony_ci		/* Display eeprom content */
7198c2ecf20Sopenharmony_ci		print_hex_dump(KERN_DEBUG, "em28xx eeprom ", DUMP_PREFIX_OFFSET,
7208c2ecf20Sopenharmony_ci			       16, 1, data, len, true);
7218c2ecf20Sopenharmony_ci
7228c2ecf20Sopenharmony_ci		if (dev->eeprom_addrwidth_16bit)
7238c2ecf20Sopenharmony_ci			dev_info(&dev->intf->dev,
7248c2ecf20Sopenharmony_ci				 "eeprom %06x: ... (skipped)\n", 256);
7258c2ecf20Sopenharmony_ci	}
7268c2ecf20Sopenharmony_ci
7278c2ecf20Sopenharmony_ci	if (dev->eeprom_addrwidth_16bit &&
7288c2ecf20Sopenharmony_ci	    data[0] == 0x26 && data[3] == 0x00) {
7298c2ecf20Sopenharmony_ci		/* new eeprom format; size 4-64kb */
7308c2ecf20Sopenharmony_ci		u16 mc_start;
7318c2ecf20Sopenharmony_ci		u16 hwconf_offset;
7328c2ecf20Sopenharmony_ci
7338c2ecf20Sopenharmony_ci		dev->hash = em28xx_hash_mem(data, len, 32);
7348c2ecf20Sopenharmony_ci		mc_start = (data[1] << 8) + 4;	/* usually 0x0004 */
7358c2ecf20Sopenharmony_ci
7368c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev,
7378c2ecf20Sopenharmony_ci			 "EEPROM ID = %4ph, EEPROM hash = 0x%08lx\n",
7388c2ecf20Sopenharmony_ci			 data, dev->hash);
7398c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev,
7408c2ecf20Sopenharmony_ci			 "EEPROM info:\n");
7418c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev,
7428c2ecf20Sopenharmony_ci			 "\tmicrocode start address = 0x%04x, boot configuration = 0x%02x\n",
7438c2ecf20Sopenharmony_ci			 mc_start, data[2]);
7448c2ecf20Sopenharmony_ci		/*
7458c2ecf20Sopenharmony_ci		 * boot configuration (address 0x0002):
7468c2ecf20Sopenharmony_ci		 * [0]   microcode download speed: 1 = 400 kHz; 0 = 100 kHz
7478c2ecf20Sopenharmony_ci		 * [1]   always selects 12 kb RAM
7488c2ecf20Sopenharmony_ci		 * [2]   USB device speed: 1 = force Full Speed; 0 = auto detect
7498c2ecf20Sopenharmony_ci		 * [4]   1 = force fast mode and no suspend for device testing
7508c2ecf20Sopenharmony_ci		 * [5:7] USB PHY tuning registers; determined by device
7518c2ecf20Sopenharmony_ci		 *       characterization
7528c2ecf20Sopenharmony_ci		 */
7538c2ecf20Sopenharmony_ci
7548c2ecf20Sopenharmony_ci		/*
7558c2ecf20Sopenharmony_ci		 * Read hardware config dataset offset from address
7568c2ecf20Sopenharmony_ci		 * (microcode start + 46)
7578c2ecf20Sopenharmony_ci		 */
7588c2ecf20Sopenharmony_ci		err = em28xx_i2c_read_block(dev, bus, mc_start + 46, 1, 2,
7598c2ecf20Sopenharmony_ci					    data);
7608c2ecf20Sopenharmony_ci		if (err != 2) {
7618c2ecf20Sopenharmony_ci			dev_err(&dev->intf->dev,
7628c2ecf20Sopenharmony_ci				"failed to read hardware configuration data from eeprom (err=%d)\n",
7638c2ecf20Sopenharmony_ci				err);
7648c2ecf20Sopenharmony_ci			goto error;
7658c2ecf20Sopenharmony_ci		}
7668c2ecf20Sopenharmony_ci
7678c2ecf20Sopenharmony_ci		/* Calculate hardware config dataset start address */
7688c2ecf20Sopenharmony_ci		hwconf_offset = mc_start + data[0] + (data[1] << 8);
7698c2ecf20Sopenharmony_ci
7708c2ecf20Sopenharmony_ci		/* Read hardware config dataset */
7718c2ecf20Sopenharmony_ci		/*
7728c2ecf20Sopenharmony_ci		 * NOTE: the microcode copy can be multiple pages long, but
7738c2ecf20Sopenharmony_ci		 * we assume the hardware config dataset is the same as in
7748c2ecf20Sopenharmony_ci		 * the old eeprom and not longer than 256 bytes.
7758c2ecf20Sopenharmony_ci		 * tveeprom is currently also limited to 256 bytes.
7768c2ecf20Sopenharmony_ci		 */
7778c2ecf20Sopenharmony_ci		err = em28xx_i2c_read_block(dev, bus, hwconf_offset, 1, len,
7788c2ecf20Sopenharmony_ci					    data);
7798c2ecf20Sopenharmony_ci		if (err != len) {
7808c2ecf20Sopenharmony_ci			dev_err(&dev->intf->dev,
7818c2ecf20Sopenharmony_ci				"failed to read hardware configuration data from eeprom (err=%d)\n",
7828c2ecf20Sopenharmony_ci				err);
7838c2ecf20Sopenharmony_ci			goto error;
7848c2ecf20Sopenharmony_ci		}
7858c2ecf20Sopenharmony_ci
7868c2ecf20Sopenharmony_ci		/* Verify hardware config dataset */
7878c2ecf20Sopenharmony_ci		/* NOTE: not all devices provide this type of dataset */
7888c2ecf20Sopenharmony_ci		if (data[0] != 0x1a || data[1] != 0xeb ||
7898c2ecf20Sopenharmony_ci		    data[2] != 0x67 || data[3] != 0x95) {
7908c2ecf20Sopenharmony_ci			dev_info(&dev->intf->dev,
7918c2ecf20Sopenharmony_ci				 "\tno hardware configuration dataset found in eeprom\n");
7928c2ecf20Sopenharmony_ci			kfree(data);
7938c2ecf20Sopenharmony_ci			return 0;
7948c2ecf20Sopenharmony_ci		}
7958c2ecf20Sopenharmony_ci
7968c2ecf20Sopenharmony_ci		/*
7978c2ecf20Sopenharmony_ci		 * TODO: decrypt eeprom data for camera bridges
7988c2ecf20Sopenharmony_ci		 * (em25xx, em276x+)
7998c2ecf20Sopenharmony_ci		 */
8008c2ecf20Sopenharmony_ci
8018c2ecf20Sopenharmony_ci	} else if (!dev->eeprom_addrwidth_16bit &&
8028c2ecf20Sopenharmony_ci		   data[0] == 0x1a && data[1] == 0xeb &&
8038c2ecf20Sopenharmony_ci		   data[2] == 0x67 && data[3] == 0x95) {
8048c2ecf20Sopenharmony_ci		dev->hash = em28xx_hash_mem(data, len, 32);
8058c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev,
8068c2ecf20Sopenharmony_ci			 "EEPROM ID = %4ph, EEPROM hash = 0x%08lx\n",
8078c2ecf20Sopenharmony_ci			 data, dev->hash);
8088c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev,
8098c2ecf20Sopenharmony_ci			 "EEPROM info:\n");
8108c2ecf20Sopenharmony_ci	} else {
8118c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev,
8128c2ecf20Sopenharmony_ci			 "unknown eeprom format or eeprom corrupted !\n");
8138c2ecf20Sopenharmony_ci		err = -ENODEV;
8148c2ecf20Sopenharmony_ci		goto error;
8158c2ecf20Sopenharmony_ci	}
8168c2ecf20Sopenharmony_ci
8178c2ecf20Sopenharmony_ci	*eedata = data;
8188c2ecf20Sopenharmony_ci	*eedata_len = len;
8198c2ecf20Sopenharmony_ci	dev_config = (void *)*eedata;
8208c2ecf20Sopenharmony_ci
8218c2ecf20Sopenharmony_ci	switch (le16_to_cpu(dev_config->chip_conf) >> 4 & 0x3) {
8228c2ecf20Sopenharmony_ci	case 0:
8238c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev, "\tNo audio on board.\n");
8248c2ecf20Sopenharmony_ci		break;
8258c2ecf20Sopenharmony_ci	case 1:
8268c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev, "\tAC97 audio (5 sample rates)\n");
8278c2ecf20Sopenharmony_ci		break;
8288c2ecf20Sopenharmony_ci	case 2:
8298c2ecf20Sopenharmony_ci		if (dev->chip_id < CHIP_ID_EM2860)
8308c2ecf20Sopenharmony_ci			dev_info(&dev->intf->dev,
8318c2ecf20Sopenharmony_ci				 "\tI2S audio, sample rate=32k\n");
8328c2ecf20Sopenharmony_ci		else
8338c2ecf20Sopenharmony_ci			dev_info(&dev->intf->dev,
8348c2ecf20Sopenharmony_ci				 "\tI2S audio, 3 sample rates\n");
8358c2ecf20Sopenharmony_ci		break;
8368c2ecf20Sopenharmony_ci	case 3:
8378c2ecf20Sopenharmony_ci		if (dev->chip_id < CHIP_ID_EM2860)
8388c2ecf20Sopenharmony_ci			dev_info(&dev->intf->dev,
8398c2ecf20Sopenharmony_ci				 "\tI2S audio, 3 sample rates\n");
8408c2ecf20Sopenharmony_ci		else
8418c2ecf20Sopenharmony_ci			dev_info(&dev->intf->dev,
8428c2ecf20Sopenharmony_ci				 "\tI2S audio, 5 sample rates\n");
8438c2ecf20Sopenharmony_ci		break;
8448c2ecf20Sopenharmony_ci	}
8458c2ecf20Sopenharmony_ci
8468c2ecf20Sopenharmony_ci	if (le16_to_cpu(dev_config->chip_conf) & 1 << 3)
8478c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev, "\tUSB Remote wakeup capable\n");
8488c2ecf20Sopenharmony_ci
8498c2ecf20Sopenharmony_ci	if (le16_to_cpu(dev_config->chip_conf) & 1 << 2)
8508c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev, "\tUSB Self power capable\n");
8518c2ecf20Sopenharmony_ci
8528c2ecf20Sopenharmony_ci	switch (le16_to_cpu(dev_config->chip_conf) & 0x3) {
8538c2ecf20Sopenharmony_ci	case 0:
8548c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev, "\t500mA max power\n");
8558c2ecf20Sopenharmony_ci		break;
8568c2ecf20Sopenharmony_ci	case 1:
8578c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev, "\t400mA max power\n");
8588c2ecf20Sopenharmony_ci		break;
8598c2ecf20Sopenharmony_ci	case 2:
8608c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev, "\t300mA max power\n");
8618c2ecf20Sopenharmony_ci		break;
8628c2ecf20Sopenharmony_ci	case 3:
8638c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev, "\t200mA max power\n");
8648c2ecf20Sopenharmony_ci		break;
8658c2ecf20Sopenharmony_ci	}
8668c2ecf20Sopenharmony_ci	dev_info(&dev->intf->dev,
8678c2ecf20Sopenharmony_ci		 "\tTable at offset 0x%02x, strings=0x%04x, 0x%04x, 0x%04x\n",
8688c2ecf20Sopenharmony_ci		 dev_config->string_idx_table,
8698c2ecf20Sopenharmony_ci		 le16_to_cpu(dev_config->string1),
8708c2ecf20Sopenharmony_ci		 le16_to_cpu(dev_config->string2),
8718c2ecf20Sopenharmony_ci		 le16_to_cpu(dev_config->string3));
8728c2ecf20Sopenharmony_ci
8738c2ecf20Sopenharmony_ci	return 0;
8748c2ecf20Sopenharmony_ci
8758c2ecf20Sopenharmony_cierror:
8768c2ecf20Sopenharmony_ci	kfree(data);
8778c2ecf20Sopenharmony_ci	return err;
8788c2ecf20Sopenharmony_ci}
8798c2ecf20Sopenharmony_ci
8808c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */
8818c2ecf20Sopenharmony_ci
8828c2ecf20Sopenharmony_ci/*
8838c2ecf20Sopenharmony_ci * functionality()
8848c2ecf20Sopenharmony_ci */
8858c2ecf20Sopenharmony_cistatic u32 functionality(struct i2c_adapter *i2c_adap)
8868c2ecf20Sopenharmony_ci{
8878c2ecf20Sopenharmony_ci	struct em28xx_i2c_bus *i2c_bus = i2c_adap->algo_data;
8888c2ecf20Sopenharmony_ci
8898c2ecf20Sopenharmony_ci	if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX ||
8908c2ecf20Sopenharmony_ci	    i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B) {
8918c2ecf20Sopenharmony_ci		return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
8928c2ecf20Sopenharmony_ci	} else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800)  {
8938c2ecf20Sopenharmony_ci		return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL) &
8948c2ecf20Sopenharmony_ci			~I2C_FUNC_SMBUS_WRITE_BLOCK_DATA;
8958c2ecf20Sopenharmony_ci	}
8968c2ecf20Sopenharmony_ci
8978c2ecf20Sopenharmony_ci	WARN(1, "Unknown i2c bus algorithm.\n");
8988c2ecf20Sopenharmony_ci	return 0;
8998c2ecf20Sopenharmony_ci}
9008c2ecf20Sopenharmony_ci
9018c2ecf20Sopenharmony_cistatic const struct i2c_algorithm em28xx_algo = {
9028c2ecf20Sopenharmony_ci	.master_xfer   = em28xx_i2c_xfer,
9038c2ecf20Sopenharmony_ci	.functionality = functionality,
9048c2ecf20Sopenharmony_ci};
9058c2ecf20Sopenharmony_ci
9068c2ecf20Sopenharmony_cistatic const struct i2c_adapter em28xx_adap_template = {
9078c2ecf20Sopenharmony_ci	.owner = THIS_MODULE,
9088c2ecf20Sopenharmony_ci	.name = "em28xx",
9098c2ecf20Sopenharmony_ci	.algo = &em28xx_algo,
9108c2ecf20Sopenharmony_ci};
9118c2ecf20Sopenharmony_ci
9128c2ecf20Sopenharmony_cistatic const struct i2c_client em28xx_client_template = {
9138c2ecf20Sopenharmony_ci	.name = "em28xx internal",
9148c2ecf20Sopenharmony_ci};
9158c2ecf20Sopenharmony_ci
9168c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */
9178c2ecf20Sopenharmony_ci
9188c2ecf20Sopenharmony_ci/*
9198c2ecf20Sopenharmony_ci * i2c_devs
9208c2ecf20Sopenharmony_ci * incomplete list of known devices
9218c2ecf20Sopenharmony_ci */
9228c2ecf20Sopenharmony_cistatic char *i2c_devs[128] = {
9238c2ecf20Sopenharmony_ci	[0x1c >> 1] = "lgdt330x",
9248c2ecf20Sopenharmony_ci	[0x3e >> 1] = "remote IR sensor",
9258c2ecf20Sopenharmony_ci	[0x4a >> 1] = "saa7113h",
9268c2ecf20Sopenharmony_ci	[0x52 >> 1] = "drxk",
9278c2ecf20Sopenharmony_ci	[0x60 >> 1] = "remote IR sensor",
9288c2ecf20Sopenharmony_ci	[0x8e >> 1] = "remote IR sensor",
9298c2ecf20Sopenharmony_ci	[0x86 >> 1] = "tda9887",
9308c2ecf20Sopenharmony_ci	[0x80 >> 1] = "msp34xx",
9318c2ecf20Sopenharmony_ci	[0x88 >> 1] = "msp34xx",
9328c2ecf20Sopenharmony_ci	[0xa0 >> 1] = "eeprom",
9338c2ecf20Sopenharmony_ci	[0xb0 >> 1] = "tda9874",
9348c2ecf20Sopenharmony_ci	[0xb8 >> 1] = "tvp5150a",
9358c2ecf20Sopenharmony_ci	[0xba >> 1] = "webcam sensor or tvp5150a",
9368c2ecf20Sopenharmony_ci	[0xc0 >> 1] = "tuner (analog)",
9378c2ecf20Sopenharmony_ci	[0xc2 >> 1] = "tuner (analog)",
9388c2ecf20Sopenharmony_ci	[0xc4 >> 1] = "tuner (analog)",
9398c2ecf20Sopenharmony_ci	[0xc6 >> 1] = "tuner (analog)",
9408c2ecf20Sopenharmony_ci};
9418c2ecf20Sopenharmony_ci
9428c2ecf20Sopenharmony_ci/*
9438c2ecf20Sopenharmony_ci * do_i2c_scan()
9448c2ecf20Sopenharmony_ci * check i2c address range for devices
9458c2ecf20Sopenharmony_ci */
9468c2ecf20Sopenharmony_civoid em28xx_do_i2c_scan(struct em28xx *dev, unsigned int bus)
9478c2ecf20Sopenharmony_ci{
9488c2ecf20Sopenharmony_ci	u8 i2c_devicelist[128];
9498c2ecf20Sopenharmony_ci	unsigned char buf;
9508c2ecf20Sopenharmony_ci	int i, rc;
9518c2ecf20Sopenharmony_ci
9528c2ecf20Sopenharmony_ci	memset(i2c_devicelist, 0, sizeof(i2c_devicelist));
9538c2ecf20Sopenharmony_ci
9548c2ecf20Sopenharmony_ci	for (i = 0; i < ARRAY_SIZE(i2c_devs); i++) {
9558c2ecf20Sopenharmony_ci		dev->i2c_client[bus].addr = i;
9568c2ecf20Sopenharmony_ci		rc = i2c_master_recv(&dev->i2c_client[bus], &buf, 0);
9578c2ecf20Sopenharmony_ci		if (rc < 0)
9588c2ecf20Sopenharmony_ci			continue;
9598c2ecf20Sopenharmony_ci		i2c_devicelist[i] = i;
9608c2ecf20Sopenharmony_ci		dev_info(&dev->intf->dev,
9618c2ecf20Sopenharmony_ci			 "found i2c device @ 0x%x on bus %d [%s]\n",
9628c2ecf20Sopenharmony_ci			 i << 1, bus, i2c_devs[i] ? i2c_devs[i] : "???");
9638c2ecf20Sopenharmony_ci	}
9648c2ecf20Sopenharmony_ci
9658c2ecf20Sopenharmony_ci	if (bus == dev->def_i2c_bus)
9668c2ecf20Sopenharmony_ci		dev->i2c_hash = em28xx_hash_mem(i2c_devicelist,
9678c2ecf20Sopenharmony_ci						sizeof(i2c_devicelist), 32);
9688c2ecf20Sopenharmony_ci}
9698c2ecf20Sopenharmony_ci
9708c2ecf20Sopenharmony_ci/*
9718c2ecf20Sopenharmony_ci * em28xx_i2c_register()
9728c2ecf20Sopenharmony_ci * register i2c bus
9738c2ecf20Sopenharmony_ci */
9748c2ecf20Sopenharmony_ciint em28xx_i2c_register(struct em28xx *dev, unsigned int bus,
9758c2ecf20Sopenharmony_ci			enum em28xx_i2c_algo_type algo_type)
9768c2ecf20Sopenharmony_ci{
9778c2ecf20Sopenharmony_ci	int retval;
9788c2ecf20Sopenharmony_ci
9798c2ecf20Sopenharmony_ci	if (WARN_ON(!dev->em28xx_write_regs || !dev->em28xx_read_reg ||
9808c2ecf20Sopenharmony_ci		    !dev->em28xx_write_regs_req || !dev->em28xx_read_reg_req))
9818c2ecf20Sopenharmony_ci		return -ENODEV;
9828c2ecf20Sopenharmony_ci
9838c2ecf20Sopenharmony_ci	if (bus >= NUM_I2C_BUSES)
9848c2ecf20Sopenharmony_ci		return -ENODEV;
9858c2ecf20Sopenharmony_ci
9868c2ecf20Sopenharmony_ci	dev->i2c_adap[bus] = em28xx_adap_template;
9878c2ecf20Sopenharmony_ci	dev->i2c_adap[bus].dev.parent = &dev->intf->dev;
9888c2ecf20Sopenharmony_ci	strscpy(dev->i2c_adap[bus].name, dev_name(&dev->intf->dev),
9898c2ecf20Sopenharmony_ci		sizeof(dev->i2c_adap[bus].name));
9908c2ecf20Sopenharmony_ci
9918c2ecf20Sopenharmony_ci	dev->i2c_bus[bus].bus = bus;
9928c2ecf20Sopenharmony_ci	dev->i2c_bus[bus].algo_type = algo_type;
9938c2ecf20Sopenharmony_ci	dev->i2c_bus[bus].dev = dev;
9948c2ecf20Sopenharmony_ci	dev->i2c_adap[bus].algo_data = &dev->i2c_bus[bus];
9958c2ecf20Sopenharmony_ci
9968c2ecf20Sopenharmony_ci	retval = i2c_add_adapter(&dev->i2c_adap[bus]);
9978c2ecf20Sopenharmony_ci	if (retval < 0) {
9988c2ecf20Sopenharmony_ci		dev_err(&dev->intf->dev,
9998c2ecf20Sopenharmony_ci			"%s: i2c_add_adapter failed! retval [%d]\n",
10008c2ecf20Sopenharmony_ci			__func__, retval);
10018c2ecf20Sopenharmony_ci		return retval;
10028c2ecf20Sopenharmony_ci	}
10038c2ecf20Sopenharmony_ci
10048c2ecf20Sopenharmony_ci	dev->i2c_client[bus] = em28xx_client_template;
10058c2ecf20Sopenharmony_ci	dev->i2c_client[bus].adapter = &dev->i2c_adap[bus];
10068c2ecf20Sopenharmony_ci
10078c2ecf20Sopenharmony_ci	/* Up to now, all eeproms are at bus 0 */
10088c2ecf20Sopenharmony_ci	if (!bus) {
10098c2ecf20Sopenharmony_ci		retval = em28xx_i2c_eeprom(dev, bus,
10108c2ecf20Sopenharmony_ci					   &dev->eedata, &dev->eedata_len);
10118c2ecf20Sopenharmony_ci		if (retval < 0 && retval != -ENODEV) {
10128c2ecf20Sopenharmony_ci			dev_err(&dev->intf->dev,
10138c2ecf20Sopenharmony_ci				"%s: em28xx_i2_eeprom failed! retval [%d]\n",
10148c2ecf20Sopenharmony_ci				__func__, retval);
10158c2ecf20Sopenharmony_ci		}
10168c2ecf20Sopenharmony_ci	}
10178c2ecf20Sopenharmony_ci
10188c2ecf20Sopenharmony_ci	if (i2c_scan)
10198c2ecf20Sopenharmony_ci		em28xx_do_i2c_scan(dev, bus);
10208c2ecf20Sopenharmony_ci
10218c2ecf20Sopenharmony_ci	return 0;
10228c2ecf20Sopenharmony_ci}
10238c2ecf20Sopenharmony_ci
10248c2ecf20Sopenharmony_ci/*
10258c2ecf20Sopenharmony_ci * em28xx_i2c_unregister()
10268c2ecf20Sopenharmony_ci * unregister i2c_bus
10278c2ecf20Sopenharmony_ci */
10288c2ecf20Sopenharmony_ciint em28xx_i2c_unregister(struct em28xx *dev, unsigned int bus)
10298c2ecf20Sopenharmony_ci{
10308c2ecf20Sopenharmony_ci	if (bus >= NUM_I2C_BUSES)
10318c2ecf20Sopenharmony_ci		return -ENODEV;
10328c2ecf20Sopenharmony_ci
10338c2ecf20Sopenharmony_ci	i2c_del_adapter(&dev->i2c_adap[bus]);
10348c2ecf20Sopenharmony_ci	return 0;
10358c2ecf20Sopenharmony_ci}
1036