18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Xilinx Video DMA 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2013-2015 Ideas on Board 68c2ecf20Sopenharmony_ci * Copyright (C) 2013-2015 Xilinx, Inc. 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * Contacts: Hyun Kwon <hyun.kwon@xilinx.com> 98c2ecf20Sopenharmony_ci * Laurent Pinchart <laurent.pinchart@ideasonboard.com> 108c2ecf20Sopenharmony_ci */ 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci#ifndef __XILINX_VIP_DMA_H__ 138c2ecf20Sopenharmony_ci#define __XILINX_VIP_DMA_H__ 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci#include <linux/dmaengine.h> 168c2ecf20Sopenharmony_ci#include <linux/mutex.h> 178c2ecf20Sopenharmony_ci#include <linux/spinlock.h> 188c2ecf20Sopenharmony_ci#include <linux/videodev2.h> 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci#include <media/media-entity.h> 218c2ecf20Sopenharmony_ci#include <media/v4l2-dev.h> 228c2ecf20Sopenharmony_ci#include <media/videobuf2-v4l2.h> 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_cistruct dma_chan; 258c2ecf20Sopenharmony_cistruct xvip_composite_device; 268c2ecf20Sopenharmony_cistruct xvip_video_format; 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci/** 298c2ecf20Sopenharmony_ci * struct xvip_pipeline - Xilinx Video IP pipeline structure 308c2ecf20Sopenharmony_ci * @pipe: media pipeline 318c2ecf20Sopenharmony_ci * @lock: protects the pipeline @stream_count 328c2ecf20Sopenharmony_ci * @use_count: number of DMA engines using the pipeline 338c2ecf20Sopenharmony_ci * @stream_count: number of DMA engines currently streaming 348c2ecf20Sopenharmony_ci * @num_dmas: number of DMA engines in the pipeline 358c2ecf20Sopenharmony_ci * @output: DMA engine at the output of the pipeline 368c2ecf20Sopenharmony_ci */ 378c2ecf20Sopenharmony_cistruct xvip_pipeline { 388c2ecf20Sopenharmony_ci struct media_pipeline pipe; 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci struct mutex lock; 418c2ecf20Sopenharmony_ci unsigned int use_count; 428c2ecf20Sopenharmony_ci unsigned int stream_count; 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ci unsigned int num_dmas; 458c2ecf20Sopenharmony_ci struct xvip_dma *output; 468c2ecf20Sopenharmony_ci}; 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_cistatic inline struct xvip_pipeline *to_xvip_pipeline(struct media_entity *e) 498c2ecf20Sopenharmony_ci{ 508c2ecf20Sopenharmony_ci return container_of(e->pipe, struct xvip_pipeline, pipe); 518c2ecf20Sopenharmony_ci} 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci/** 548c2ecf20Sopenharmony_ci * struct xvip_dma - Video DMA channel 558c2ecf20Sopenharmony_ci * @list: list entry in a composite device dmas list 568c2ecf20Sopenharmony_ci * @video: V4L2 video device associated with the DMA channel 578c2ecf20Sopenharmony_ci * @pad: media pad for the video device entity 588c2ecf20Sopenharmony_ci * @xdev: composite device the DMA channel belongs to 598c2ecf20Sopenharmony_ci * @pipe: pipeline belonging to the DMA channel 608c2ecf20Sopenharmony_ci * @port: composite device DT node port number for the DMA channel 618c2ecf20Sopenharmony_ci * @lock: protects the @format, @fmtinfo and @queue fields 628c2ecf20Sopenharmony_ci * @format: active V4L2 pixel format 638c2ecf20Sopenharmony_ci * @fmtinfo: format information corresponding to the active @format 648c2ecf20Sopenharmony_ci * @queue: vb2 buffers queue 658c2ecf20Sopenharmony_ci * @sequence: V4L2 buffers sequence number 668c2ecf20Sopenharmony_ci * @queued_bufs: list of queued buffers 678c2ecf20Sopenharmony_ci * @queued_lock: protects the buf_queued list 688c2ecf20Sopenharmony_ci * @dma: DMA engine channel 698c2ecf20Sopenharmony_ci * @align: transfer alignment required by the DMA channel (in bytes) 708c2ecf20Sopenharmony_ci * @xt: dma interleaved template for dma configuration 718c2ecf20Sopenharmony_ci * @sgl: data chunk structure for dma_interleaved_template 728c2ecf20Sopenharmony_ci */ 738c2ecf20Sopenharmony_cistruct xvip_dma { 748c2ecf20Sopenharmony_ci struct list_head list; 758c2ecf20Sopenharmony_ci struct video_device video; 768c2ecf20Sopenharmony_ci struct media_pad pad; 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ci struct xvip_composite_device *xdev; 798c2ecf20Sopenharmony_ci struct xvip_pipeline pipe; 808c2ecf20Sopenharmony_ci unsigned int port; 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci struct mutex lock; 838c2ecf20Sopenharmony_ci struct v4l2_pix_format format; 848c2ecf20Sopenharmony_ci const struct xvip_video_format *fmtinfo; 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ci struct vb2_queue queue; 878c2ecf20Sopenharmony_ci unsigned int sequence; 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ci struct list_head queued_bufs; 908c2ecf20Sopenharmony_ci spinlock_t queued_lock; 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci struct dma_chan *dma; 938c2ecf20Sopenharmony_ci unsigned int align; 948c2ecf20Sopenharmony_ci struct dma_interleaved_template xt; 958c2ecf20Sopenharmony_ci struct data_chunk sgl[1]; 968c2ecf20Sopenharmony_ci}; 978c2ecf20Sopenharmony_ci 988c2ecf20Sopenharmony_ci#define to_xvip_dma(vdev) container_of(vdev, struct xvip_dma, video) 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ciint xvip_dma_init(struct xvip_composite_device *xdev, struct xvip_dma *dma, 1018c2ecf20Sopenharmony_ci enum v4l2_buf_type type, unsigned int port); 1028c2ecf20Sopenharmony_civoid xvip_dma_cleanup(struct xvip_dma *dma); 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci#endif /* __XILINX_VIP_DMA_H__ */ 105