18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0+ */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * vsp1_drm.h  --  R-Car VSP1 DRM/KMS Interface
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (C) 2015 Renesas Electronics Corporation
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
88c2ecf20Sopenharmony_ci */
98c2ecf20Sopenharmony_ci#ifndef __VSP1_DRM_H__
108c2ecf20Sopenharmony_ci#define __VSP1_DRM_H__
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ci#include <linux/mutex.h>
138c2ecf20Sopenharmony_ci#include <linux/videodev2.h>
148c2ecf20Sopenharmony_ci#include <linux/wait.h>
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci#include <media/vsp1.h>
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci#include "vsp1_pipe.h"
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci/**
218c2ecf20Sopenharmony_ci * vsp1_drm_pipeline - State for the API exposed to the DRM driver
228c2ecf20Sopenharmony_ci * @pipe: the VSP1 pipeline used for display
238c2ecf20Sopenharmony_ci * @width: output display width
248c2ecf20Sopenharmony_ci * @height: output display height
258c2ecf20Sopenharmony_ci * @force_brx_release: when set, release the BRx during the next reconfiguration
268c2ecf20Sopenharmony_ci * @wait_queue: wait queue to wait for BRx release completion
278c2ecf20Sopenharmony_ci * @uif: UIF entity if available for the pipeline
288c2ecf20Sopenharmony_ci * @crc: CRC computation configuration
298c2ecf20Sopenharmony_ci * @du_complete: frame completion callback for the DU driver (optional)
308c2ecf20Sopenharmony_ci * @du_private: data to be passed to the du_complete callback
318c2ecf20Sopenharmony_ci */
328c2ecf20Sopenharmony_cistruct vsp1_drm_pipeline {
338c2ecf20Sopenharmony_ci	struct vsp1_pipeline pipe;
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci	unsigned int width;
368c2ecf20Sopenharmony_ci	unsigned int height;
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci	bool force_brx_release;
398c2ecf20Sopenharmony_ci	wait_queue_head_t wait_queue;
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci	struct vsp1_entity *uif;
428c2ecf20Sopenharmony_ci	struct vsp1_du_crc_config crc;
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci	/* Frame synchronisation */
458c2ecf20Sopenharmony_ci	void (*du_complete)(void *data, unsigned int status, u32 crc);
468c2ecf20Sopenharmony_ci	void *du_private;
478c2ecf20Sopenharmony_ci};
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci/**
508c2ecf20Sopenharmony_ci * vsp1_drm - State for the API exposed to the DRM driver
518c2ecf20Sopenharmony_ci * @pipe: the VSP1 DRM pipeline used for display
528c2ecf20Sopenharmony_ci * @lock: protects the BRU and BRS allocation
538c2ecf20Sopenharmony_ci * @inputs: source crop rectangle, destination compose rectangle and z-order
548c2ecf20Sopenharmony_ci *	position for every input (indexed by RPF index)
558c2ecf20Sopenharmony_ci */
568c2ecf20Sopenharmony_cistruct vsp1_drm {
578c2ecf20Sopenharmony_ci	struct vsp1_drm_pipeline pipe[VSP1_MAX_LIF];
588c2ecf20Sopenharmony_ci	struct mutex lock;
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci	struct {
618c2ecf20Sopenharmony_ci		struct v4l2_rect crop;
628c2ecf20Sopenharmony_ci		struct v4l2_rect compose;
638c2ecf20Sopenharmony_ci		unsigned int zpos;
648c2ecf20Sopenharmony_ci	} inputs[VSP1_MAX_RPF];
658c2ecf20Sopenharmony_ci};
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_cistatic inline struct vsp1_drm_pipeline *
688c2ecf20Sopenharmony_cito_vsp1_drm_pipeline(struct vsp1_pipeline *pipe)
698c2ecf20Sopenharmony_ci{
708c2ecf20Sopenharmony_ci	return container_of(pipe, struct vsp1_drm_pipeline, pipe);
718c2ecf20Sopenharmony_ci}
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ciint vsp1_drm_init(struct vsp1_device *vsp1);
748c2ecf20Sopenharmony_civoid vsp1_drm_cleanup(struct vsp1_device *vsp1);
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci#endif /* __VSP1_DRM_H__ */
77