18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
48c2ecf20Sopenharmony_ci * Author: Jacob Chen <jacob-chen@iotwrt.com>
58c2ecf20Sopenharmony_ci */
68c2ecf20Sopenharmony_ci#ifndef __RGA_H__
78c2ecf20Sopenharmony_ci#define __RGA_H__
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
108c2ecf20Sopenharmony_ci#include <media/videobuf2-v4l2.h>
118c2ecf20Sopenharmony_ci#include <media/v4l2-ctrls.h>
128c2ecf20Sopenharmony_ci#include <media/v4l2-device.h>
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci#define RGA_NAME "rockchip-rga"
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_cistruct rga_fmt {
178c2ecf20Sopenharmony_ci	u32 fourcc;
188c2ecf20Sopenharmony_ci	int depth;
198c2ecf20Sopenharmony_ci	u8 uv_factor;
208c2ecf20Sopenharmony_ci	u8 y_div;
218c2ecf20Sopenharmony_ci	u8 x_div;
228c2ecf20Sopenharmony_ci	u8 color_swap;
238c2ecf20Sopenharmony_ci	u8 hw_format;
248c2ecf20Sopenharmony_ci};
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_cistruct rga_frame {
278c2ecf20Sopenharmony_ci	/* Original dimensions */
288c2ecf20Sopenharmony_ci	u32 width;
298c2ecf20Sopenharmony_ci	u32 height;
308c2ecf20Sopenharmony_ci	u32 colorspace;
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci	/* Crop */
338c2ecf20Sopenharmony_ci	struct v4l2_rect crop;
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci	/* Image format */
368c2ecf20Sopenharmony_ci	struct rga_fmt *fmt;
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci	/* Variables that can calculated once and reused */
398c2ecf20Sopenharmony_ci	u32 stride;
408c2ecf20Sopenharmony_ci	u32 size;
418c2ecf20Sopenharmony_ci};
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_cistruct rockchip_rga_version {
448c2ecf20Sopenharmony_ci	u32 major;
458c2ecf20Sopenharmony_ci	u32 minor;
468c2ecf20Sopenharmony_ci};
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_cistruct rga_ctx {
498c2ecf20Sopenharmony_ci	struct v4l2_fh fh;
508c2ecf20Sopenharmony_ci	struct rockchip_rga *rga;
518c2ecf20Sopenharmony_ci	struct rga_frame in;
528c2ecf20Sopenharmony_ci	struct rga_frame out;
538c2ecf20Sopenharmony_ci	struct v4l2_ctrl_handler ctrl_handler;
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci	/* Control values */
568c2ecf20Sopenharmony_ci	u32 op;
578c2ecf20Sopenharmony_ci	u32 hflip;
588c2ecf20Sopenharmony_ci	u32 vflip;
598c2ecf20Sopenharmony_ci	u32 rotate;
608c2ecf20Sopenharmony_ci	u32 fill_color;
618c2ecf20Sopenharmony_ci};
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_cistruct rockchip_rga {
648c2ecf20Sopenharmony_ci	struct v4l2_device v4l2_dev;
658c2ecf20Sopenharmony_ci	struct v4l2_m2m_dev *m2m_dev;
668c2ecf20Sopenharmony_ci	struct video_device *vfd;
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci	struct device *dev;
698c2ecf20Sopenharmony_ci	struct regmap *grf;
708c2ecf20Sopenharmony_ci	void __iomem *regs;
718c2ecf20Sopenharmony_ci	struct clk *sclk;
728c2ecf20Sopenharmony_ci	struct clk *aclk;
738c2ecf20Sopenharmony_ci	struct clk *hclk;
748c2ecf20Sopenharmony_ci	struct rockchip_rga_version version;
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci	/* vfd lock */
778c2ecf20Sopenharmony_ci	struct mutex mutex;
788c2ecf20Sopenharmony_ci	/* ctrl parm lock */
798c2ecf20Sopenharmony_ci	spinlock_t ctrl_lock;
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci	struct rga_ctx *curr;
828c2ecf20Sopenharmony_ci	dma_addr_t cmdbuf_phy;
838c2ecf20Sopenharmony_ci	void *cmdbuf_virt;
848c2ecf20Sopenharmony_ci	unsigned int *src_mmu_pages;
858c2ecf20Sopenharmony_ci	unsigned int *dst_mmu_pages;
868c2ecf20Sopenharmony_ci};
878c2ecf20Sopenharmony_ci
888c2ecf20Sopenharmony_cistruct rga_frame *rga_get_frame(struct rga_ctx *ctx, enum v4l2_buf_type type);
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci/* RGA Buffers Manage */
918c2ecf20Sopenharmony_ciextern const struct vb2_ops rga_qops;
928c2ecf20Sopenharmony_civoid rga_buf_map(struct vb2_buffer *vb);
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_ci/* RGA Hardware */
958c2ecf20Sopenharmony_cistatic inline void rga_write(struct rockchip_rga *rga, u32 reg, u32 value)
968c2ecf20Sopenharmony_ci{
978c2ecf20Sopenharmony_ci	writel(value, rga->regs + reg);
988c2ecf20Sopenharmony_ci};
998c2ecf20Sopenharmony_ci
1008c2ecf20Sopenharmony_cistatic inline u32 rga_read(struct rockchip_rga *rga, u32 reg)
1018c2ecf20Sopenharmony_ci{
1028c2ecf20Sopenharmony_ci	return readl(rga->regs + reg);
1038c2ecf20Sopenharmony_ci};
1048c2ecf20Sopenharmony_ci
1058c2ecf20Sopenharmony_cistatic inline void rga_mod(struct rockchip_rga *rga, u32 reg, u32 val, u32 mask)
1068c2ecf20Sopenharmony_ci{
1078c2ecf20Sopenharmony_ci	u32 temp = rga_read(rga, reg) & ~(mask);
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci	temp |= val & mask;
1108c2ecf20Sopenharmony_ci	rga_write(rga, reg, temp);
1118c2ecf20Sopenharmony_ci};
1128c2ecf20Sopenharmony_ci
1138c2ecf20Sopenharmony_civoid rga_hw_start(struct rockchip_rga *rga);
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci#endif
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