18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Driver for the Conexant CX23885 PCIe bridge 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org> 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#include <linux/pci.h> 118c2ecf20Sopenharmony_ci#include <linux/i2c.h> 128c2ecf20Sopenharmony_ci#include <linux/kdev_t.h> 138c2ecf20Sopenharmony_ci#include <linux/slab.h> 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci#include <media/v4l2-device.h> 168c2ecf20Sopenharmony_ci#include <media/v4l2-fh.h> 178c2ecf20Sopenharmony_ci#include <media/v4l2-ctrls.h> 188c2ecf20Sopenharmony_ci#include <media/tuner.h> 198c2ecf20Sopenharmony_ci#include <media/tveeprom.h> 208c2ecf20Sopenharmony_ci#include <media/videobuf2-dma-sg.h> 218c2ecf20Sopenharmony_ci#include <media/videobuf2-dvb.h> 228c2ecf20Sopenharmony_ci#include <media/rc-core.h> 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci#include "cx23885-reg.h" 258c2ecf20Sopenharmony_ci#include "media/drv-intf/cx2341x.h" 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci#include <linux/mutex.h> 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci#define CX23885_VERSION "0.0.4" 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci#define UNSET (-1U) 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#define CX23885_MAXBOARDS 8 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci/* Max number of inputs by card */ 368c2ecf20Sopenharmony_ci#define MAX_CX23885_INPUT 8 378c2ecf20Sopenharmony_ci#define INPUT(nr) (&cx23885_boards[dev->board].input[nr]) 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci#define BUFFER_TIMEOUT (HZ) /* 0.5 seconds */ 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci#define CX23885_BOARD_NOAUTO UNSET 428c2ecf20Sopenharmony_ci#define CX23885_BOARD_UNKNOWN 0 438c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1800lp 1 448c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1800 2 458c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1250 3 468c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP 4 478c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1500Q 5 488c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1500 6 498c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1200 7 508c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1700 8 518c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1400 9 528c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP 10 538c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP 11 548c2ecf20Sopenharmony_ci#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H 12 558c2ecf20Sopenharmony_ci#define CX23885_BOARD_COMPRO_VIDEOMATE_E650F 13 568c2ecf20Sopenharmony_ci#define CX23885_BOARD_TBS_6920 14 578c2ecf20Sopenharmony_ci#define CX23885_BOARD_TEVII_S470 15 588c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVBWORLD_2005 16 598c2ecf20Sopenharmony_ci#define CX23885_BOARD_NETUP_DUAL_DVBS2_CI 17 608c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1270 18 618c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1275 19 628c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1255 20 638c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1210 21 648c2ecf20Sopenharmony_ci#define CX23885_BOARD_MYGICA_X8506 22 658c2ecf20Sopenharmony_ci#define CX23885_BOARD_MAGICPRO_PROHDTVE2 23 668c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1850 24 678c2ecf20Sopenharmony_ci#define CX23885_BOARD_COMPRO_VIDEOMATE_E800 25 688c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1290 26 698c2ecf20Sopenharmony_ci#define CX23885_BOARD_MYGICA_X8558PRO 27 708c2ecf20Sopenharmony_ci#define CX23885_BOARD_LEADTEK_WINFAST_PXTV1200 28 718c2ecf20Sopenharmony_ci#define CX23885_BOARD_GOTVIEW_X5_3D_HYBRID 29 728c2ecf20Sopenharmony_ci#define CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF 30 738c2ecf20Sopenharmony_ci#define CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H_XC4000 31 748c2ecf20Sopenharmony_ci#define CX23885_BOARD_MPX885 32 758c2ecf20Sopenharmony_ci#define CX23885_BOARD_MYGICA_X8507 33 768c2ecf20Sopenharmony_ci#define CX23885_BOARD_TERRATEC_CINERGY_T_PCIE_DUAL 34 778c2ecf20Sopenharmony_ci#define CX23885_BOARD_TEVII_S471 35 788c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1255_22111 36 798c2ecf20Sopenharmony_ci#define CX23885_BOARD_PROF_8000 37 808c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR4400 38 818c2ecf20Sopenharmony_ci#define CX23885_BOARD_AVERMEDIA_HC81R 39 828c2ecf20Sopenharmony_ci#define CX23885_BOARD_TBS_6981 40 838c2ecf20Sopenharmony_ci#define CX23885_BOARD_TBS_6980 41 848c2ecf20Sopenharmony_ci#define CX23885_BOARD_LEADTEK_WINFAST_PXPVR2200 42 858c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_IMPACTVCBE 43 868c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP2 44 878c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVBSKY_T9580 45 888c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVBSKY_T980C 46 898c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVBSKY_S950C 47 908c2ecf20Sopenharmony_ci#define CX23885_BOARD_TT_CT2_4500_CI 48 918c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVBSKY_S950 49 928c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVBSKY_S952 50 938c2ecf20Sopenharmony_ci#define CX23885_BOARD_DVBSKY_T982 51 948c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR5525 52 958c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_STARBURST 53 968c2ecf20Sopenharmony_ci#define CX23885_BOARD_VIEWCAST_260E 54 978c2ecf20Sopenharmony_ci#define CX23885_BOARD_VIEWCAST_460E 55 988c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB 56 998c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC 57 1008c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_HVR1265_K4 58 1018c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_STARBURST2 59 1028c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_QUADHD_DVB_885 60 1038c2ecf20Sopenharmony_ci#define CX23885_BOARD_HAUPPAUGE_QUADHD_ATSC_885 61 1048c2ecf20Sopenharmony_ci#define CX23885_BOARD_AVERMEDIA_CE310B 62 1058c2ecf20Sopenharmony_ci 1068c2ecf20Sopenharmony_ci#define GPIO_0 0x00000001 1078c2ecf20Sopenharmony_ci#define GPIO_1 0x00000002 1088c2ecf20Sopenharmony_ci#define GPIO_2 0x00000004 1098c2ecf20Sopenharmony_ci#define GPIO_3 0x00000008 1108c2ecf20Sopenharmony_ci#define GPIO_4 0x00000010 1118c2ecf20Sopenharmony_ci#define GPIO_5 0x00000020 1128c2ecf20Sopenharmony_ci#define GPIO_6 0x00000040 1138c2ecf20Sopenharmony_ci#define GPIO_7 0x00000080 1148c2ecf20Sopenharmony_ci#define GPIO_8 0x00000100 1158c2ecf20Sopenharmony_ci#define GPIO_9 0x00000200 1168c2ecf20Sopenharmony_ci#define GPIO_10 0x00000400 1178c2ecf20Sopenharmony_ci#define GPIO_11 0x00000800 1188c2ecf20Sopenharmony_ci#define GPIO_12 0x00001000 1198c2ecf20Sopenharmony_ci#define GPIO_13 0x00002000 1208c2ecf20Sopenharmony_ci#define GPIO_14 0x00004000 1218c2ecf20Sopenharmony_ci#define GPIO_15 0x00008000 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ci/* Currently unsupported by the driver: PAL/H, NTSC/Kr, SECAM B/G/H/LC */ 1248c2ecf20Sopenharmony_ci#define CX23885_NORMS (\ 1258c2ecf20Sopenharmony_ci V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ 1268c2ecf20Sopenharmony_ci V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ 1278c2ecf20Sopenharmony_ci V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ 1288c2ecf20Sopenharmony_ci V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_cistruct cx23885_fmt { 1318c2ecf20Sopenharmony_ci u32 fourcc; /* v4l2 format id */ 1328c2ecf20Sopenharmony_ci int depth; 1338c2ecf20Sopenharmony_ci int flags; 1348c2ecf20Sopenharmony_ci u32 cxformat; 1358c2ecf20Sopenharmony_ci}; 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_cistruct cx23885_tvnorm { 1388c2ecf20Sopenharmony_ci char *name; 1398c2ecf20Sopenharmony_ci v4l2_std_id id; 1408c2ecf20Sopenharmony_ci u32 cxiformat; 1418c2ecf20Sopenharmony_ci u32 cxoformat; 1428c2ecf20Sopenharmony_ci}; 1438c2ecf20Sopenharmony_ci 1448c2ecf20Sopenharmony_cienum cx23885_itype { 1458c2ecf20Sopenharmony_ci CX23885_VMUX_COMPOSITE1 = 1, 1468c2ecf20Sopenharmony_ci CX23885_VMUX_COMPOSITE2, 1478c2ecf20Sopenharmony_ci CX23885_VMUX_COMPOSITE3, 1488c2ecf20Sopenharmony_ci CX23885_VMUX_COMPOSITE4, 1498c2ecf20Sopenharmony_ci CX23885_VMUX_SVIDEO, 1508c2ecf20Sopenharmony_ci CX23885_VMUX_COMPONENT, 1518c2ecf20Sopenharmony_ci CX23885_VMUX_TELEVISION, 1528c2ecf20Sopenharmony_ci CX23885_VMUX_CABLE, 1538c2ecf20Sopenharmony_ci CX23885_VMUX_DVB, 1548c2ecf20Sopenharmony_ci CX23885_VMUX_DEBUG, 1558c2ecf20Sopenharmony_ci CX23885_RADIO, 1568c2ecf20Sopenharmony_ci}; 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_cienum cx23885_src_sel_type { 1598c2ecf20Sopenharmony_ci CX23885_SRC_SEL_EXT_656_VIDEO = 0, 1608c2ecf20Sopenharmony_ci CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO 1618c2ecf20Sopenharmony_ci}; 1628c2ecf20Sopenharmony_ci 1638c2ecf20Sopenharmony_cistruct cx23885_riscmem { 1648c2ecf20Sopenharmony_ci unsigned int size; 1658c2ecf20Sopenharmony_ci __le32 *cpu; 1668c2ecf20Sopenharmony_ci __le32 *jmp; 1678c2ecf20Sopenharmony_ci dma_addr_t dma; 1688c2ecf20Sopenharmony_ci}; 1698c2ecf20Sopenharmony_ci 1708c2ecf20Sopenharmony_ci/* buffer for one video frame */ 1718c2ecf20Sopenharmony_cistruct cx23885_buffer { 1728c2ecf20Sopenharmony_ci /* common v4l buffer stuff -- must be first */ 1738c2ecf20Sopenharmony_ci struct vb2_v4l2_buffer vb; 1748c2ecf20Sopenharmony_ci struct list_head queue; 1758c2ecf20Sopenharmony_ci 1768c2ecf20Sopenharmony_ci /* cx23885 specific */ 1778c2ecf20Sopenharmony_ci unsigned int bpl; 1788c2ecf20Sopenharmony_ci struct cx23885_riscmem risc; 1798c2ecf20Sopenharmony_ci struct cx23885_fmt *fmt; 1808c2ecf20Sopenharmony_ci u32 count; 1818c2ecf20Sopenharmony_ci}; 1828c2ecf20Sopenharmony_ci 1838c2ecf20Sopenharmony_cistruct cx23885_input { 1848c2ecf20Sopenharmony_ci enum cx23885_itype type; 1858c2ecf20Sopenharmony_ci unsigned int vmux; 1868c2ecf20Sopenharmony_ci unsigned int amux; 1878c2ecf20Sopenharmony_ci u32 gpio0, gpio1, gpio2, gpio3; 1888c2ecf20Sopenharmony_ci}; 1898c2ecf20Sopenharmony_ci 1908c2ecf20Sopenharmony_citypedef enum { 1918c2ecf20Sopenharmony_ci CX23885_MPEG_UNDEFINED = 0, 1928c2ecf20Sopenharmony_ci CX23885_MPEG_DVB, 1938c2ecf20Sopenharmony_ci CX23885_ANALOG_VIDEO, 1948c2ecf20Sopenharmony_ci CX23885_MPEG_ENCODER, 1958c2ecf20Sopenharmony_ci} port_t; 1968c2ecf20Sopenharmony_ci 1978c2ecf20Sopenharmony_cistruct cx23885_board { 1988c2ecf20Sopenharmony_ci char *name; 1998c2ecf20Sopenharmony_ci port_t porta, portb, portc; 2008c2ecf20Sopenharmony_ci int num_fds_portb, num_fds_portc; 2018c2ecf20Sopenharmony_ci unsigned int tuner_type; 2028c2ecf20Sopenharmony_ci unsigned int radio_type; 2038c2ecf20Sopenharmony_ci unsigned char tuner_addr; 2048c2ecf20Sopenharmony_ci unsigned char radio_addr; 2058c2ecf20Sopenharmony_ci unsigned int tuner_bus; 2068c2ecf20Sopenharmony_ci 2078c2ecf20Sopenharmony_ci /* Vendors can and do run the PCIe bridge at different 2088c2ecf20Sopenharmony_ci * clock rates, driven physically by crystals on the PCBs. 2098c2ecf20Sopenharmony_ci * The core has to accommodate this. This allows the user 2108c2ecf20Sopenharmony_ci * to add new boards with new frequencys. The value is 2118c2ecf20Sopenharmony_ci * expressed in Hz. 2128c2ecf20Sopenharmony_ci * 2138c2ecf20Sopenharmony_ci * The core framework will default this value based on 2148c2ecf20Sopenharmony_ci * current designs, but it can vary. 2158c2ecf20Sopenharmony_ci */ 2168c2ecf20Sopenharmony_ci u32 clk_freq; 2178c2ecf20Sopenharmony_ci struct cx23885_input input[MAX_CX23885_INPUT]; 2188c2ecf20Sopenharmony_ci int ci_type; /* for NetUP */ 2198c2ecf20Sopenharmony_ci /* Force bottom field first during DMA (888 workaround) */ 2208c2ecf20Sopenharmony_ci u32 force_bff; 2218c2ecf20Sopenharmony_ci}; 2228c2ecf20Sopenharmony_ci 2238c2ecf20Sopenharmony_cistruct cx23885_subid { 2248c2ecf20Sopenharmony_ci u16 subvendor; 2258c2ecf20Sopenharmony_ci u16 subdevice; 2268c2ecf20Sopenharmony_ci u32 card; 2278c2ecf20Sopenharmony_ci}; 2288c2ecf20Sopenharmony_ci 2298c2ecf20Sopenharmony_cistruct cx23885_i2c { 2308c2ecf20Sopenharmony_ci struct cx23885_dev *dev; 2318c2ecf20Sopenharmony_ci 2328c2ecf20Sopenharmony_ci int nr; 2338c2ecf20Sopenharmony_ci 2348c2ecf20Sopenharmony_ci /* i2c i/o */ 2358c2ecf20Sopenharmony_ci struct i2c_adapter i2c_adap; 2368c2ecf20Sopenharmony_ci struct i2c_client i2c_client; 2378c2ecf20Sopenharmony_ci u32 i2c_rc; 2388c2ecf20Sopenharmony_ci 2398c2ecf20Sopenharmony_ci /* 885 registers used for raw address */ 2408c2ecf20Sopenharmony_ci u32 i2c_period; 2418c2ecf20Sopenharmony_ci u32 reg_ctrl; 2428c2ecf20Sopenharmony_ci u32 reg_stat; 2438c2ecf20Sopenharmony_ci u32 reg_addr; 2448c2ecf20Sopenharmony_ci u32 reg_rdata; 2458c2ecf20Sopenharmony_ci u32 reg_wdata; 2468c2ecf20Sopenharmony_ci}; 2478c2ecf20Sopenharmony_ci 2488c2ecf20Sopenharmony_cistruct cx23885_dmaqueue { 2498c2ecf20Sopenharmony_ci struct list_head active; 2508c2ecf20Sopenharmony_ci u32 count; 2518c2ecf20Sopenharmony_ci}; 2528c2ecf20Sopenharmony_ci 2538c2ecf20Sopenharmony_cistruct cx23885_tsport { 2548c2ecf20Sopenharmony_ci struct cx23885_dev *dev; 2558c2ecf20Sopenharmony_ci 2568c2ecf20Sopenharmony_ci unsigned nr; 2578c2ecf20Sopenharmony_ci int sram_chno; 2588c2ecf20Sopenharmony_ci 2598c2ecf20Sopenharmony_ci struct vb2_dvb_frontends frontends; 2608c2ecf20Sopenharmony_ci 2618c2ecf20Sopenharmony_ci /* dma queues */ 2628c2ecf20Sopenharmony_ci struct cx23885_dmaqueue mpegq; 2638c2ecf20Sopenharmony_ci u32 ts_packet_size; 2648c2ecf20Sopenharmony_ci u32 ts_packet_count; 2658c2ecf20Sopenharmony_ci 2668c2ecf20Sopenharmony_ci int width; 2678c2ecf20Sopenharmony_ci int height; 2688c2ecf20Sopenharmony_ci 2698c2ecf20Sopenharmony_ci spinlock_t slock; 2708c2ecf20Sopenharmony_ci 2718c2ecf20Sopenharmony_ci /* registers */ 2728c2ecf20Sopenharmony_ci u32 reg_gpcnt; 2738c2ecf20Sopenharmony_ci u32 reg_gpcnt_ctl; 2748c2ecf20Sopenharmony_ci u32 reg_dma_ctl; 2758c2ecf20Sopenharmony_ci u32 reg_lngth; 2768c2ecf20Sopenharmony_ci u32 reg_hw_sop_ctrl; 2778c2ecf20Sopenharmony_ci u32 reg_gen_ctrl; 2788c2ecf20Sopenharmony_ci u32 reg_bd_pkt_status; 2798c2ecf20Sopenharmony_ci u32 reg_sop_status; 2808c2ecf20Sopenharmony_ci u32 reg_fifo_ovfl_stat; 2818c2ecf20Sopenharmony_ci u32 reg_vld_misc; 2828c2ecf20Sopenharmony_ci u32 reg_ts_clk_en; 2838c2ecf20Sopenharmony_ci u32 reg_ts_int_msk; 2848c2ecf20Sopenharmony_ci u32 reg_ts_int_stat; 2858c2ecf20Sopenharmony_ci u32 reg_src_sel; 2868c2ecf20Sopenharmony_ci 2878c2ecf20Sopenharmony_ci /* Default register vals */ 2888c2ecf20Sopenharmony_ci int pci_irqmask; 2898c2ecf20Sopenharmony_ci u32 dma_ctl_val; 2908c2ecf20Sopenharmony_ci u32 ts_int_msk_val; 2918c2ecf20Sopenharmony_ci u32 gen_ctrl_val; 2928c2ecf20Sopenharmony_ci u32 ts_clk_en_val; 2938c2ecf20Sopenharmony_ci u32 src_sel_val; 2948c2ecf20Sopenharmony_ci u32 vld_misc_val; 2958c2ecf20Sopenharmony_ci u32 hw_sop_ctrl_val; 2968c2ecf20Sopenharmony_ci 2978c2ecf20Sopenharmony_ci /* Allow a single tsport to have multiple frontends */ 2988c2ecf20Sopenharmony_ci u32 num_frontends; 2998c2ecf20Sopenharmony_ci void (*gate_ctrl)(struct cx23885_tsport *port, int open); 3008c2ecf20Sopenharmony_ci void *port_priv; 3018c2ecf20Sopenharmony_ci 3028c2ecf20Sopenharmony_ci /* Workaround for a temp dvb_frontend that the tuner can attached to */ 3038c2ecf20Sopenharmony_ci struct dvb_frontend analog_fe; 3048c2ecf20Sopenharmony_ci 3058c2ecf20Sopenharmony_ci struct i2c_client *i2c_client_demod; 3068c2ecf20Sopenharmony_ci struct i2c_client *i2c_client_tuner; 3078c2ecf20Sopenharmony_ci struct i2c_client *i2c_client_sec; 3088c2ecf20Sopenharmony_ci struct i2c_client *i2c_client_ci; 3098c2ecf20Sopenharmony_ci 3108c2ecf20Sopenharmony_ci int (*set_frontend)(struct dvb_frontend *fe); 3118c2ecf20Sopenharmony_ci int (*fe_set_voltage)(struct dvb_frontend *fe, 3128c2ecf20Sopenharmony_ci enum fe_sec_voltage voltage); 3138c2ecf20Sopenharmony_ci}; 3148c2ecf20Sopenharmony_ci 3158c2ecf20Sopenharmony_cistruct cx23885_kernel_ir { 3168c2ecf20Sopenharmony_ci struct cx23885_dev *cx; 3178c2ecf20Sopenharmony_ci char *name; 3188c2ecf20Sopenharmony_ci char *phys; 3198c2ecf20Sopenharmony_ci 3208c2ecf20Sopenharmony_ci struct rc_dev *rc; 3218c2ecf20Sopenharmony_ci}; 3228c2ecf20Sopenharmony_ci 3238c2ecf20Sopenharmony_cistruct cx23885_audio_buffer { 3248c2ecf20Sopenharmony_ci unsigned int bpl; 3258c2ecf20Sopenharmony_ci struct cx23885_riscmem risc; 3268c2ecf20Sopenharmony_ci void *vaddr; 3278c2ecf20Sopenharmony_ci struct scatterlist *sglist; 3288c2ecf20Sopenharmony_ci int sglen; 3298c2ecf20Sopenharmony_ci unsigned long nr_pages; 3308c2ecf20Sopenharmony_ci}; 3318c2ecf20Sopenharmony_ci 3328c2ecf20Sopenharmony_cistruct cx23885_audio_dev { 3338c2ecf20Sopenharmony_ci struct cx23885_dev *dev; 3348c2ecf20Sopenharmony_ci 3358c2ecf20Sopenharmony_ci struct pci_dev *pci; 3368c2ecf20Sopenharmony_ci 3378c2ecf20Sopenharmony_ci struct snd_card *card; 3388c2ecf20Sopenharmony_ci 3398c2ecf20Sopenharmony_ci spinlock_t lock; 3408c2ecf20Sopenharmony_ci 3418c2ecf20Sopenharmony_ci atomic_t count; 3428c2ecf20Sopenharmony_ci 3438c2ecf20Sopenharmony_ci unsigned int dma_size; 3448c2ecf20Sopenharmony_ci unsigned int period_size; 3458c2ecf20Sopenharmony_ci unsigned int num_periods; 3468c2ecf20Sopenharmony_ci 3478c2ecf20Sopenharmony_ci struct cx23885_audio_buffer *buf; 3488c2ecf20Sopenharmony_ci 3498c2ecf20Sopenharmony_ci struct snd_pcm_substream *substream; 3508c2ecf20Sopenharmony_ci}; 3518c2ecf20Sopenharmony_ci 3528c2ecf20Sopenharmony_cistruct cx23885_dev { 3538c2ecf20Sopenharmony_ci atomic_t refcount; 3548c2ecf20Sopenharmony_ci struct v4l2_device v4l2_dev; 3558c2ecf20Sopenharmony_ci struct v4l2_ctrl_handler ctrl_handler; 3568c2ecf20Sopenharmony_ci 3578c2ecf20Sopenharmony_ci /* pci stuff */ 3588c2ecf20Sopenharmony_ci struct pci_dev *pci; 3598c2ecf20Sopenharmony_ci unsigned char pci_rev, pci_lat; 3608c2ecf20Sopenharmony_ci int pci_bus, pci_slot; 3618c2ecf20Sopenharmony_ci u32 __iomem *lmmio; 3628c2ecf20Sopenharmony_ci u8 __iomem *bmmio; 3638c2ecf20Sopenharmony_ci int pci_irqmask; 3648c2ecf20Sopenharmony_ci spinlock_t pci_irqmask_lock; /* protects mask reg too */ 3658c2ecf20Sopenharmony_ci int hwrevision; 3668c2ecf20Sopenharmony_ci 3678c2ecf20Sopenharmony_ci /* This valud is board specific and is used to configure the 3688c2ecf20Sopenharmony_ci * AV core so we see nice clean and stable video and audio. */ 3698c2ecf20Sopenharmony_ci u32 clk_freq; 3708c2ecf20Sopenharmony_ci 3718c2ecf20Sopenharmony_ci /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ 3728c2ecf20Sopenharmony_ci struct cx23885_i2c i2c_bus[3]; 3738c2ecf20Sopenharmony_ci 3748c2ecf20Sopenharmony_ci int nr; 3758c2ecf20Sopenharmony_ci struct mutex lock; 3768c2ecf20Sopenharmony_ci struct mutex gpio_lock; 3778c2ecf20Sopenharmony_ci 3788c2ecf20Sopenharmony_ci /* board details */ 3798c2ecf20Sopenharmony_ci unsigned int board; 3808c2ecf20Sopenharmony_ci char name[32]; 3818c2ecf20Sopenharmony_ci 3828c2ecf20Sopenharmony_ci struct cx23885_tsport ts1, ts2; 3838c2ecf20Sopenharmony_ci 3848c2ecf20Sopenharmony_ci /* sram configuration */ 3858c2ecf20Sopenharmony_ci struct sram_channel *sram_channels; 3868c2ecf20Sopenharmony_ci 3878c2ecf20Sopenharmony_ci enum { 3888c2ecf20Sopenharmony_ci CX23885_BRIDGE_UNDEFINED = 0, 3898c2ecf20Sopenharmony_ci CX23885_BRIDGE_885 = 885, 3908c2ecf20Sopenharmony_ci CX23885_BRIDGE_887 = 887, 3918c2ecf20Sopenharmony_ci CX23885_BRIDGE_888 = 888, 3928c2ecf20Sopenharmony_ci } bridge; 3938c2ecf20Sopenharmony_ci 3948c2ecf20Sopenharmony_ci /* Analog video */ 3958c2ecf20Sopenharmony_ci unsigned int input; 3968c2ecf20Sopenharmony_ci unsigned int audinput; /* Selectable audio input */ 3978c2ecf20Sopenharmony_ci u32 tvaudio; 3988c2ecf20Sopenharmony_ci v4l2_std_id tvnorm; 3998c2ecf20Sopenharmony_ci unsigned int tuner_type; 4008c2ecf20Sopenharmony_ci unsigned char tuner_addr; 4018c2ecf20Sopenharmony_ci unsigned int tuner_bus; 4028c2ecf20Sopenharmony_ci unsigned int radio_type; 4038c2ecf20Sopenharmony_ci unsigned char radio_addr; 4048c2ecf20Sopenharmony_ci struct v4l2_subdev *sd_cx25840; 4058c2ecf20Sopenharmony_ci struct work_struct cx25840_work; 4068c2ecf20Sopenharmony_ci 4078c2ecf20Sopenharmony_ci /* Infrared */ 4088c2ecf20Sopenharmony_ci struct v4l2_subdev *sd_ir; 4098c2ecf20Sopenharmony_ci struct work_struct ir_rx_work; 4108c2ecf20Sopenharmony_ci unsigned long ir_rx_notifications; 4118c2ecf20Sopenharmony_ci struct work_struct ir_tx_work; 4128c2ecf20Sopenharmony_ci unsigned long ir_tx_notifications; 4138c2ecf20Sopenharmony_ci 4148c2ecf20Sopenharmony_ci struct cx23885_kernel_ir *kernel_ir; 4158c2ecf20Sopenharmony_ci atomic_t ir_input_stopping; 4168c2ecf20Sopenharmony_ci 4178c2ecf20Sopenharmony_ci /* V4l */ 4188c2ecf20Sopenharmony_ci u32 freq; 4198c2ecf20Sopenharmony_ci struct video_device *video_dev; 4208c2ecf20Sopenharmony_ci struct video_device *vbi_dev; 4218c2ecf20Sopenharmony_ci 4228c2ecf20Sopenharmony_ci /* video capture */ 4238c2ecf20Sopenharmony_ci struct cx23885_fmt *fmt; 4248c2ecf20Sopenharmony_ci unsigned int width, height; 4258c2ecf20Sopenharmony_ci unsigned field; 4268c2ecf20Sopenharmony_ci 4278c2ecf20Sopenharmony_ci struct cx23885_dmaqueue vidq; 4288c2ecf20Sopenharmony_ci struct vb2_queue vb2_vidq; 4298c2ecf20Sopenharmony_ci struct cx23885_dmaqueue vbiq; 4308c2ecf20Sopenharmony_ci struct vb2_queue vb2_vbiq; 4318c2ecf20Sopenharmony_ci 4328c2ecf20Sopenharmony_ci spinlock_t slock; 4338c2ecf20Sopenharmony_ci 4348c2ecf20Sopenharmony_ci /* MPEG Encoder ONLY settings */ 4358c2ecf20Sopenharmony_ci u32 cx23417_mailbox; 4368c2ecf20Sopenharmony_ci struct cx2341x_handler cxhdl; 4378c2ecf20Sopenharmony_ci struct video_device *v4l_device; 4388c2ecf20Sopenharmony_ci struct vb2_queue vb2_mpegq; 4398c2ecf20Sopenharmony_ci struct cx23885_tvnorm encodernorm; 4408c2ecf20Sopenharmony_ci 4418c2ecf20Sopenharmony_ci /* Analog raw audio */ 4428c2ecf20Sopenharmony_ci struct cx23885_audio_dev *audio_dev; 4438c2ecf20Sopenharmony_ci 4448c2ecf20Sopenharmony_ci /* Does the system require periodic DMA resets? */ 4458c2ecf20Sopenharmony_ci unsigned int need_dma_reset:1; 4468c2ecf20Sopenharmony_ci}; 4478c2ecf20Sopenharmony_ci 4488c2ecf20Sopenharmony_cistatic inline struct cx23885_dev *to_cx23885(struct v4l2_device *v4l2_dev) 4498c2ecf20Sopenharmony_ci{ 4508c2ecf20Sopenharmony_ci return container_of(v4l2_dev, struct cx23885_dev, v4l2_dev); 4518c2ecf20Sopenharmony_ci} 4528c2ecf20Sopenharmony_ci 4538c2ecf20Sopenharmony_ci#define call_all(dev, o, f, args...) \ 4548c2ecf20Sopenharmony_ci v4l2_device_call_all(&dev->v4l2_dev, 0, o, f, ##args) 4558c2ecf20Sopenharmony_ci 4568c2ecf20Sopenharmony_ci#define CX23885_HW_888_IR (1 << 0) 4578c2ecf20Sopenharmony_ci#define CX23885_HW_AV_CORE (1 << 1) 4588c2ecf20Sopenharmony_ci 4598c2ecf20Sopenharmony_ci#define call_hw(dev, grpid, o, f, args...) \ 4608c2ecf20Sopenharmony_ci v4l2_device_call_all(&dev->v4l2_dev, grpid, o, f, ##args) 4618c2ecf20Sopenharmony_ci 4628c2ecf20Sopenharmony_ciextern struct v4l2_subdev *cx23885_find_hw(struct cx23885_dev *dev, u32 hw); 4638c2ecf20Sopenharmony_ci 4648c2ecf20Sopenharmony_ci#define SRAM_CH01 0 /* Video A */ 4658c2ecf20Sopenharmony_ci#define SRAM_CH02 1 /* VBI A */ 4668c2ecf20Sopenharmony_ci#define SRAM_CH03 2 /* Video B */ 4678c2ecf20Sopenharmony_ci#define SRAM_CH04 3 /* Transport via B */ 4688c2ecf20Sopenharmony_ci#define SRAM_CH05 4 /* VBI B */ 4698c2ecf20Sopenharmony_ci#define SRAM_CH06 5 /* Video C */ 4708c2ecf20Sopenharmony_ci#define SRAM_CH07 6 /* Transport via C */ 4718c2ecf20Sopenharmony_ci#define SRAM_CH08 7 /* Audio Internal A */ 4728c2ecf20Sopenharmony_ci#define SRAM_CH09 8 /* Audio Internal B */ 4738c2ecf20Sopenharmony_ci#define SRAM_CH10 9 /* Audio External */ 4748c2ecf20Sopenharmony_ci#define SRAM_CH11 10 /* COMB_3D_N */ 4758c2ecf20Sopenharmony_ci#define SRAM_CH12 11 /* Comb 3D N1 */ 4768c2ecf20Sopenharmony_ci#define SRAM_CH13 12 /* Comb 3D N2 */ 4778c2ecf20Sopenharmony_ci#define SRAM_CH14 13 /* MOE Vid */ 4788c2ecf20Sopenharmony_ci#define SRAM_CH15 14 /* MOE RSLT */ 4798c2ecf20Sopenharmony_ci 4808c2ecf20Sopenharmony_cistruct sram_channel { 4818c2ecf20Sopenharmony_ci char *name; 4828c2ecf20Sopenharmony_ci u32 cmds_start; 4838c2ecf20Sopenharmony_ci u32 ctrl_start; 4848c2ecf20Sopenharmony_ci u32 cdt; 4858c2ecf20Sopenharmony_ci u32 fifo_start; 4868c2ecf20Sopenharmony_ci u32 fifo_size; 4878c2ecf20Sopenharmony_ci u32 ptr1_reg; 4888c2ecf20Sopenharmony_ci u32 ptr2_reg; 4898c2ecf20Sopenharmony_ci u32 cnt1_reg; 4908c2ecf20Sopenharmony_ci u32 cnt2_reg; 4918c2ecf20Sopenharmony_ci u32 jumponly; 4928c2ecf20Sopenharmony_ci}; 4938c2ecf20Sopenharmony_ci 4948c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */ 4958c2ecf20Sopenharmony_ci 4968c2ecf20Sopenharmony_ci#define cx_read(reg) readl(dev->lmmio + ((reg)>>2)) 4978c2ecf20Sopenharmony_ci#define cx_write(reg, value) writel((value), dev->lmmio + ((reg)>>2)) 4988c2ecf20Sopenharmony_ci 4998c2ecf20Sopenharmony_ci#define cx_andor(reg, mask, value) \ 5008c2ecf20Sopenharmony_ci writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\ 5018c2ecf20Sopenharmony_ci ((value) & (mask)), dev->lmmio+((reg)>>2)) 5028c2ecf20Sopenharmony_ci 5038c2ecf20Sopenharmony_ci#define cx_set(reg, bit) cx_andor((reg), (bit), (bit)) 5048c2ecf20Sopenharmony_ci#define cx_clear(reg, bit) cx_andor((reg), (bit), 0) 5058c2ecf20Sopenharmony_ci 5068c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */ 5078c2ecf20Sopenharmony_ci/* cx23885-core.c */ 5088c2ecf20Sopenharmony_ci 5098c2ecf20Sopenharmony_ciextern int cx23885_sram_channel_setup(struct cx23885_dev *dev, 5108c2ecf20Sopenharmony_ci struct sram_channel *ch, 5118c2ecf20Sopenharmony_ci unsigned int bpl, u32 risc); 5128c2ecf20Sopenharmony_ci 5138c2ecf20Sopenharmony_ciextern void cx23885_sram_channel_dump(struct cx23885_dev *dev, 5148c2ecf20Sopenharmony_ci struct sram_channel *ch); 5158c2ecf20Sopenharmony_ci 5168c2ecf20Sopenharmony_ciextern int cx23885_risc_buffer(struct pci_dev *pci, struct cx23885_riscmem *risc, 5178c2ecf20Sopenharmony_ci struct scatterlist *sglist, 5188c2ecf20Sopenharmony_ci unsigned int top_offset, unsigned int bottom_offset, 5198c2ecf20Sopenharmony_ci unsigned int bpl, unsigned int padding, unsigned int lines); 5208c2ecf20Sopenharmony_ci 5218c2ecf20Sopenharmony_ciextern int cx23885_risc_vbibuffer(struct pci_dev *pci, 5228c2ecf20Sopenharmony_ci struct cx23885_riscmem *risc, struct scatterlist *sglist, 5238c2ecf20Sopenharmony_ci unsigned int top_offset, unsigned int bottom_offset, 5248c2ecf20Sopenharmony_ci unsigned int bpl, unsigned int padding, unsigned int lines); 5258c2ecf20Sopenharmony_ci 5268c2ecf20Sopenharmony_ciint cx23885_start_dma(struct cx23885_tsport *port, 5278c2ecf20Sopenharmony_ci struct cx23885_dmaqueue *q, 5288c2ecf20Sopenharmony_ci struct cx23885_buffer *buf); 5298c2ecf20Sopenharmony_civoid cx23885_cancel_buffers(struct cx23885_tsport *port); 5308c2ecf20Sopenharmony_ci 5318c2ecf20Sopenharmony_ci 5328c2ecf20Sopenharmony_ciextern void cx23885_gpio_set(struct cx23885_dev *dev, u32 mask); 5338c2ecf20Sopenharmony_ciextern void cx23885_gpio_clear(struct cx23885_dev *dev, u32 mask); 5348c2ecf20Sopenharmony_ciextern u32 cx23885_gpio_get(struct cx23885_dev *dev, u32 mask); 5358c2ecf20Sopenharmony_ciextern void cx23885_gpio_enable(struct cx23885_dev *dev, u32 mask, 5368c2ecf20Sopenharmony_ci int asoutput); 5378c2ecf20Sopenharmony_ci 5388c2ecf20Sopenharmony_ciextern void cx23885_irq_add_enable(struct cx23885_dev *dev, u32 mask); 5398c2ecf20Sopenharmony_ciextern void cx23885_irq_enable(struct cx23885_dev *dev, u32 mask); 5408c2ecf20Sopenharmony_ciextern void cx23885_irq_disable(struct cx23885_dev *dev, u32 mask); 5418c2ecf20Sopenharmony_ciextern void cx23885_irq_remove(struct cx23885_dev *dev, u32 mask); 5428c2ecf20Sopenharmony_ci 5438c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */ 5448c2ecf20Sopenharmony_ci/* cx23885-cards.c */ 5458c2ecf20Sopenharmony_ciextern struct cx23885_board cx23885_boards[]; 5468c2ecf20Sopenharmony_ciextern const unsigned int cx23885_bcount; 5478c2ecf20Sopenharmony_ci 5488c2ecf20Sopenharmony_ciextern struct cx23885_subid cx23885_subids[]; 5498c2ecf20Sopenharmony_ciextern const unsigned int cx23885_idcount; 5508c2ecf20Sopenharmony_ci 5518c2ecf20Sopenharmony_ciextern int cx23885_tuner_callback(void *priv, int component, 5528c2ecf20Sopenharmony_ci int command, int arg); 5538c2ecf20Sopenharmony_ciextern void cx23885_card_list(struct cx23885_dev *dev); 5548c2ecf20Sopenharmony_ciextern int cx23885_ir_init(struct cx23885_dev *dev); 5558c2ecf20Sopenharmony_ciextern void cx23885_ir_pci_int_enable(struct cx23885_dev *dev); 5568c2ecf20Sopenharmony_ciextern void cx23885_ir_fini(struct cx23885_dev *dev); 5578c2ecf20Sopenharmony_ciextern void cx23885_gpio_setup(struct cx23885_dev *dev); 5588c2ecf20Sopenharmony_ciextern void cx23885_card_setup(struct cx23885_dev *dev); 5598c2ecf20Sopenharmony_ciextern void cx23885_card_setup_pre_i2c(struct cx23885_dev *dev); 5608c2ecf20Sopenharmony_ci 5618c2ecf20Sopenharmony_ciextern int cx23885_dvb_register(struct cx23885_tsport *port); 5628c2ecf20Sopenharmony_ciextern int cx23885_dvb_unregister(struct cx23885_tsport *port); 5638c2ecf20Sopenharmony_ci 5648c2ecf20Sopenharmony_ciextern int cx23885_buf_prepare(struct cx23885_buffer *buf, 5658c2ecf20Sopenharmony_ci struct cx23885_tsport *port); 5668c2ecf20Sopenharmony_ciextern void cx23885_buf_queue(struct cx23885_tsport *port, 5678c2ecf20Sopenharmony_ci struct cx23885_buffer *buf); 5688c2ecf20Sopenharmony_ciextern void cx23885_free_buffer(struct cx23885_dev *dev, 5698c2ecf20Sopenharmony_ci struct cx23885_buffer *buf); 5708c2ecf20Sopenharmony_ci 5718c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */ 5728c2ecf20Sopenharmony_ci/* cx23885-video.c */ 5738c2ecf20Sopenharmony_ci/* Video */ 5748c2ecf20Sopenharmony_ciextern int cx23885_video_register(struct cx23885_dev *dev); 5758c2ecf20Sopenharmony_ciextern void cx23885_video_unregister(struct cx23885_dev *dev); 5768c2ecf20Sopenharmony_ciextern int cx23885_video_irq(struct cx23885_dev *dev, u32 status); 5778c2ecf20Sopenharmony_ciextern void cx23885_video_wakeup(struct cx23885_dev *dev, 5788c2ecf20Sopenharmony_ci struct cx23885_dmaqueue *q, u32 count); 5798c2ecf20Sopenharmony_ciint cx23885_enum_input(struct cx23885_dev *dev, struct v4l2_input *i); 5808c2ecf20Sopenharmony_ciint cx23885_set_input(struct file *file, void *priv, unsigned int i); 5818c2ecf20Sopenharmony_ciint cx23885_get_input(struct file *file, void *priv, unsigned int *i); 5828c2ecf20Sopenharmony_ciint cx23885_set_frequency(struct file *file, void *priv, const struct v4l2_frequency *f); 5838c2ecf20Sopenharmony_ciint cx23885_set_tvnorm(struct cx23885_dev *dev, v4l2_std_id norm); 5848c2ecf20Sopenharmony_ci 5858c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */ 5868c2ecf20Sopenharmony_ci/* cx23885-vbi.c */ 5878c2ecf20Sopenharmony_ciextern int cx23885_vbi_fmt(struct file *file, void *priv, 5888c2ecf20Sopenharmony_ci struct v4l2_format *f); 5898c2ecf20Sopenharmony_ciextern void cx23885_vbi_timeout(unsigned long data); 5908c2ecf20Sopenharmony_ciextern const struct vb2_ops cx23885_vbi_qops; 5918c2ecf20Sopenharmony_ciextern int cx23885_vbi_irq(struct cx23885_dev *dev, u32 status); 5928c2ecf20Sopenharmony_ci 5938c2ecf20Sopenharmony_ci/* cx23885-i2c.c */ 5948c2ecf20Sopenharmony_ciextern int cx23885_i2c_register(struct cx23885_i2c *bus); 5958c2ecf20Sopenharmony_ciextern int cx23885_i2c_unregister(struct cx23885_i2c *bus); 5968c2ecf20Sopenharmony_ciextern void cx23885_av_clk(struct cx23885_dev *dev, int enable); 5978c2ecf20Sopenharmony_ci 5988c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */ 5998c2ecf20Sopenharmony_ci/* cx23885-417.c */ 6008c2ecf20Sopenharmony_ciextern int cx23885_417_register(struct cx23885_dev *dev); 6018c2ecf20Sopenharmony_ciextern void cx23885_417_unregister(struct cx23885_dev *dev); 6028c2ecf20Sopenharmony_ciextern int cx23885_irq_417(struct cx23885_dev *dev, u32 status); 6038c2ecf20Sopenharmony_ciextern void cx23885_417_check_encoder(struct cx23885_dev *dev); 6048c2ecf20Sopenharmony_ciextern void cx23885_mc417_init(struct cx23885_dev *dev); 6058c2ecf20Sopenharmony_ciextern int mc417_memory_read(struct cx23885_dev *dev, u32 address, u32 *value); 6068c2ecf20Sopenharmony_ciextern int mc417_memory_write(struct cx23885_dev *dev, u32 address, u32 value); 6078c2ecf20Sopenharmony_ciextern int mc417_register_read(struct cx23885_dev *dev, 6088c2ecf20Sopenharmony_ci u16 address, u32 *value); 6098c2ecf20Sopenharmony_ciextern int mc417_register_write(struct cx23885_dev *dev, 6108c2ecf20Sopenharmony_ci u16 address, u32 value); 6118c2ecf20Sopenharmony_ciextern void mc417_gpio_set(struct cx23885_dev *dev, u32 mask); 6128c2ecf20Sopenharmony_ciextern void mc417_gpio_clear(struct cx23885_dev *dev, u32 mask); 6138c2ecf20Sopenharmony_ciextern void mc417_gpio_enable(struct cx23885_dev *dev, u32 mask, int asoutput); 6148c2ecf20Sopenharmony_ci 6158c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */ 6168c2ecf20Sopenharmony_ci/* cx23885-alsa.c */ 6178c2ecf20Sopenharmony_ciextern struct cx23885_audio_dev *cx23885_audio_register( 6188c2ecf20Sopenharmony_ci struct cx23885_dev *dev); 6198c2ecf20Sopenharmony_ciextern void cx23885_audio_unregister(struct cx23885_dev *dev); 6208c2ecf20Sopenharmony_ciextern int cx23885_audio_irq(struct cx23885_dev *dev, u32 status, u32 mask); 6218c2ecf20Sopenharmony_ciextern int cx23885_risc_databuffer(struct pci_dev *pci, 6228c2ecf20Sopenharmony_ci struct cx23885_riscmem *risc, 6238c2ecf20Sopenharmony_ci struct scatterlist *sglist, 6248c2ecf20Sopenharmony_ci unsigned int bpl, 6258c2ecf20Sopenharmony_ci unsigned int lines, 6268c2ecf20Sopenharmony_ci unsigned int lpi); 6278c2ecf20Sopenharmony_ci 6288c2ecf20Sopenharmony_ci/* ----------------------------------------------------------- */ 6298c2ecf20Sopenharmony_ci/* tv norms */ 6308c2ecf20Sopenharmony_ci 6318c2ecf20Sopenharmony_cistatic inline unsigned int norm_maxh(v4l2_std_id norm) 6328c2ecf20Sopenharmony_ci{ 6338c2ecf20Sopenharmony_ci return (norm & V4L2_STD_525_60) ? 480 : 576; 6348c2ecf20Sopenharmony_ci} 635