18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * cx18 functions for DVB support 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (c) 2008 Steven Toth <stoth@linuxtv.org> 68c2ecf20Sopenharmony_ci * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net> 78c2ecf20Sopenharmony_ci */ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#include "cx18-version.h" 108c2ecf20Sopenharmony_ci#include "cx18-dvb.h" 118c2ecf20Sopenharmony_ci#include "cx18-io.h" 128c2ecf20Sopenharmony_ci#include "cx18-queue.h" 138c2ecf20Sopenharmony_ci#include "cx18-streams.h" 148c2ecf20Sopenharmony_ci#include "cx18-cards.h" 158c2ecf20Sopenharmony_ci#include "cx18-gpio.h" 168c2ecf20Sopenharmony_ci#include "s5h1409.h" 178c2ecf20Sopenharmony_ci#include "mxl5005s.h" 188c2ecf20Sopenharmony_ci#include "s5h1411.h" 198c2ecf20Sopenharmony_ci#include "tda18271.h" 208c2ecf20Sopenharmony_ci#include "zl10353.h" 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci#include <linux/firmware.h> 238c2ecf20Sopenharmony_ci#include "mt352.h" 248c2ecf20Sopenharmony_ci#include "mt352_priv.h" 258c2ecf20Sopenharmony_ci#include "tuner-xc2028.h" 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ciDVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci#define FWFILE "dvb-cx18-mpc718-mt352.fw" 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci#define CX18_REG_DMUX_NUM_PORT_0_CONTROL 0xd5a000 328c2ecf20Sopenharmony_ci#define CX18_CLOCK_ENABLE2 0xc71024 338c2ecf20Sopenharmony_ci#define CX18_DMUX_CLK_MASK 0x0080 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci/* 368c2ecf20Sopenharmony_ci * CX18_CARD_HVR_1600_ESMT 378c2ecf20Sopenharmony_ci * CX18_CARD_HVR_1600_SAMSUNG 388c2ecf20Sopenharmony_ci */ 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_cistatic struct mxl5005s_config hauppauge_hvr1600_tuner = { 418c2ecf20Sopenharmony_ci .i2c_address = 0xC6 >> 1, 428c2ecf20Sopenharmony_ci .if_freq = IF_FREQ_5380000HZ, 438c2ecf20Sopenharmony_ci .xtal_freq = CRYSTAL_FREQ_16000000HZ, 448c2ecf20Sopenharmony_ci .agc_mode = MXL_SINGLE_AGC, 458c2ecf20Sopenharmony_ci .tracking_filter = MXL_TF_C_H, 468c2ecf20Sopenharmony_ci .rssi_enable = MXL_RSSI_ENABLE, 478c2ecf20Sopenharmony_ci .cap_select = MXL_CAP_SEL_ENABLE, 488c2ecf20Sopenharmony_ci .div_out = MXL_DIV_OUT_4, 498c2ecf20Sopenharmony_ci .clock_out = MXL_CLOCK_OUT_DISABLE, 508c2ecf20Sopenharmony_ci .output_load = MXL5005S_IF_OUTPUT_LOAD_200_OHM, 518c2ecf20Sopenharmony_ci .top = MXL5005S_TOP_25P2, 528c2ecf20Sopenharmony_ci .mod_mode = MXL_DIGITAL_MODE, 538c2ecf20Sopenharmony_ci .if_mode = MXL_ZERO_IF, 548c2ecf20Sopenharmony_ci .qam_gain = 0x02, 558c2ecf20Sopenharmony_ci .AgcMasterByte = 0x00, 568c2ecf20Sopenharmony_ci}; 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_cistatic struct s5h1409_config hauppauge_hvr1600_config = { 598c2ecf20Sopenharmony_ci .demod_address = 0x32 >> 1, 608c2ecf20Sopenharmony_ci .output_mode = S5H1409_SERIAL_OUTPUT, 618c2ecf20Sopenharmony_ci .gpio = S5H1409_GPIO_ON, 628c2ecf20Sopenharmony_ci .qam_if = 44000, 638c2ecf20Sopenharmony_ci .inversion = S5H1409_INVERSION_OFF, 648c2ecf20Sopenharmony_ci .status_mode = S5H1409_DEMODLOCKING, 658c2ecf20Sopenharmony_ci .mpeg_timing = S5H1409_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK, 668c2ecf20Sopenharmony_ci .hvr1600_opt = S5H1409_HVR1600_OPTIMIZE 678c2ecf20Sopenharmony_ci}; 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci/* 708c2ecf20Sopenharmony_ci * CX18_CARD_HVR_1600_S5H1411 718c2ecf20Sopenharmony_ci */ 728c2ecf20Sopenharmony_cistatic struct s5h1411_config hcw_s5h1411_config = { 738c2ecf20Sopenharmony_ci .output_mode = S5H1411_SERIAL_OUTPUT, 748c2ecf20Sopenharmony_ci .gpio = S5H1411_GPIO_OFF, 758c2ecf20Sopenharmony_ci .vsb_if = S5H1411_IF_44000, 768c2ecf20Sopenharmony_ci .qam_if = S5H1411_IF_4000, 778c2ecf20Sopenharmony_ci .inversion = S5H1411_INVERSION_ON, 788c2ecf20Sopenharmony_ci .status_mode = S5H1411_DEMODLOCKING, 798c2ecf20Sopenharmony_ci .mpeg_timing = S5H1411_MPEGTIMING_CONTINUOUS_NONINVERTING_CLOCK, 808c2ecf20Sopenharmony_ci}; 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_cistatic struct tda18271_std_map hauppauge_tda18271_std_map = { 838c2ecf20Sopenharmony_ci .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3, 848c2ecf20Sopenharmony_ci .if_lvl = 6, .rfagc_top = 0x37 }, 858c2ecf20Sopenharmony_ci .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0, 868c2ecf20Sopenharmony_ci .if_lvl = 6, .rfagc_top = 0x37 }, 878c2ecf20Sopenharmony_ci}; 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_cistatic struct tda18271_config hauppauge_tda18271_config = { 908c2ecf20Sopenharmony_ci .std_map = &hauppauge_tda18271_std_map, 918c2ecf20Sopenharmony_ci .gate = TDA18271_GATE_DIGITAL, 928c2ecf20Sopenharmony_ci .output_opt = TDA18271_OUTPUT_LT_OFF, 938c2ecf20Sopenharmony_ci}; 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci/* 968c2ecf20Sopenharmony_ci * CX18_CARD_LEADTEK_DVR3100H 978c2ecf20Sopenharmony_ci */ 988c2ecf20Sopenharmony_ci/* Information/confirmation of proper config values provided by Terry Wu */ 998c2ecf20Sopenharmony_cistatic struct zl10353_config leadtek_dvr3100h_demod = { 1008c2ecf20Sopenharmony_ci .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ 1018c2ecf20Sopenharmony_ci .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 1028c2ecf20Sopenharmony_ci .parallel_ts = 1, /* Not a serial TS */ 1038c2ecf20Sopenharmony_ci .no_tuner = 1, /* XC3028 is not behind the gate */ 1048c2ecf20Sopenharmony_ci .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ 1058c2ecf20Sopenharmony_ci}; 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci/* 1088c2ecf20Sopenharmony_ci * CX18_CARD_YUAN_MPC718 1098c2ecf20Sopenharmony_ci */ 1108c2ecf20Sopenharmony_ci/* 1118c2ecf20Sopenharmony_ci * Due to 1128c2ecf20Sopenharmony_ci * 1138c2ecf20Sopenharmony_ci * 1. an absence of information on how to program the MT352 1148c2ecf20Sopenharmony_ci * 2. the Linux mt352 module pushing MT352 initialization off onto us here 1158c2ecf20Sopenharmony_ci * 1168c2ecf20Sopenharmony_ci * We have to use an init sequence that *you* must extract from the Windows 1178c2ecf20Sopenharmony_ci * driver (yuanrap.sys) and which we load as a firmware. 1188c2ecf20Sopenharmony_ci * 1198c2ecf20Sopenharmony_ci * If someone can provide me with a Zarlink MT352 (Intel CE6352?) Design Manual 1208c2ecf20Sopenharmony_ci * with chip programming details, then I can remove this annoyance. 1218c2ecf20Sopenharmony_ci */ 1228c2ecf20Sopenharmony_cistatic int yuan_mpc718_mt352_reqfw(struct cx18_stream *stream, 1238c2ecf20Sopenharmony_ci const struct firmware **fw) 1248c2ecf20Sopenharmony_ci{ 1258c2ecf20Sopenharmony_ci struct cx18 *cx = stream->cx; 1268c2ecf20Sopenharmony_ci const char *fn = FWFILE; 1278c2ecf20Sopenharmony_ci int ret; 1288c2ecf20Sopenharmony_ci 1298c2ecf20Sopenharmony_ci ret = request_firmware(fw, fn, &cx->pci_dev->dev); 1308c2ecf20Sopenharmony_ci if (ret) 1318c2ecf20Sopenharmony_ci CX18_ERR("Unable to open firmware file %s\n", fn); 1328c2ecf20Sopenharmony_ci else { 1338c2ecf20Sopenharmony_ci size_t sz = (*fw)->size; 1348c2ecf20Sopenharmony_ci if (sz < 2 || sz > 64 || (sz % 2) != 0) { 1358c2ecf20Sopenharmony_ci CX18_ERR("Firmware %s has a bad size: %lu bytes\n", 1368c2ecf20Sopenharmony_ci fn, (unsigned long) sz); 1378c2ecf20Sopenharmony_ci ret = -EILSEQ; 1388c2ecf20Sopenharmony_ci release_firmware(*fw); 1398c2ecf20Sopenharmony_ci *fw = NULL; 1408c2ecf20Sopenharmony_ci } 1418c2ecf20Sopenharmony_ci } 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_ci if (ret) { 1448c2ecf20Sopenharmony_ci CX18_ERR("The MPC718 board variant with the MT352 DVB-T demodulator will not work without it\n"); 1458c2ecf20Sopenharmony_ci CX18_ERR("Run 'linux/scripts/get_dvb_firmware mpc718' if you need the firmware\n"); 1468c2ecf20Sopenharmony_ci } 1478c2ecf20Sopenharmony_ci return ret; 1488c2ecf20Sopenharmony_ci} 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_cistatic int yuan_mpc718_mt352_init(struct dvb_frontend *fe) 1518c2ecf20Sopenharmony_ci{ 1528c2ecf20Sopenharmony_ci struct cx18_dvb *dvb = container_of(fe->dvb, 1538c2ecf20Sopenharmony_ci struct cx18_dvb, dvb_adapter); 1548c2ecf20Sopenharmony_ci struct cx18_stream *stream = dvb->stream; 1558c2ecf20Sopenharmony_ci const struct firmware *fw = NULL; 1568c2ecf20Sopenharmony_ci int ret; 1578c2ecf20Sopenharmony_ci int i; 1588c2ecf20Sopenharmony_ci u8 buf[3]; 1598c2ecf20Sopenharmony_ci 1608c2ecf20Sopenharmony_ci ret = yuan_mpc718_mt352_reqfw(stream, &fw); 1618c2ecf20Sopenharmony_ci if (ret) 1628c2ecf20Sopenharmony_ci return ret; 1638c2ecf20Sopenharmony_ci 1648c2ecf20Sopenharmony_ci /* Loop through all the register-value pairs in the firmware file */ 1658c2ecf20Sopenharmony_ci for (i = 0; i < fw->size; i += 2) { 1668c2ecf20Sopenharmony_ci buf[0] = fw->data[i]; 1678c2ecf20Sopenharmony_ci /* Intercept a few registers we want to set ourselves */ 1688c2ecf20Sopenharmony_ci switch (buf[0]) { 1698c2ecf20Sopenharmony_ci case TRL_NOMINAL_RATE_0: 1708c2ecf20Sopenharmony_ci /* Set our custom OFDM bandwidth in the case below */ 1718c2ecf20Sopenharmony_ci break; 1728c2ecf20Sopenharmony_ci case TRL_NOMINAL_RATE_1: 1738c2ecf20Sopenharmony_ci /* 6 MHz: 64/7 * 6/8 / 20.48 * 2^16 = 0x55b6.db6 */ 1748c2ecf20Sopenharmony_ci /* 7 MHz: 64/7 * 7/8 / 20.48 * 2^16 = 0x6400 */ 1758c2ecf20Sopenharmony_ci /* 8 MHz: 64/7 * 8/8 / 20.48 * 2^16 = 0x7249.249 */ 1768c2ecf20Sopenharmony_ci buf[1] = 0x72; 1778c2ecf20Sopenharmony_ci buf[2] = 0x49; 1788c2ecf20Sopenharmony_ci mt352_write(fe, buf, 3); 1798c2ecf20Sopenharmony_ci break; 1808c2ecf20Sopenharmony_ci case INPUT_FREQ_0: 1818c2ecf20Sopenharmony_ci /* Set our custom IF in the case below */ 1828c2ecf20Sopenharmony_ci break; 1838c2ecf20Sopenharmony_ci case INPUT_FREQ_1: 1848c2ecf20Sopenharmony_ci /* 4.56 MHz IF: (20.48 - 4.56)/20.48 * 2^14 = 0x31c0 */ 1858c2ecf20Sopenharmony_ci buf[1] = 0x31; 1868c2ecf20Sopenharmony_ci buf[2] = 0xc0; 1878c2ecf20Sopenharmony_ci mt352_write(fe, buf, 3); 1888c2ecf20Sopenharmony_ci break; 1898c2ecf20Sopenharmony_ci default: 1908c2ecf20Sopenharmony_ci /* Pass through the register-value pair from the fw */ 1918c2ecf20Sopenharmony_ci buf[1] = fw->data[i+1]; 1928c2ecf20Sopenharmony_ci mt352_write(fe, buf, 2); 1938c2ecf20Sopenharmony_ci break; 1948c2ecf20Sopenharmony_ci } 1958c2ecf20Sopenharmony_ci } 1968c2ecf20Sopenharmony_ci 1978c2ecf20Sopenharmony_ci buf[0] = (u8) TUNER_GO; 1988c2ecf20Sopenharmony_ci buf[1] = 0x01; /* Go */ 1998c2ecf20Sopenharmony_ci mt352_write(fe, buf, 2); 2008c2ecf20Sopenharmony_ci release_firmware(fw); 2018c2ecf20Sopenharmony_ci return 0; 2028c2ecf20Sopenharmony_ci} 2038c2ecf20Sopenharmony_ci 2048c2ecf20Sopenharmony_cistatic struct mt352_config yuan_mpc718_mt352_demod = { 2058c2ecf20Sopenharmony_ci .demod_address = 0x1e >> 1, 2068c2ecf20Sopenharmony_ci .adc_clock = 20480, /* 20.480 MHz */ 2078c2ecf20Sopenharmony_ci .if2 = 4560, /* 4.560 MHz */ 2088c2ecf20Sopenharmony_ci .no_tuner = 1, /* XC3028 is not behind the gate */ 2098c2ecf20Sopenharmony_ci .demod_init = yuan_mpc718_mt352_init, 2108c2ecf20Sopenharmony_ci}; 2118c2ecf20Sopenharmony_ci 2128c2ecf20Sopenharmony_cistatic struct zl10353_config yuan_mpc718_zl10353_demod = { 2138c2ecf20Sopenharmony_ci .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ 2148c2ecf20Sopenharmony_ci .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 2158c2ecf20Sopenharmony_ci .parallel_ts = 1, /* Not a serial TS */ 2168c2ecf20Sopenharmony_ci .no_tuner = 1, /* XC3028 is not behind the gate */ 2178c2ecf20Sopenharmony_ci .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ 2188c2ecf20Sopenharmony_ci}; 2198c2ecf20Sopenharmony_ci 2208c2ecf20Sopenharmony_cistatic struct zl10353_config gotview_dvd3_zl10353_demod = { 2218c2ecf20Sopenharmony_ci .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ 2228c2ecf20Sopenharmony_ci .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ 2238c2ecf20Sopenharmony_ci .parallel_ts = 1, /* Not a serial TS */ 2248c2ecf20Sopenharmony_ci .no_tuner = 1, /* XC3028 is not behind the gate */ 2258c2ecf20Sopenharmony_ci .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ 2268c2ecf20Sopenharmony_ci}; 2278c2ecf20Sopenharmony_ci 2288c2ecf20Sopenharmony_cistatic int dvb_register(struct cx18_stream *stream); 2298c2ecf20Sopenharmony_ci 2308c2ecf20Sopenharmony_ci/* Kernel DVB framework calls this when the feed needs to start. 2318c2ecf20Sopenharmony_ci * The CX18 framework should enable the transport DMA handling 2328c2ecf20Sopenharmony_ci * and queue processing. 2338c2ecf20Sopenharmony_ci */ 2348c2ecf20Sopenharmony_cistatic int cx18_dvb_start_feed(struct dvb_demux_feed *feed) 2358c2ecf20Sopenharmony_ci{ 2368c2ecf20Sopenharmony_ci struct dvb_demux *demux = feed->demux; 2378c2ecf20Sopenharmony_ci struct cx18_stream *stream = (struct cx18_stream *) demux->priv; 2388c2ecf20Sopenharmony_ci struct cx18 *cx; 2398c2ecf20Sopenharmony_ci int ret; 2408c2ecf20Sopenharmony_ci u32 v; 2418c2ecf20Sopenharmony_ci 2428c2ecf20Sopenharmony_ci if (!stream) 2438c2ecf20Sopenharmony_ci return -EINVAL; 2448c2ecf20Sopenharmony_ci 2458c2ecf20Sopenharmony_ci cx = stream->cx; 2468c2ecf20Sopenharmony_ci CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n", 2478c2ecf20Sopenharmony_ci feed->pid, feed->index); 2488c2ecf20Sopenharmony_ci 2498c2ecf20Sopenharmony_ci mutex_lock(&cx->serialize_lock); 2508c2ecf20Sopenharmony_ci ret = cx18_init_on_first_open(cx); 2518c2ecf20Sopenharmony_ci mutex_unlock(&cx->serialize_lock); 2528c2ecf20Sopenharmony_ci if (ret) { 2538c2ecf20Sopenharmony_ci CX18_ERR("Failed to initialize firmware starting DVB feed\n"); 2548c2ecf20Sopenharmony_ci return ret; 2558c2ecf20Sopenharmony_ci } 2568c2ecf20Sopenharmony_ci ret = -EINVAL; 2578c2ecf20Sopenharmony_ci 2588c2ecf20Sopenharmony_ci switch (cx->card->type) { 2598c2ecf20Sopenharmony_ci case CX18_CARD_HVR_1600_ESMT: 2608c2ecf20Sopenharmony_ci case CX18_CARD_HVR_1600_SAMSUNG: 2618c2ecf20Sopenharmony_ci case CX18_CARD_HVR_1600_S5H1411: 2628c2ecf20Sopenharmony_ci v = cx18_read_reg(cx, CX18_REG_DMUX_NUM_PORT_0_CONTROL); 2638c2ecf20Sopenharmony_ci v |= 0x00400000; /* Serial Mode */ 2648c2ecf20Sopenharmony_ci v |= 0x00002000; /* Data Length - Byte */ 2658c2ecf20Sopenharmony_ci v |= 0x00010000; /* Error - Polarity */ 2668c2ecf20Sopenharmony_ci v |= 0x00020000; /* Error - Passthru */ 2678c2ecf20Sopenharmony_ci v |= 0x000c0000; /* Error - Ignore */ 2688c2ecf20Sopenharmony_ci cx18_write_reg(cx, v, CX18_REG_DMUX_NUM_PORT_0_CONTROL); 2698c2ecf20Sopenharmony_ci break; 2708c2ecf20Sopenharmony_ci 2718c2ecf20Sopenharmony_ci case CX18_CARD_LEADTEK_DVR3100H: 2728c2ecf20Sopenharmony_ci case CX18_CARD_YUAN_MPC718: 2738c2ecf20Sopenharmony_ci case CX18_CARD_GOTVIEW_PCI_DVD3: 2748c2ecf20Sopenharmony_ci default: 2758c2ecf20Sopenharmony_ci /* Assumption - Parallel transport - Signalling 2768c2ecf20Sopenharmony_ci * undefined or default. 2778c2ecf20Sopenharmony_ci */ 2788c2ecf20Sopenharmony_ci break; 2798c2ecf20Sopenharmony_ci } 2808c2ecf20Sopenharmony_ci 2818c2ecf20Sopenharmony_ci if (!demux->dmx.frontend) 2828c2ecf20Sopenharmony_ci return -EINVAL; 2838c2ecf20Sopenharmony_ci 2848c2ecf20Sopenharmony_ci mutex_lock(&stream->dvb->feedlock); 2858c2ecf20Sopenharmony_ci if (stream->dvb->feeding++ == 0) { 2868c2ecf20Sopenharmony_ci CX18_DEBUG_INFO("Starting Transport DMA\n"); 2878c2ecf20Sopenharmony_ci mutex_lock(&cx->serialize_lock); 2888c2ecf20Sopenharmony_ci set_bit(CX18_F_S_STREAMING, &stream->s_flags); 2898c2ecf20Sopenharmony_ci ret = cx18_start_v4l2_encode_stream(stream); 2908c2ecf20Sopenharmony_ci if (ret < 0) { 2918c2ecf20Sopenharmony_ci CX18_DEBUG_INFO("Failed to start Transport DMA\n"); 2928c2ecf20Sopenharmony_ci stream->dvb->feeding--; 2938c2ecf20Sopenharmony_ci if (stream->dvb->feeding == 0) 2948c2ecf20Sopenharmony_ci clear_bit(CX18_F_S_STREAMING, &stream->s_flags); 2958c2ecf20Sopenharmony_ci } 2968c2ecf20Sopenharmony_ci mutex_unlock(&cx->serialize_lock); 2978c2ecf20Sopenharmony_ci } else 2988c2ecf20Sopenharmony_ci ret = 0; 2998c2ecf20Sopenharmony_ci mutex_unlock(&stream->dvb->feedlock); 3008c2ecf20Sopenharmony_ci 3018c2ecf20Sopenharmony_ci return ret; 3028c2ecf20Sopenharmony_ci} 3038c2ecf20Sopenharmony_ci 3048c2ecf20Sopenharmony_ci/* Kernel DVB framework calls this when the feed needs to stop. */ 3058c2ecf20Sopenharmony_cistatic int cx18_dvb_stop_feed(struct dvb_demux_feed *feed) 3068c2ecf20Sopenharmony_ci{ 3078c2ecf20Sopenharmony_ci struct dvb_demux *demux = feed->demux; 3088c2ecf20Sopenharmony_ci struct cx18_stream *stream = (struct cx18_stream *)demux->priv; 3098c2ecf20Sopenharmony_ci struct cx18 *cx; 3108c2ecf20Sopenharmony_ci int ret = -EINVAL; 3118c2ecf20Sopenharmony_ci 3128c2ecf20Sopenharmony_ci if (stream) { 3138c2ecf20Sopenharmony_ci cx = stream->cx; 3148c2ecf20Sopenharmony_ci CX18_DEBUG_INFO("Stop feed: pid = 0x%x index = %d\n", 3158c2ecf20Sopenharmony_ci feed->pid, feed->index); 3168c2ecf20Sopenharmony_ci 3178c2ecf20Sopenharmony_ci mutex_lock(&stream->dvb->feedlock); 3188c2ecf20Sopenharmony_ci if (--stream->dvb->feeding == 0) { 3198c2ecf20Sopenharmony_ci CX18_DEBUG_INFO("Stopping Transport DMA\n"); 3208c2ecf20Sopenharmony_ci mutex_lock(&cx->serialize_lock); 3218c2ecf20Sopenharmony_ci ret = cx18_stop_v4l2_encode_stream(stream, 0); 3228c2ecf20Sopenharmony_ci mutex_unlock(&cx->serialize_lock); 3238c2ecf20Sopenharmony_ci } else 3248c2ecf20Sopenharmony_ci ret = 0; 3258c2ecf20Sopenharmony_ci mutex_unlock(&stream->dvb->feedlock); 3268c2ecf20Sopenharmony_ci } 3278c2ecf20Sopenharmony_ci 3288c2ecf20Sopenharmony_ci return ret; 3298c2ecf20Sopenharmony_ci} 3308c2ecf20Sopenharmony_ci 3318c2ecf20Sopenharmony_ciint cx18_dvb_register(struct cx18_stream *stream) 3328c2ecf20Sopenharmony_ci{ 3338c2ecf20Sopenharmony_ci struct cx18 *cx = stream->cx; 3348c2ecf20Sopenharmony_ci struct cx18_dvb *dvb = stream->dvb; 3358c2ecf20Sopenharmony_ci struct dvb_adapter *dvb_adapter; 3368c2ecf20Sopenharmony_ci struct dvb_demux *dvbdemux; 3378c2ecf20Sopenharmony_ci struct dmx_demux *dmx; 3388c2ecf20Sopenharmony_ci int ret; 3398c2ecf20Sopenharmony_ci 3408c2ecf20Sopenharmony_ci if (!dvb) 3418c2ecf20Sopenharmony_ci return -EINVAL; 3428c2ecf20Sopenharmony_ci 3438c2ecf20Sopenharmony_ci dvb->enabled = 0; 3448c2ecf20Sopenharmony_ci dvb->stream = stream; 3458c2ecf20Sopenharmony_ci 3468c2ecf20Sopenharmony_ci ret = dvb_register_adapter(&dvb->dvb_adapter, 3478c2ecf20Sopenharmony_ci CX18_DRIVER_NAME, 3488c2ecf20Sopenharmony_ci THIS_MODULE, &cx->pci_dev->dev, adapter_nr); 3498c2ecf20Sopenharmony_ci if (ret < 0) 3508c2ecf20Sopenharmony_ci goto err_out; 3518c2ecf20Sopenharmony_ci 3528c2ecf20Sopenharmony_ci dvb_adapter = &dvb->dvb_adapter; 3538c2ecf20Sopenharmony_ci 3548c2ecf20Sopenharmony_ci dvbdemux = &dvb->demux; 3558c2ecf20Sopenharmony_ci 3568c2ecf20Sopenharmony_ci dvbdemux->priv = (void *)stream; 3578c2ecf20Sopenharmony_ci 3588c2ecf20Sopenharmony_ci dvbdemux->filternum = 256; 3598c2ecf20Sopenharmony_ci dvbdemux->feednum = 256; 3608c2ecf20Sopenharmony_ci dvbdemux->start_feed = cx18_dvb_start_feed; 3618c2ecf20Sopenharmony_ci dvbdemux->stop_feed = cx18_dvb_stop_feed; 3628c2ecf20Sopenharmony_ci dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | 3638c2ecf20Sopenharmony_ci DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING); 3648c2ecf20Sopenharmony_ci ret = dvb_dmx_init(dvbdemux); 3658c2ecf20Sopenharmony_ci if (ret < 0) 3668c2ecf20Sopenharmony_ci goto err_dvb_unregister_adapter; 3678c2ecf20Sopenharmony_ci 3688c2ecf20Sopenharmony_ci dmx = &dvbdemux->dmx; 3698c2ecf20Sopenharmony_ci 3708c2ecf20Sopenharmony_ci dvb->hw_frontend.source = DMX_FRONTEND_0; 3718c2ecf20Sopenharmony_ci dvb->mem_frontend.source = DMX_MEMORY_FE; 3728c2ecf20Sopenharmony_ci dvb->dmxdev.filternum = 256; 3738c2ecf20Sopenharmony_ci dvb->dmxdev.demux = dmx; 3748c2ecf20Sopenharmony_ci 3758c2ecf20Sopenharmony_ci ret = dvb_dmxdev_init(&dvb->dmxdev, dvb_adapter); 3768c2ecf20Sopenharmony_ci if (ret < 0) 3778c2ecf20Sopenharmony_ci goto err_dvb_dmx_release; 3788c2ecf20Sopenharmony_ci 3798c2ecf20Sopenharmony_ci ret = dmx->add_frontend(dmx, &dvb->hw_frontend); 3808c2ecf20Sopenharmony_ci if (ret < 0) 3818c2ecf20Sopenharmony_ci goto err_dvb_dmxdev_release; 3828c2ecf20Sopenharmony_ci 3838c2ecf20Sopenharmony_ci ret = dmx->add_frontend(dmx, &dvb->mem_frontend); 3848c2ecf20Sopenharmony_ci if (ret < 0) 3858c2ecf20Sopenharmony_ci goto err_remove_hw_frontend; 3868c2ecf20Sopenharmony_ci 3878c2ecf20Sopenharmony_ci ret = dmx->connect_frontend(dmx, &dvb->hw_frontend); 3888c2ecf20Sopenharmony_ci if (ret < 0) 3898c2ecf20Sopenharmony_ci goto err_remove_mem_frontend; 3908c2ecf20Sopenharmony_ci 3918c2ecf20Sopenharmony_ci ret = dvb_register(stream); 3928c2ecf20Sopenharmony_ci if (ret < 0) 3938c2ecf20Sopenharmony_ci goto err_disconnect_frontend; 3948c2ecf20Sopenharmony_ci 3958c2ecf20Sopenharmony_ci dvb_net_init(dvb_adapter, &dvb->dvbnet, dmx); 3968c2ecf20Sopenharmony_ci 3978c2ecf20Sopenharmony_ci CX18_INFO("DVB Frontend registered\n"); 3988c2ecf20Sopenharmony_ci CX18_INFO("Registered DVB adapter%d for %s (%d x %d.%02d kB)\n", 3998c2ecf20Sopenharmony_ci stream->dvb->dvb_adapter.num, stream->name, 4008c2ecf20Sopenharmony_ci stream->buffers, stream->buf_size/1024, 4018c2ecf20Sopenharmony_ci (stream->buf_size * 100 / 1024) % 100); 4028c2ecf20Sopenharmony_ci 4038c2ecf20Sopenharmony_ci mutex_init(&dvb->feedlock); 4048c2ecf20Sopenharmony_ci dvb->enabled = 1; 4058c2ecf20Sopenharmony_ci return ret; 4068c2ecf20Sopenharmony_ci 4078c2ecf20Sopenharmony_cierr_disconnect_frontend: 4088c2ecf20Sopenharmony_ci dmx->disconnect_frontend(dmx); 4098c2ecf20Sopenharmony_cierr_remove_mem_frontend: 4108c2ecf20Sopenharmony_ci dmx->remove_frontend(dmx, &dvb->mem_frontend); 4118c2ecf20Sopenharmony_cierr_remove_hw_frontend: 4128c2ecf20Sopenharmony_ci dmx->remove_frontend(dmx, &dvb->hw_frontend); 4138c2ecf20Sopenharmony_cierr_dvb_dmxdev_release: 4148c2ecf20Sopenharmony_ci dvb_dmxdev_release(&dvb->dmxdev); 4158c2ecf20Sopenharmony_cierr_dvb_dmx_release: 4168c2ecf20Sopenharmony_ci dvb_dmx_release(dvbdemux); 4178c2ecf20Sopenharmony_cierr_dvb_unregister_adapter: 4188c2ecf20Sopenharmony_ci dvb_unregister_adapter(dvb_adapter); 4198c2ecf20Sopenharmony_cierr_out: 4208c2ecf20Sopenharmony_ci return ret; 4218c2ecf20Sopenharmony_ci} 4228c2ecf20Sopenharmony_ci 4238c2ecf20Sopenharmony_civoid cx18_dvb_unregister(struct cx18_stream *stream) 4248c2ecf20Sopenharmony_ci{ 4258c2ecf20Sopenharmony_ci struct cx18 *cx = stream->cx; 4268c2ecf20Sopenharmony_ci struct cx18_dvb *dvb = stream->dvb; 4278c2ecf20Sopenharmony_ci struct dvb_adapter *dvb_adapter; 4288c2ecf20Sopenharmony_ci struct dvb_demux *dvbdemux; 4298c2ecf20Sopenharmony_ci struct dmx_demux *dmx; 4308c2ecf20Sopenharmony_ci 4318c2ecf20Sopenharmony_ci CX18_INFO("unregister DVB\n"); 4328c2ecf20Sopenharmony_ci 4338c2ecf20Sopenharmony_ci if (dvb == NULL || !dvb->enabled) 4348c2ecf20Sopenharmony_ci return; 4358c2ecf20Sopenharmony_ci 4368c2ecf20Sopenharmony_ci dvb_adapter = &dvb->dvb_adapter; 4378c2ecf20Sopenharmony_ci dvbdemux = &dvb->demux; 4388c2ecf20Sopenharmony_ci dmx = &dvbdemux->dmx; 4398c2ecf20Sopenharmony_ci 4408c2ecf20Sopenharmony_ci dmx->close(dmx); 4418c2ecf20Sopenharmony_ci dvb_net_release(&dvb->dvbnet); 4428c2ecf20Sopenharmony_ci dmx->remove_frontend(dmx, &dvb->mem_frontend); 4438c2ecf20Sopenharmony_ci dmx->remove_frontend(dmx, &dvb->hw_frontend); 4448c2ecf20Sopenharmony_ci dvb_dmxdev_release(&dvb->dmxdev); 4458c2ecf20Sopenharmony_ci dvb_dmx_release(dvbdemux); 4468c2ecf20Sopenharmony_ci dvb_unregister_frontend(dvb->fe); 4478c2ecf20Sopenharmony_ci dvb_frontend_detach(dvb->fe); 4488c2ecf20Sopenharmony_ci dvb_unregister_adapter(dvb_adapter); 4498c2ecf20Sopenharmony_ci} 4508c2ecf20Sopenharmony_ci 4518c2ecf20Sopenharmony_ci/* All the DVB attach calls go here, this function gets modified 4528c2ecf20Sopenharmony_ci * for each new card. cx18_dvb_start_feed() will also need changes. 4538c2ecf20Sopenharmony_ci */ 4548c2ecf20Sopenharmony_cistatic int dvb_register(struct cx18_stream *stream) 4558c2ecf20Sopenharmony_ci{ 4568c2ecf20Sopenharmony_ci struct cx18_dvb *dvb = stream->dvb; 4578c2ecf20Sopenharmony_ci struct cx18 *cx = stream->cx; 4588c2ecf20Sopenharmony_ci int ret = 0; 4598c2ecf20Sopenharmony_ci 4608c2ecf20Sopenharmony_ci switch (cx->card->type) { 4618c2ecf20Sopenharmony_ci case CX18_CARD_HVR_1600_ESMT: 4628c2ecf20Sopenharmony_ci case CX18_CARD_HVR_1600_SAMSUNG: 4638c2ecf20Sopenharmony_ci dvb->fe = dvb_attach(s5h1409_attach, 4648c2ecf20Sopenharmony_ci &hauppauge_hvr1600_config, 4658c2ecf20Sopenharmony_ci &cx->i2c_adap[0]); 4668c2ecf20Sopenharmony_ci if (dvb->fe != NULL) { 4678c2ecf20Sopenharmony_ci dvb_attach(mxl5005s_attach, dvb->fe, 4688c2ecf20Sopenharmony_ci &cx->i2c_adap[0], 4698c2ecf20Sopenharmony_ci &hauppauge_hvr1600_tuner); 4708c2ecf20Sopenharmony_ci ret = 0; 4718c2ecf20Sopenharmony_ci } 4728c2ecf20Sopenharmony_ci break; 4738c2ecf20Sopenharmony_ci case CX18_CARD_HVR_1600_S5H1411: 4748c2ecf20Sopenharmony_ci dvb->fe = dvb_attach(s5h1411_attach, 4758c2ecf20Sopenharmony_ci &hcw_s5h1411_config, 4768c2ecf20Sopenharmony_ci &cx->i2c_adap[0]); 4778c2ecf20Sopenharmony_ci if (dvb->fe != NULL) 4788c2ecf20Sopenharmony_ci dvb_attach(tda18271_attach, dvb->fe, 4798c2ecf20Sopenharmony_ci 0x60, &cx->i2c_adap[0], 4808c2ecf20Sopenharmony_ci &hauppauge_tda18271_config); 4818c2ecf20Sopenharmony_ci break; 4828c2ecf20Sopenharmony_ci case CX18_CARD_LEADTEK_DVR3100H: 4838c2ecf20Sopenharmony_ci dvb->fe = dvb_attach(zl10353_attach, 4848c2ecf20Sopenharmony_ci &leadtek_dvr3100h_demod, 4858c2ecf20Sopenharmony_ci &cx->i2c_adap[1]); 4868c2ecf20Sopenharmony_ci if (dvb->fe != NULL) { 4878c2ecf20Sopenharmony_ci struct dvb_frontend *fe; 4888c2ecf20Sopenharmony_ci struct xc2028_config cfg = { 4898c2ecf20Sopenharmony_ci .i2c_adap = &cx->i2c_adap[1], 4908c2ecf20Sopenharmony_ci .i2c_addr = 0xc2 >> 1, 4918c2ecf20Sopenharmony_ci .ctrl = NULL, 4928c2ecf20Sopenharmony_ci }; 4938c2ecf20Sopenharmony_ci static struct xc2028_ctrl ctrl = { 4948c2ecf20Sopenharmony_ci .fname = XC2028_DEFAULT_FIRMWARE, 4958c2ecf20Sopenharmony_ci .max_len = 64, 4968c2ecf20Sopenharmony_ci .demod = XC3028_FE_ZARLINK456, 4978c2ecf20Sopenharmony_ci .type = XC2028_AUTO, 4988c2ecf20Sopenharmony_ci }; 4998c2ecf20Sopenharmony_ci 5008c2ecf20Sopenharmony_ci fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); 5018c2ecf20Sopenharmony_ci if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 5028c2ecf20Sopenharmony_ci fe->ops.tuner_ops.set_config(fe, &ctrl); 5038c2ecf20Sopenharmony_ci } 5048c2ecf20Sopenharmony_ci break; 5058c2ecf20Sopenharmony_ci case CX18_CARD_YUAN_MPC718: 5068c2ecf20Sopenharmony_ci /* 5078c2ecf20Sopenharmony_ci * TODO 5088c2ecf20Sopenharmony_ci * Apparently, these cards also could instead have a 5098c2ecf20Sopenharmony_ci * DiBcom demod supported by one of the db7000 drivers 5108c2ecf20Sopenharmony_ci */ 5118c2ecf20Sopenharmony_ci dvb->fe = dvb_attach(mt352_attach, 5128c2ecf20Sopenharmony_ci &yuan_mpc718_mt352_demod, 5138c2ecf20Sopenharmony_ci &cx->i2c_adap[1]); 5148c2ecf20Sopenharmony_ci if (dvb->fe == NULL) 5158c2ecf20Sopenharmony_ci dvb->fe = dvb_attach(zl10353_attach, 5168c2ecf20Sopenharmony_ci &yuan_mpc718_zl10353_demod, 5178c2ecf20Sopenharmony_ci &cx->i2c_adap[1]); 5188c2ecf20Sopenharmony_ci if (dvb->fe != NULL) { 5198c2ecf20Sopenharmony_ci struct dvb_frontend *fe; 5208c2ecf20Sopenharmony_ci struct xc2028_config cfg = { 5218c2ecf20Sopenharmony_ci .i2c_adap = &cx->i2c_adap[1], 5228c2ecf20Sopenharmony_ci .i2c_addr = 0xc2 >> 1, 5238c2ecf20Sopenharmony_ci .ctrl = NULL, 5248c2ecf20Sopenharmony_ci }; 5258c2ecf20Sopenharmony_ci static struct xc2028_ctrl ctrl = { 5268c2ecf20Sopenharmony_ci .fname = XC2028_DEFAULT_FIRMWARE, 5278c2ecf20Sopenharmony_ci .max_len = 64, 5288c2ecf20Sopenharmony_ci .demod = XC3028_FE_ZARLINK456, 5298c2ecf20Sopenharmony_ci .type = XC2028_AUTO, 5308c2ecf20Sopenharmony_ci }; 5318c2ecf20Sopenharmony_ci 5328c2ecf20Sopenharmony_ci fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); 5338c2ecf20Sopenharmony_ci if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 5348c2ecf20Sopenharmony_ci fe->ops.tuner_ops.set_config(fe, &ctrl); 5358c2ecf20Sopenharmony_ci } 5368c2ecf20Sopenharmony_ci break; 5378c2ecf20Sopenharmony_ci case CX18_CARD_GOTVIEW_PCI_DVD3: 5388c2ecf20Sopenharmony_ci dvb->fe = dvb_attach(zl10353_attach, 5398c2ecf20Sopenharmony_ci &gotview_dvd3_zl10353_demod, 5408c2ecf20Sopenharmony_ci &cx->i2c_adap[1]); 5418c2ecf20Sopenharmony_ci if (dvb->fe != NULL) { 5428c2ecf20Sopenharmony_ci struct dvb_frontend *fe; 5438c2ecf20Sopenharmony_ci struct xc2028_config cfg = { 5448c2ecf20Sopenharmony_ci .i2c_adap = &cx->i2c_adap[1], 5458c2ecf20Sopenharmony_ci .i2c_addr = 0xc2 >> 1, 5468c2ecf20Sopenharmony_ci .ctrl = NULL, 5478c2ecf20Sopenharmony_ci }; 5488c2ecf20Sopenharmony_ci static struct xc2028_ctrl ctrl = { 5498c2ecf20Sopenharmony_ci .fname = XC2028_DEFAULT_FIRMWARE, 5508c2ecf20Sopenharmony_ci .max_len = 64, 5518c2ecf20Sopenharmony_ci .demod = XC3028_FE_ZARLINK456, 5528c2ecf20Sopenharmony_ci .type = XC2028_AUTO, 5538c2ecf20Sopenharmony_ci }; 5548c2ecf20Sopenharmony_ci 5558c2ecf20Sopenharmony_ci fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); 5568c2ecf20Sopenharmony_ci if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) 5578c2ecf20Sopenharmony_ci fe->ops.tuner_ops.set_config(fe, &ctrl); 5588c2ecf20Sopenharmony_ci } 5598c2ecf20Sopenharmony_ci break; 5608c2ecf20Sopenharmony_ci default: 5618c2ecf20Sopenharmony_ci /* No Digital Tv Support */ 5628c2ecf20Sopenharmony_ci break; 5638c2ecf20Sopenharmony_ci } 5648c2ecf20Sopenharmony_ci 5658c2ecf20Sopenharmony_ci if (dvb->fe == NULL) { 5668c2ecf20Sopenharmony_ci CX18_ERR("frontend initialization failed\n"); 5678c2ecf20Sopenharmony_ci return -1; 5688c2ecf20Sopenharmony_ci } 5698c2ecf20Sopenharmony_ci 5708c2ecf20Sopenharmony_ci dvb->fe->callback = cx18_reset_tuner_gpio; 5718c2ecf20Sopenharmony_ci 5728c2ecf20Sopenharmony_ci ret = dvb_register_frontend(&dvb->dvb_adapter, dvb->fe); 5738c2ecf20Sopenharmony_ci if (ret < 0) { 5748c2ecf20Sopenharmony_ci if (dvb->fe->ops.release) 5758c2ecf20Sopenharmony_ci dvb->fe->ops.release(dvb->fe); 5768c2ecf20Sopenharmony_ci return ret; 5778c2ecf20Sopenharmony_ci } 5788c2ecf20Sopenharmony_ci 5798c2ecf20Sopenharmony_ci /* 5808c2ecf20Sopenharmony_ci * The firmware seems to enable the TS DMUX clock 5818c2ecf20Sopenharmony_ci * under various circumstances. However, since we know we 5828c2ecf20Sopenharmony_ci * might use it, let's just turn it on ourselves here. 5838c2ecf20Sopenharmony_ci */ 5848c2ecf20Sopenharmony_ci cx18_write_reg_expect(cx, 5858c2ecf20Sopenharmony_ci (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK, 5868c2ecf20Sopenharmony_ci CX18_CLOCK_ENABLE2, 5878c2ecf20Sopenharmony_ci CX18_DMUX_CLK_MASK, 5888c2ecf20Sopenharmony_ci (CX18_DMUX_CLK_MASK << 16) | CX18_DMUX_CLK_MASK); 5898c2ecf20Sopenharmony_ci 5908c2ecf20Sopenharmony_ci return ret; 5918c2ecf20Sopenharmony_ci} 5928c2ecf20Sopenharmony_ci 5938c2ecf20Sopenharmony_ciMODULE_FIRMWARE(FWFILE); 594