18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * drivers/media/i2c/smiapp/smiapp-quirk.c 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Generic driver for SMIA/SMIA++ compliant camera modules 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Copyright (C) 2011--2012 Nokia Corporation 88c2ecf20Sopenharmony_ci * Contact: Sakari Ailus <sakari.ailus@iki.fi> 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#include <linux/delay.h> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci#include "smiapp.h" 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_cistatic int smiapp_write_8(struct smiapp_sensor *sensor, u16 reg, u8 val) 168c2ecf20Sopenharmony_ci{ 178c2ecf20Sopenharmony_ci return smiapp_write(sensor, SMIAPP_REG_MK_U8(reg), val); 188c2ecf20Sopenharmony_ci} 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_cistatic int smiapp_write_8s(struct smiapp_sensor *sensor, 218c2ecf20Sopenharmony_ci const struct smiapp_reg_8 *regs, int len) 228c2ecf20Sopenharmony_ci{ 238c2ecf20Sopenharmony_ci struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd); 248c2ecf20Sopenharmony_ci int rval; 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci for (; len > 0; len--, regs++) { 278c2ecf20Sopenharmony_ci rval = smiapp_write_8(sensor, regs->reg, regs->val); 288c2ecf20Sopenharmony_ci if (rval < 0) { 298c2ecf20Sopenharmony_ci dev_err(&client->dev, 308c2ecf20Sopenharmony_ci "error %d writing reg 0x%4.4x, val 0x%2.2x", 318c2ecf20Sopenharmony_ci rval, regs->reg, regs->val); 328c2ecf20Sopenharmony_ci return rval; 338c2ecf20Sopenharmony_ci } 348c2ecf20Sopenharmony_ci } 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci return 0; 378c2ecf20Sopenharmony_ci} 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_civoid smiapp_replace_limit(struct smiapp_sensor *sensor, 408c2ecf20Sopenharmony_ci u32 limit, u32 val) 418c2ecf20Sopenharmony_ci{ 428c2ecf20Sopenharmony_ci struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd); 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ci dev_dbg(&client->dev, "quirk: 0x%8.8x \"%s\" = %d, 0x%x\n", 458c2ecf20Sopenharmony_ci smiapp_reg_limits[limit].addr, 468c2ecf20Sopenharmony_ci smiapp_reg_limits[limit].what, val, val); 478c2ecf20Sopenharmony_ci sensor->limits[limit] = val; 488c2ecf20Sopenharmony_ci} 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_cistatic int jt8ew9_limits(struct smiapp_sensor *sensor) 518c2ecf20Sopenharmony_ci{ 528c2ecf20Sopenharmony_ci if (sensor->minfo.revision_number_major < 0x03) 538c2ecf20Sopenharmony_ci sensor->frame_skip = 1; 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci /* Below 24 gain doesn't have effect at all, */ 568c2ecf20Sopenharmony_ci /* but ~59 is needed for full dynamic range */ 578c2ecf20Sopenharmony_ci smiapp_replace_limit(sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MIN, 59); 588c2ecf20Sopenharmony_ci smiapp_replace_limit( 598c2ecf20Sopenharmony_ci sensor, SMIAPP_LIMIT_ANALOGUE_GAIN_CODE_MAX, 6000); 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci return 0; 628c2ecf20Sopenharmony_ci} 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_cistatic int jt8ew9_post_poweron(struct smiapp_sensor *sensor) 658c2ecf20Sopenharmony_ci{ 668c2ecf20Sopenharmony_ci static const struct smiapp_reg_8 regs[] = { 678c2ecf20Sopenharmony_ci { 0x30a3, 0xd8 }, /* Output port control : LVDS ports only */ 688c2ecf20Sopenharmony_ci { 0x30ae, 0x00 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */ 698c2ecf20Sopenharmony_ci { 0x30af, 0xd0 }, /* 0x0307 pll_multiplier maximum value on PLL input 9.6MHz ( 19.2MHz is divided on pre_pll_div) */ 708c2ecf20Sopenharmony_ci { 0x322d, 0x04 }, /* Adjusting Processing Image Size to Scaler Toshiba Recommendation Setting */ 718c2ecf20Sopenharmony_ci { 0x3255, 0x0f }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */ 728c2ecf20Sopenharmony_ci { 0x3256, 0x15 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */ 738c2ecf20Sopenharmony_ci { 0x3258, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */ 748c2ecf20Sopenharmony_ci { 0x3259, 0x70 }, /* Analog Gain Control Toshiba Recommendation Setting */ 758c2ecf20Sopenharmony_ci { 0x325f, 0x7c }, /* Analog Gain Control Toshiba Recommendation Setting */ 768c2ecf20Sopenharmony_ci { 0x3302, 0x06 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ 778c2ecf20Sopenharmony_ci { 0x3304, 0x00 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ 788c2ecf20Sopenharmony_ci { 0x3307, 0x22 }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ 798c2ecf20Sopenharmony_ci { 0x3308, 0x8d }, /* Pixel Reference Voltage Control Toshiba Recommendation Setting */ 808c2ecf20Sopenharmony_ci { 0x331e, 0x0f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */ 818c2ecf20Sopenharmony_ci { 0x3320, 0x30 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */ 828c2ecf20Sopenharmony_ci { 0x3321, 0x11 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */ 838c2ecf20Sopenharmony_ci { 0x3322, 0x98 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */ 848c2ecf20Sopenharmony_ci { 0x3323, 0x64 }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */ 858c2ecf20Sopenharmony_ci { 0x3325, 0x83 }, /* Read Out Timing Control Toshiba Recommendation Setting */ 868c2ecf20Sopenharmony_ci { 0x3330, 0x18 }, /* Read Out Timing Control Toshiba Recommendation Setting */ 878c2ecf20Sopenharmony_ci { 0x333c, 0x01 }, /* Read Out Timing Control Toshiba Recommendation Setting */ 888c2ecf20Sopenharmony_ci { 0x3345, 0x2f }, /* Black Hole Sun Correction Control Toshiba Recommendation Setting */ 898c2ecf20Sopenharmony_ci { 0x33de, 0x38 }, /* Horizontal Noise Reduction Control Toshiba Recommendation Setting */ 908c2ecf20Sopenharmony_ci /* Taken from v03. No idea what the rest are. */ 918c2ecf20Sopenharmony_ci { 0x32e0, 0x05 }, 928c2ecf20Sopenharmony_ci { 0x32e1, 0x05 }, 938c2ecf20Sopenharmony_ci { 0x32e2, 0x04 }, 948c2ecf20Sopenharmony_ci { 0x32e5, 0x04 }, 958c2ecf20Sopenharmony_ci { 0x32e6, 0x04 }, 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ci }; 988c2ecf20Sopenharmony_ci 998c2ecf20Sopenharmony_ci return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs)); 1008c2ecf20Sopenharmony_ci} 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ciconst struct smiapp_quirk smiapp_jt8ew9_quirk = { 1038c2ecf20Sopenharmony_ci .limits = jt8ew9_limits, 1048c2ecf20Sopenharmony_ci .post_poweron = jt8ew9_post_poweron, 1058c2ecf20Sopenharmony_ci}; 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_cistatic int imx125es_post_poweron(struct smiapp_sensor *sensor) 1088c2ecf20Sopenharmony_ci{ 1098c2ecf20Sopenharmony_ci /* Taken from v02. No idea what the other two are. */ 1108c2ecf20Sopenharmony_ci static const struct smiapp_reg_8 regs[] = { 1118c2ecf20Sopenharmony_ci /* 1128c2ecf20Sopenharmony_ci * 0x3302: clk during frame blanking: 1138c2ecf20Sopenharmony_ci * 0x00 - HS mode, 0x01 - LP11 1148c2ecf20Sopenharmony_ci */ 1158c2ecf20Sopenharmony_ci { 0x3302, 0x01 }, 1168c2ecf20Sopenharmony_ci { 0x302d, 0x00 }, 1178c2ecf20Sopenharmony_ci { 0x3b08, 0x8c }, 1188c2ecf20Sopenharmony_ci }; 1198c2ecf20Sopenharmony_ci 1208c2ecf20Sopenharmony_ci return smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs)); 1218c2ecf20Sopenharmony_ci} 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ciconst struct smiapp_quirk smiapp_imx125es_quirk = { 1248c2ecf20Sopenharmony_ci .post_poweron = imx125es_post_poweron, 1258c2ecf20Sopenharmony_ci}; 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_cistatic int jt8ev1_limits(struct smiapp_sensor *sensor) 1288c2ecf20Sopenharmony_ci{ 1298c2ecf20Sopenharmony_ci smiapp_replace_limit(sensor, SMIAPP_LIMIT_X_ADDR_MAX, 4271); 1308c2ecf20Sopenharmony_ci smiapp_replace_limit(sensor, 1318c2ecf20Sopenharmony_ci SMIAPP_LIMIT_MIN_LINE_BLANKING_PCK_BIN, 184); 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci return 0; 1348c2ecf20Sopenharmony_ci} 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_cistatic int jt8ev1_post_poweron(struct smiapp_sensor *sensor) 1378c2ecf20Sopenharmony_ci{ 1388c2ecf20Sopenharmony_ci struct i2c_client *client = v4l2_get_subdevdata(&sensor->src->sd); 1398c2ecf20Sopenharmony_ci int rval; 1408c2ecf20Sopenharmony_ci static const struct smiapp_reg_8 regs[] = { 1418c2ecf20Sopenharmony_ci { 0x3031, 0xcd }, /* For digital binning (EQ_MONI) */ 1428c2ecf20Sopenharmony_ci { 0x30a3, 0xd0 }, /* FLASH STROBE enable */ 1438c2ecf20Sopenharmony_ci { 0x3237, 0x00 }, /* For control of pulse timing for ADC */ 1448c2ecf20Sopenharmony_ci { 0x3238, 0x43 }, 1458c2ecf20Sopenharmony_ci { 0x3301, 0x06 }, /* For analog bias for sensor */ 1468c2ecf20Sopenharmony_ci { 0x3302, 0x06 }, 1478c2ecf20Sopenharmony_ci { 0x3304, 0x00 }, 1488c2ecf20Sopenharmony_ci { 0x3305, 0x88 }, 1498c2ecf20Sopenharmony_ci { 0x332a, 0x14 }, 1508c2ecf20Sopenharmony_ci { 0x332c, 0x6b }, 1518c2ecf20Sopenharmony_ci { 0x3336, 0x01 }, 1528c2ecf20Sopenharmony_ci { 0x333f, 0x1f }, 1538c2ecf20Sopenharmony_ci { 0x3355, 0x00 }, 1548c2ecf20Sopenharmony_ci { 0x3356, 0x20 }, 1558c2ecf20Sopenharmony_ci { 0x33bf, 0x20 }, /* Adjust the FBC speed */ 1568c2ecf20Sopenharmony_ci { 0x33c9, 0x20 }, 1578c2ecf20Sopenharmony_ci { 0x33ce, 0x30 }, /* Adjust the parameter for logic function */ 1588c2ecf20Sopenharmony_ci { 0x33cf, 0xec }, /* For Black sun */ 1598c2ecf20Sopenharmony_ci { 0x3328, 0x80 }, /* Ugh. No idea what's this. */ 1608c2ecf20Sopenharmony_ci }; 1618c2ecf20Sopenharmony_ci static const struct smiapp_reg_8 regs_96[] = { 1628c2ecf20Sopenharmony_ci { 0x30ae, 0x00 }, /* For control of ADC clock */ 1638c2ecf20Sopenharmony_ci { 0x30af, 0xd0 }, 1648c2ecf20Sopenharmony_ci { 0x30b0, 0x01 }, 1658c2ecf20Sopenharmony_ci }; 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci rval = smiapp_write_8s(sensor, regs, ARRAY_SIZE(regs)); 1688c2ecf20Sopenharmony_ci if (rval < 0) 1698c2ecf20Sopenharmony_ci return rval; 1708c2ecf20Sopenharmony_ci 1718c2ecf20Sopenharmony_ci switch (sensor->hwcfg->ext_clk) { 1728c2ecf20Sopenharmony_ci case 9600000: 1738c2ecf20Sopenharmony_ci return smiapp_write_8s(sensor, regs_96, 1748c2ecf20Sopenharmony_ci ARRAY_SIZE(regs_96)); 1758c2ecf20Sopenharmony_ci default: 1768c2ecf20Sopenharmony_ci dev_warn(&client->dev, "no MSRs for %d Hz ext_clk\n", 1778c2ecf20Sopenharmony_ci sensor->hwcfg->ext_clk); 1788c2ecf20Sopenharmony_ci return 0; 1798c2ecf20Sopenharmony_ci } 1808c2ecf20Sopenharmony_ci} 1818c2ecf20Sopenharmony_ci 1828c2ecf20Sopenharmony_cistatic int jt8ev1_pre_streamon(struct smiapp_sensor *sensor) 1838c2ecf20Sopenharmony_ci{ 1848c2ecf20Sopenharmony_ci return smiapp_write_8(sensor, 0x3328, 0x00); 1858c2ecf20Sopenharmony_ci} 1868c2ecf20Sopenharmony_ci 1878c2ecf20Sopenharmony_cistatic int jt8ev1_post_streamoff(struct smiapp_sensor *sensor) 1888c2ecf20Sopenharmony_ci{ 1898c2ecf20Sopenharmony_ci int rval; 1908c2ecf20Sopenharmony_ci 1918c2ecf20Sopenharmony_ci /* Workaround: allows fast standby to work properly */ 1928c2ecf20Sopenharmony_ci rval = smiapp_write_8(sensor, 0x3205, 0x04); 1938c2ecf20Sopenharmony_ci if (rval < 0) 1948c2ecf20Sopenharmony_ci return rval; 1958c2ecf20Sopenharmony_ci 1968c2ecf20Sopenharmony_ci /* Wait for 1 ms + one line => 2 ms is likely enough */ 1978c2ecf20Sopenharmony_ci usleep_range(2000, 2050); 1988c2ecf20Sopenharmony_ci 1998c2ecf20Sopenharmony_ci /* Restore it */ 2008c2ecf20Sopenharmony_ci rval = smiapp_write_8(sensor, 0x3205, 0x00); 2018c2ecf20Sopenharmony_ci if (rval < 0) 2028c2ecf20Sopenharmony_ci return rval; 2038c2ecf20Sopenharmony_ci 2048c2ecf20Sopenharmony_ci return smiapp_write_8(sensor, 0x3328, 0x80); 2058c2ecf20Sopenharmony_ci} 2068c2ecf20Sopenharmony_ci 2078c2ecf20Sopenharmony_cistatic int jt8ev1_init(struct smiapp_sensor *sensor) 2088c2ecf20Sopenharmony_ci{ 2098c2ecf20Sopenharmony_ci sensor->pll.flags |= SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE; 2108c2ecf20Sopenharmony_ci 2118c2ecf20Sopenharmony_ci return 0; 2128c2ecf20Sopenharmony_ci} 2138c2ecf20Sopenharmony_ci 2148c2ecf20Sopenharmony_ciconst struct smiapp_quirk smiapp_jt8ev1_quirk = { 2158c2ecf20Sopenharmony_ci .limits = jt8ev1_limits, 2168c2ecf20Sopenharmony_ci .post_poweron = jt8ev1_post_poweron, 2178c2ecf20Sopenharmony_ci .pre_streamon = jt8ev1_pre_streamon, 2188c2ecf20Sopenharmony_ci .post_streamoff = jt8ev1_post_streamoff, 2198c2ecf20Sopenharmony_ci .init = jt8ev1_init, 2208c2ecf20Sopenharmony_ci}; 2218c2ecf20Sopenharmony_ci 2228c2ecf20Sopenharmony_cistatic int tcm8500md_limits(struct smiapp_sensor *sensor) 2238c2ecf20Sopenharmony_ci{ 2248c2ecf20Sopenharmony_ci smiapp_replace_limit(sensor, SMIAPP_LIMIT_MIN_PLL_IP_FREQ_HZ, 2700000); 2258c2ecf20Sopenharmony_ci 2268c2ecf20Sopenharmony_ci return 0; 2278c2ecf20Sopenharmony_ci} 2288c2ecf20Sopenharmony_ci 2298c2ecf20Sopenharmony_ciconst struct smiapp_quirk smiapp_tcm8500md_quirk = { 2308c2ecf20Sopenharmony_ci .limits = tcm8500md_limits, 2318c2ecf20Sopenharmony_ci}; 232