18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci *    Support for LG Electronics LGDT3304 and LGDT3305 - VSB/QAM
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci *    Copyright (C) 2008, 2009, 2010 Michael Krufky <mkrufky@linuxtv.org>
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#ifndef _LGDT3305_H_
98c2ecf20Sopenharmony_ci#define _LGDT3305_H_
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#include <linux/i2c.h>
128c2ecf20Sopenharmony_ci#include <media/dvb_frontend.h>
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_cienum lgdt3305_mpeg_mode {
168c2ecf20Sopenharmony_ci	LGDT3305_MPEG_PARALLEL = 0,
178c2ecf20Sopenharmony_ci	LGDT3305_MPEG_SERIAL = 1,
188c2ecf20Sopenharmony_ci};
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_cienum lgdt3305_tp_clock_edge {
218c2ecf20Sopenharmony_ci	LGDT3305_TPCLK_RISING_EDGE = 0,
228c2ecf20Sopenharmony_ci	LGDT3305_TPCLK_FALLING_EDGE = 1,
238c2ecf20Sopenharmony_ci};
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_cienum lgdt3305_tp_clock_mode {
268c2ecf20Sopenharmony_ci	LGDT3305_TPCLK_GATED = 0,
278c2ecf20Sopenharmony_ci	LGDT3305_TPCLK_FIXED = 1,
288c2ecf20Sopenharmony_ci};
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_cienum lgdt3305_tp_valid_polarity {
318c2ecf20Sopenharmony_ci	LGDT3305_TP_VALID_LOW = 0,
328c2ecf20Sopenharmony_ci	LGDT3305_TP_VALID_HIGH = 1,
338c2ecf20Sopenharmony_ci};
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_cienum lgdt_demod_chip_type {
368c2ecf20Sopenharmony_ci	LGDT3305 = 0,
378c2ecf20Sopenharmony_ci	LGDT3304 = 1,
388c2ecf20Sopenharmony_ci};
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_cistruct lgdt3305_config {
418c2ecf20Sopenharmony_ci	u8 i2c_addr;
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci	/* user defined IF frequency in KHz */
448c2ecf20Sopenharmony_ci	u16 qam_if_khz;
458c2ecf20Sopenharmony_ci	u16 vsb_if_khz;
468c2ecf20Sopenharmony_ci
478c2ecf20Sopenharmony_ci	/* AGC Power reference - defaults are used if left unset */
488c2ecf20Sopenharmony_ci	u16 usref_8vsb;   /* default: 0x32c4 */
498c2ecf20Sopenharmony_ci	u16 usref_qam64;  /* default: 0x5400 */
508c2ecf20Sopenharmony_ci	u16 usref_qam256; /* default: 0x2a80 */
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci	/* disable i2c repeater - 0:repeater enabled 1:repeater disabled */
538c2ecf20Sopenharmony_ci	unsigned int deny_i2c_rptr:1;
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci	/* spectral inversion - 0:disabled 1:enabled */
568c2ecf20Sopenharmony_ci	unsigned int spectral_inversion:1;
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci	/* use RF AGC loop - 0:disabled 1:enabled */
598c2ecf20Sopenharmony_ci	unsigned int rf_agc_loop:1;
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ci	enum lgdt3305_mpeg_mode mpeg_mode;
628c2ecf20Sopenharmony_ci	enum lgdt3305_tp_clock_edge tpclk_edge;
638c2ecf20Sopenharmony_ci	enum lgdt3305_tp_clock_mode tpclk_mode;
648c2ecf20Sopenharmony_ci	enum lgdt3305_tp_valid_polarity tpvalid_polarity;
658c2ecf20Sopenharmony_ci	enum lgdt_demod_chip_type demod_chip;
668c2ecf20Sopenharmony_ci};
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci#if IS_REACHABLE(CONFIG_DVB_LGDT3305)
698c2ecf20Sopenharmony_ciextern
708c2ecf20Sopenharmony_cistruct dvb_frontend *lgdt3305_attach(const struct lgdt3305_config *config,
718c2ecf20Sopenharmony_ci				     struct i2c_adapter *i2c_adap);
728c2ecf20Sopenharmony_ci#else
738c2ecf20Sopenharmony_cistatic inline
748c2ecf20Sopenharmony_cistruct dvb_frontend *lgdt3305_attach(const struct lgdt3305_config *config,
758c2ecf20Sopenharmony_ci				     struct i2c_adapter *i2c_adap)
768c2ecf20Sopenharmony_ci{
778c2ecf20Sopenharmony_ci	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
788c2ecf20Sopenharmony_ci	return NULL;
798c2ecf20Sopenharmony_ci}
808c2ecf20Sopenharmony_ci#endif /* CONFIG_DVB_LGDT3305 */
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ci#endif /* _LGDT3305_H_ */
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