18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (C) 2012 Advanced Micro Devices, Inc. 48c2ecf20Sopenharmony_ci * Author: Joerg Roedel <jroedel@suse.de> 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * This header file contains stuff that is shared between different interrupt 78c2ecf20Sopenharmony_ci * remapping drivers but with no need to be visible outside of the IOMMU layer. 88c2ecf20Sopenharmony_ci */ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#ifndef __IRQ_REMAPPING_H 118c2ecf20Sopenharmony_ci#define __IRQ_REMAPPING_H 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci#ifdef CONFIG_IRQ_REMAP 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_cistruct irq_data; 168c2ecf20Sopenharmony_cistruct msi_msg; 178c2ecf20Sopenharmony_cistruct irq_domain; 188c2ecf20Sopenharmony_cistruct irq_alloc_info; 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ciextern int irq_remap_broken; 218c2ecf20Sopenharmony_ciextern int disable_sourceid_checking; 228c2ecf20Sopenharmony_ciextern int no_x2apic_optout; 238c2ecf20Sopenharmony_ciextern int irq_remapping_enabled; 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ciextern int disable_irq_post; 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_cistruct irq_remap_ops { 288c2ecf20Sopenharmony_ci /* The supported capabilities */ 298c2ecf20Sopenharmony_ci int capability; 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci /* Initializes hardware and makes it ready for remapping interrupts */ 328c2ecf20Sopenharmony_ci int (*prepare)(void); 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci /* Enables the remapping hardware */ 358c2ecf20Sopenharmony_ci int (*enable)(void); 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci /* Disables the remapping hardware */ 388c2ecf20Sopenharmony_ci void (*disable)(void); 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci /* Reenables the remapping hardware */ 418c2ecf20Sopenharmony_ci int (*reenable)(int); 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci /* Enable fault handling */ 448c2ecf20Sopenharmony_ci int (*enable_faulting)(void); 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci /* Get the irqdomain associated to IOMMU device */ 478c2ecf20Sopenharmony_ci struct irq_domain *(*get_irq_domain)(struct irq_alloc_info *); 488c2ecf20Sopenharmony_ci}; 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ciextern struct irq_remap_ops intel_irq_remap_ops; 518c2ecf20Sopenharmony_ciextern struct irq_remap_ops amd_iommu_irq_ops; 528c2ecf20Sopenharmony_ciextern struct irq_remap_ops hyperv_irq_remap_ops; 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci#else /* CONFIG_IRQ_REMAP */ 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci#define irq_remapping_enabled 0 578c2ecf20Sopenharmony_ci#define irq_remap_broken 0 588c2ecf20Sopenharmony_ci#define disable_irq_post 1 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci#endif /* CONFIG_IRQ_REMAP */ 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci#endif /* __IRQ_REMAPPING_H */ 63