1// SPDX-License-Identifier: GPL-2.0 2// 3// Freescale i.MX6UL touchscreen controller driver 4// 5// Copyright (C) 2015 Freescale Semiconductor, Inc. 6 7#include <linux/errno.h> 8#include <linux/kernel.h> 9#include <linux/module.h> 10#include <linux/gpio/consumer.h> 11#include <linux/input.h> 12#include <linux/slab.h> 13#include <linux/completion.h> 14#include <linux/delay.h> 15#include <linux/of.h> 16#include <linux/interrupt.h> 17#include <linux/platform_device.h> 18#include <linux/clk.h> 19#include <linux/io.h> 20#include <linux/log2.h> 21 22/* ADC configuration registers field define */ 23#define ADC_AIEN (0x1 << 7) 24#define ADC_CONV_DISABLE 0x1F 25#define ADC_AVGE (0x1 << 5) 26#define ADC_CAL (0x1 << 7) 27#define ADC_CALF 0x2 28#define ADC_12BIT_MODE (0x2 << 2) 29#define ADC_CONV_MODE_MASK (0x3 << 2) 30#define ADC_IPG_CLK 0x00 31#define ADC_INPUT_CLK_MASK 0x3 32#define ADC_CLK_DIV_8 (0x03 << 5) 33#define ADC_CLK_DIV_MASK (0x3 << 5) 34#define ADC_SHORT_SAMPLE_MODE (0x0 << 4) 35#define ADC_SAMPLE_MODE_MASK (0x1 << 4) 36#define ADC_HARDWARE_TRIGGER (0x1 << 13) 37#define ADC_AVGS_SHIFT 14 38#define ADC_AVGS_MASK (0x3 << 14) 39#define SELECT_CHANNEL_4 0x04 40#define SELECT_CHANNEL_1 0x01 41#define DISABLE_CONVERSION_INT (0x0 << 7) 42 43/* ADC registers */ 44#define REG_ADC_HC0 0x00 45#define REG_ADC_HC1 0x04 46#define REG_ADC_HC2 0x08 47#define REG_ADC_HC3 0x0C 48#define REG_ADC_HC4 0x10 49#define REG_ADC_HS 0x14 50#define REG_ADC_R0 0x18 51#define REG_ADC_CFG 0x2C 52#define REG_ADC_GC 0x30 53#define REG_ADC_GS 0x34 54 55#define ADC_TIMEOUT msecs_to_jiffies(100) 56 57/* TSC registers */ 58#define REG_TSC_BASIC_SETING 0x00 59#define REG_TSC_PRE_CHARGE_TIME 0x10 60#define REG_TSC_FLOW_CONTROL 0x20 61#define REG_TSC_MEASURE_VALUE 0x30 62#define REG_TSC_INT_EN 0x40 63#define REG_TSC_INT_SIG_EN 0x50 64#define REG_TSC_INT_STATUS 0x60 65#define REG_TSC_DEBUG_MODE 0x70 66#define REG_TSC_DEBUG_MODE2 0x80 67 68/* TSC configuration registers field define */ 69#define DETECT_4_WIRE_MODE (0x0 << 4) 70#define AUTO_MEASURE 0x1 71#define MEASURE_SIGNAL 0x1 72#define DETECT_SIGNAL (0x1 << 4) 73#define VALID_SIGNAL (0x1 << 8) 74#define MEASURE_INT_EN 0x1 75#define MEASURE_SIG_EN 0x1 76#define VALID_SIG_EN (0x1 << 8) 77#define DE_GLITCH_2 (0x2 << 29) 78#define START_SENSE (0x1 << 12) 79#define TSC_DISABLE (0x1 << 16) 80#define DETECT_MODE 0x2 81 82struct imx6ul_tsc { 83 struct device *dev; 84 struct input_dev *input; 85 void __iomem *tsc_regs; 86 void __iomem *adc_regs; 87 struct clk *tsc_clk; 88 struct clk *adc_clk; 89 struct gpio_desc *xnur_gpio; 90 91 u32 measure_delay_time; 92 u32 pre_charge_time; 93 bool average_enable; 94 u32 average_select; 95 96 struct completion completion; 97}; 98 99/* 100 * TSC module need ADC to get the measure value. So 101 * before config TSC, we should initialize ADC module. 102 */ 103static int imx6ul_adc_init(struct imx6ul_tsc *tsc) 104{ 105 u32 adc_hc = 0; 106 u32 adc_gc; 107 u32 adc_gs; 108 u32 adc_cfg; 109 unsigned long timeout; 110 111 reinit_completion(&tsc->completion); 112 113 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); 114 adc_cfg &= ~(ADC_CONV_MODE_MASK | ADC_INPUT_CLK_MASK); 115 adc_cfg |= ADC_12BIT_MODE | ADC_IPG_CLK; 116 adc_cfg &= ~(ADC_CLK_DIV_MASK | ADC_SAMPLE_MODE_MASK); 117 adc_cfg |= ADC_CLK_DIV_8 | ADC_SHORT_SAMPLE_MODE; 118 if (tsc->average_enable) { 119 adc_cfg &= ~ADC_AVGS_MASK; 120 adc_cfg |= (tsc->average_select) << ADC_AVGS_SHIFT; 121 } 122 adc_cfg &= ~ADC_HARDWARE_TRIGGER; 123 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); 124 125 /* enable calibration interrupt */ 126 adc_hc |= ADC_AIEN; 127 adc_hc |= ADC_CONV_DISABLE; 128 writel(adc_hc, tsc->adc_regs + REG_ADC_HC0); 129 130 /* start ADC calibration */ 131 adc_gc = readl(tsc->adc_regs + REG_ADC_GC); 132 adc_gc |= ADC_CAL; 133 if (tsc->average_enable) 134 adc_gc |= ADC_AVGE; 135 writel(adc_gc, tsc->adc_regs + REG_ADC_GC); 136 137 timeout = wait_for_completion_timeout 138 (&tsc->completion, ADC_TIMEOUT); 139 if (timeout == 0) { 140 dev_err(tsc->dev, "Timeout for adc calibration\n"); 141 return -ETIMEDOUT; 142 } 143 144 adc_gs = readl(tsc->adc_regs + REG_ADC_GS); 145 if (adc_gs & ADC_CALF) { 146 dev_err(tsc->dev, "ADC calibration failed\n"); 147 return -EINVAL; 148 } 149 150 /* TSC need the ADC work in hardware trigger */ 151 adc_cfg = readl(tsc->adc_regs + REG_ADC_CFG); 152 adc_cfg |= ADC_HARDWARE_TRIGGER; 153 writel(adc_cfg, tsc->adc_regs + REG_ADC_CFG); 154 155 return 0; 156} 157 158/* 159 * This is a TSC workaround. Currently TSC misconnect two 160 * ADC channels, this function remap channel configure for 161 * hardware trigger. 162 */ 163static void imx6ul_tsc_channel_config(struct imx6ul_tsc *tsc) 164{ 165 u32 adc_hc0, adc_hc1, adc_hc2, adc_hc3, adc_hc4; 166 167 adc_hc0 = DISABLE_CONVERSION_INT; 168 writel(adc_hc0, tsc->adc_regs + REG_ADC_HC0); 169 170 adc_hc1 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_4; 171 writel(adc_hc1, tsc->adc_regs + REG_ADC_HC1); 172 173 adc_hc2 = DISABLE_CONVERSION_INT; 174 writel(adc_hc2, tsc->adc_regs + REG_ADC_HC2); 175 176 adc_hc3 = DISABLE_CONVERSION_INT | SELECT_CHANNEL_1; 177 writel(adc_hc3, tsc->adc_regs + REG_ADC_HC3); 178 179 adc_hc4 = DISABLE_CONVERSION_INT; 180 writel(adc_hc4, tsc->adc_regs + REG_ADC_HC4); 181} 182 183/* 184 * TSC setting, confige the pre-charge time and measure delay time. 185 * different touch screen may need different pre-charge time and 186 * measure delay time. 187 */ 188static void imx6ul_tsc_set(struct imx6ul_tsc *tsc) 189{ 190 u32 basic_setting = 0; 191 u32 start; 192 193 basic_setting |= tsc->measure_delay_time << 8; 194 basic_setting |= DETECT_4_WIRE_MODE | AUTO_MEASURE; 195 writel(basic_setting, tsc->tsc_regs + REG_TSC_BASIC_SETING); 196 197 writel(DE_GLITCH_2, tsc->tsc_regs + REG_TSC_DEBUG_MODE2); 198 199 writel(tsc->pre_charge_time, tsc->tsc_regs + REG_TSC_PRE_CHARGE_TIME); 200 writel(MEASURE_INT_EN, tsc->tsc_regs + REG_TSC_INT_EN); 201 writel(MEASURE_SIG_EN | VALID_SIG_EN, 202 tsc->tsc_regs + REG_TSC_INT_SIG_EN); 203 204 /* start sense detection */ 205 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 206 start |= START_SENSE; 207 start &= ~TSC_DISABLE; 208 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 209} 210 211static int imx6ul_tsc_init(struct imx6ul_tsc *tsc) 212{ 213 int err; 214 215 err = imx6ul_adc_init(tsc); 216 if (err) 217 return err; 218 imx6ul_tsc_channel_config(tsc); 219 imx6ul_tsc_set(tsc); 220 221 return 0; 222} 223 224static void imx6ul_tsc_disable(struct imx6ul_tsc *tsc) 225{ 226 u32 tsc_flow; 227 u32 adc_cfg; 228 229 /* TSC controller enters to idle status */ 230 tsc_flow = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 231 tsc_flow |= TSC_DISABLE; 232 writel(tsc_flow, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 233 234 /* ADC controller enters to stop mode */ 235 adc_cfg = readl(tsc->adc_regs + REG_ADC_HC0); 236 adc_cfg |= ADC_CONV_DISABLE; 237 writel(adc_cfg, tsc->adc_regs + REG_ADC_HC0); 238} 239 240/* Delay some time (max 2ms), wait the pre-charge done. */ 241static bool tsc_wait_detect_mode(struct imx6ul_tsc *tsc) 242{ 243 unsigned long timeout = jiffies + msecs_to_jiffies(2); 244 u32 state_machine; 245 u32 debug_mode2; 246 247 do { 248 if (time_after(jiffies, timeout)) 249 return false; 250 251 usleep_range(200, 400); 252 debug_mode2 = readl(tsc->tsc_regs + REG_TSC_DEBUG_MODE2); 253 state_machine = (debug_mode2 >> 20) & 0x7; 254 } while (state_machine != DETECT_MODE); 255 256 usleep_range(200, 400); 257 return true; 258} 259 260static irqreturn_t tsc_irq_fn(int irq, void *dev_id) 261{ 262 struct imx6ul_tsc *tsc = dev_id; 263 u32 status; 264 u32 value; 265 u32 x, y; 266 u32 start; 267 268 status = readl(tsc->tsc_regs + REG_TSC_INT_STATUS); 269 270 /* write 1 to clear the bit measure-signal */ 271 writel(MEASURE_SIGNAL | DETECT_SIGNAL, 272 tsc->tsc_regs + REG_TSC_INT_STATUS); 273 274 /* It's a HW self-clean bit. Set this bit and start sense detection */ 275 start = readl(tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 276 start |= START_SENSE; 277 writel(start, tsc->tsc_regs + REG_TSC_FLOW_CONTROL); 278 279 if (status & MEASURE_SIGNAL) { 280 value = readl(tsc->tsc_regs + REG_TSC_MEASURE_VALUE); 281 x = (value >> 16) & 0x0fff; 282 y = value & 0x0fff; 283 284 /* 285 * In detect mode, we can get the xnur gpio value, 286 * otherwise assume contact is stiull active. 287 */ 288 if (!tsc_wait_detect_mode(tsc) || 289 gpiod_get_value_cansleep(tsc->xnur_gpio)) { 290 input_report_key(tsc->input, BTN_TOUCH, 1); 291 input_report_abs(tsc->input, ABS_X, x); 292 input_report_abs(tsc->input, ABS_Y, y); 293 } else { 294 input_report_key(tsc->input, BTN_TOUCH, 0); 295 } 296 297 input_sync(tsc->input); 298 } 299 300 return IRQ_HANDLED; 301} 302 303static irqreturn_t adc_irq_fn(int irq, void *dev_id) 304{ 305 struct imx6ul_tsc *tsc = dev_id; 306 u32 coco; 307 u32 value; 308 309 coco = readl(tsc->adc_regs + REG_ADC_HS); 310 if (coco & 0x01) { 311 value = readl(tsc->adc_regs + REG_ADC_R0); 312 complete(&tsc->completion); 313 } 314 315 return IRQ_HANDLED; 316} 317 318static int imx6ul_tsc_start(struct imx6ul_tsc *tsc) 319{ 320 int err; 321 322 err = clk_prepare_enable(tsc->adc_clk); 323 if (err) { 324 dev_err(tsc->dev, 325 "Could not prepare or enable the adc clock: %d\n", 326 err); 327 return err; 328 } 329 330 err = clk_prepare_enable(tsc->tsc_clk); 331 if (err) { 332 dev_err(tsc->dev, 333 "Could not prepare or enable the tsc clock: %d\n", 334 err); 335 goto disable_adc_clk; 336 } 337 338 err = imx6ul_tsc_init(tsc); 339 if (err) 340 goto disable_tsc_clk; 341 342 return 0; 343 344disable_tsc_clk: 345 clk_disable_unprepare(tsc->tsc_clk); 346disable_adc_clk: 347 clk_disable_unprepare(tsc->adc_clk); 348 return err; 349} 350 351static void imx6ul_tsc_stop(struct imx6ul_tsc *tsc) 352{ 353 imx6ul_tsc_disable(tsc); 354 355 clk_disable_unprepare(tsc->tsc_clk); 356 clk_disable_unprepare(tsc->adc_clk); 357} 358 359 360static int imx6ul_tsc_open(struct input_dev *input_dev) 361{ 362 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev); 363 364 return imx6ul_tsc_start(tsc); 365} 366 367static void imx6ul_tsc_close(struct input_dev *input_dev) 368{ 369 struct imx6ul_tsc *tsc = input_get_drvdata(input_dev); 370 371 imx6ul_tsc_stop(tsc); 372} 373 374static int imx6ul_tsc_probe(struct platform_device *pdev) 375{ 376 struct device_node *np = pdev->dev.of_node; 377 struct imx6ul_tsc *tsc; 378 struct input_dev *input_dev; 379 int err; 380 int tsc_irq; 381 int adc_irq; 382 u32 average_samples; 383 384 tsc = devm_kzalloc(&pdev->dev, sizeof(*tsc), GFP_KERNEL); 385 if (!tsc) 386 return -ENOMEM; 387 388 input_dev = devm_input_allocate_device(&pdev->dev); 389 if (!input_dev) 390 return -ENOMEM; 391 392 input_dev->name = "iMX6UL Touchscreen Controller"; 393 input_dev->id.bustype = BUS_HOST; 394 395 input_dev->open = imx6ul_tsc_open; 396 input_dev->close = imx6ul_tsc_close; 397 398 input_set_capability(input_dev, EV_KEY, BTN_TOUCH); 399 input_set_abs_params(input_dev, ABS_X, 0, 0xFFF, 0, 0); 400 input_set_abs_params(input_dev, ABS_Y, 0, 0xFFF, 0, 0); 401 402 input_set_drvdata(input_dev, tsc); 403 404 tsc->dev = &pdev->dev; 405 tsc->input = input_dev; 406 init_completion(&tsc->completion); 407 408 tsc->xnur_gpio = devm_gpiod_get(&pdev->dev, "xnur", GPIOD_IN); 409 if (IS_ERR(tsc->xnur_gpio)) { 410 err = PTR_ERR(tsc->xnur_gpio); 411 dev_err(&pdev->dev, 412 "failed to request GPIO tsc_X- (xnur): %d\n", err); 413 return err; 414 } 415 416 tsc->tsc_regs = devm_platform_ioremap_resource(pdev, 0); 417 if (IS_ERR(tsc->tsc_regs)) { 418 err = PTR_ERR(tsc->tsc_regs); 419 dev_err(&pdev->dev, "failed to remap tsc memory: %d\n", err); 420 return err; 421 } 422 423 tsc->adc_regs = devm_platform_ioremap_resource(pdev, 1); 424 if (IS_ERR(tsc->adc_regs)) { 425 err = PTR_ERR(tsc->adc_regs); 426 dev_err(&pdev->dev, "failed to remap adc memory: %d\n", err); 427 return err; 428 } 429 430 tsc->tsc_clk = devm_clk_get(&pdev->dev, "tsc"); 431 if (IS_ERR(tsc->tsc_clk)) { 432 err = PTR_ERR(tsc->tsc_clk); 433 dev_err(&pdev->dev, "failed getting tsc clock: %d\n", err); 434 return err; 435 } 436 437 tsc->adc_clk = devm_clk_get(&pdev->dev, "adc"); 438 if (IS_ERR(tsc->adc_clk)) { 439 err = PTR_ERR(tsc->adc_clk); 440 dev_err(&pdev->dev, "failed getting adc clock: %d\n", err); 441 return err; 442 } 443 444 tsc_irq = platform_get_irq(pdev, 0); 445 if (tsc_irq < 0) 446 return tsc_irq; 447 448 adc_irq = platform_get_irq(pdev, 1); 449 if (adc_irq < 0) 450 return adc_irq; 451 452 err = devm_request_threaded_irq(tsc->dev, tsc_irq, 453 NULL, tsc_irq_fn, IRQF_ONESHOT, 454 dev_name(&pdev->dev), tsc); 455 if (err) { 456 dev_err(&pdev->dev, 457 "failed requesting tsc irq %d: %d\n", 458 tsc_irq, err); 459 return err; 460 } 461 462 err = devm_request_irq(tsc->dev, adc_irq, adc_irq_fn, 0, 463 dev_name(&pdev->dev), tsc); 464 if (err) { 465 dev_err(&pdev->dev, 466 "failed requesting adc irq %d: %d\n", 467 adc_irq, err); 468 return err; 469 } 470 471 err = of_property_read_u32(np, "measure-delay-time", 472 &tsc->measure_delay_time); 473 if (err) 474 tsc->measure_delay_time = 0xffff; 475 476 err = of_property_read_u32(np, "pre-charge-time", 477 &tsc->pre_charge_time); 478 if (err) 479 tsc->pre_charge_time = 0xfff; 480 481 err = of_property_read_u32(np, "touchscreen-average-samples", 482 &average_samples); 483 if (err) 484 average_samples = 1; 485 486 switch (average_samples) { 487 case 1: 488 tsc->average_enable = false; 489 tsc->average_select = 0; /* value unused; initialize anyway */ 490 break; 491 case 4: 492 case 8: 493 case 16: 494 case 32: 495 tsc->average_enable = true; 496 tsc->average_select = ilog2(average_samples) - 2; 497 break; 498 default: 499 dev_err(&pdev->dev, 500 "touchscreen-average-samples (%u) must be 1, 4, 8, 16 or 32\n", 501 average_samples); 502 return -EINVAL; 503 } 504 505 err = input_register_device(tsc->input); 506 if (err) { 507 dev_err(&pdev->dev, 508 "failed to register input device: %d\n", err); 509 return err; 510 } 511 512 platform_set_drvdata(pdev, tsc); 513 return 0; 514} 515 516static int __maybe_unused imx6ul_tsc_suspend(struct device *dev) 517{ 518 struct platform_device *pdev = to_platform_device(dev); 519 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev); 520 struct input_dev *input_dev = tsc->input; 521 522 mutex_lock(&input_dev->mutex); 523 524 if (input_dev->users) 525 imx6ul_tsc_stop(tsc); 526 527 mutex_unlock(&input_dev->mutex); 528 529 return 0; 530} 531 532static int __maybe_unused imx6ul_tsc_resume(struct device *dev) 533{ 534 struct platform_device *pdev = to_platform_device(dev); 535 struct imx6ul_tsc *tsc = platform_get_drvdata(pdev); 536 struct input_dev *input_dev = tsc->input; 537 int retval = 0; 538 539 mutex_lock(&input_dev->mutex); 540 541 if (input_dev->users) 542 retval = imx6ul_tsc_start(tsc); 543 544 mutex_unlock(&input_dev->mutex); 545 546 return retval; 547} 548 549static SIMPLE_DEV_PM_OPS(imx6ul_tsc_pm_ops, 550 imx6ul_tsc_suspend, imx6ul_tsc_resume); 551 552static const struct of_device_id imx6ul_tsc_match[] = { 553 { .compatible = "fsl,imx6ul-tsc", }, 554 { /* sentinel */ } 555}; 556MODULE_DEVICE_TABLE(of, imx6ul_tsc_match); 557 558static struct platform_driver imx6ul_tsc_driver = { 559 .driver = { 560 .name = "imx6ul-tsc", 561 .of_match_table = imx6ul_tsc_match, 562 .pm = &imx6ul_tsc_pm_ops, 563 }, 564 .probe = imx6ul_tsc_probe, 565}; 566module_platform_driver(imx6ul_tsc_driver); 567 568MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>"); 569MODULE_DESCRIPTION("Freescale i.MX6UL Touchscreen controller driver"); 570MODULE_LICENSE("GPL v2"); 571