1/*******************************************************************************
2*
3* Copyright (c) 2015-2016 Intel Corporation.  All rights reserved.
4*
5* This software is available to you under a choice of one of two
6* licenses.  You may choose to be licensed under the terms of the GNU
7* General Public License (GPL) Version 2, available from the file
8* COPYING in the main directory of this source tree, or the
9* OpenFabrics.org BSD license below:
10*
11*   Redistribution and use in source and binary forms, with or
12*   without modification, are permitted provided that the following
13*   conditions are met:
14*
15*    - Redistributions of source code must retain the above
16*	copyright notice, this list of conditions and the following
17*	disclaimer.
18*
19*    - Redistributions in binary form must reproduce the above
20*	copyright notice, this list of conditions and the following
21*	disclaimer in the documentation and/or other materials
22*	provided with the distribution.
23*
24* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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30* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31* SOFTWARE.
32*
33*******************************************************************************/
34
35#ifndef I40IW_P_H
36#define I40IW_P_H
37
38#define PAUSE_TIMER_VALUE       0xFFFF
39#define REFRESH_THRESHOLD       0x7FFF
40#define HIGH_THRESHOLD          0x800
41#define LOW_THRESHOLD           0x200
42#define ALL_TC2PFC              0xFF
43#define CQP_COMPL_WAIT_TIME     0x3E8
44#define CQP_TIMEOUT_THRESHOLD   5
45
46void i40iw_debug_buf(struct i40iw_sc_dev *dev, enum i40iw_debug_flag mask,
47		     char *desc, u64 *buf, u32 size);
48/* init operations */
49enum i40iw_status_code i40iw_device_init(struct i40iw_sc_dev *dev,
50					 struct i40iw_device_init_info *info);
51
52void i40iw_sc_cqp_post_sq(struct i40iw_sc_cqp *cqp);
53
54u64 *i40iw_sc_cqp_get_next_send_wqe(struct i40iw_sc_cqp *cqp, u64 scratch);
55
56void i40iw_check_cqp_progress(struct i40iw_cqp_timeout *cqp_timeout, struct i40iw_sc_dev *dev);
57
58enum i40iw_status_code i40iw_sc_mr_fast_register(struct i40iw_sc_qp *qp,
59						 struct i40iw_fast_reg_stag_info *info,
60						 bool post_sq);
61
62void i40iw_insert_wqe_hdr(u64 *wqe, u64 header);
63
64/* HMC/FPM functions */
65enum i40iw_status_code i40iw_sc_init_iw_hmc(struct i40iw_sc_dev *dev,
66					    u8 hmc_fn_id);
67
68enum i40iw_status_code i40iw_pf_init_vfhmc(struct i40iw_sc_dev *dev, u8 vf_hmc_fn_id,
69					   u32 *vf_cnt_array);
70
71/* stats functions */
72void i40iw_hw_stats_refresh_all(struct i40iw_vsi_pestat *stats);
73void i40iw_hw_stats_read_all(struct i40iw_vsi_pestat *stats, struct i40iw_dev_hw_stats *stats_values);
74void i40iw_hw_stats_read_32(struct i40iw_vsi_pestat *stats,
75			    enum i40iw_hw_stats_index_32b index,
76			    u64 *value);
77void i40iw_hw_stats_read_64(struct i40iw_vsi_pestat *stats,
78			    enum i40iw_hw_stats_index_64b index,
79			    u64 *value);
80void i40iw_hw_stats_init(struct i40iw_vsi_pestat *stats, u8 index, bool is_pf);
81
82/* vsi misc functions */
83enum i40iw_status_code i40iw_vsi_stats_init(struct i40iw_sc_vsi *vsi, struct i40iw_vsi_stats_info *info);
84void i40iw_vsi_stats_free(struct i40iw_sc_vsi *vsi);
85void i40iw_sc_vsi_init(struct i40iw_sc_vsi *vsi, struct i40iw_vsi_init_info *info);
86
87void i40iw_change_l2params(struct i40iw_sc_vsi *vsi, struct i40iw_l2params *l2params);
88void i40iw_qp_add_qos(struct i40iw_sc_qp *qp);
89void i40iw_qp_rem_qos(struct i40iw_sc_qp *qp);
90void i40iw_terminate_send_fin(struct i40iw_sc_qp *qp);
91
92void i40iw_terminate_connection(struct i40iw_sc_qp *qp, struct i40iw_aeqe_info *info);
93
94void i40iw_terminate_received(struct i40iw_sc_qp *qp, struct i40iw_aeqe_info *info);
95
96enum i40iw_status_code i40iw_sc_suspend_qp(struct i40iw_sc_cqp *cqp,
97					   struct i40iw_sc_qp *qp, u64 scratch);
98
99enum i40iw_status_code i40iw_sc_resume_qp(struct i40iw_sc_cqp *cqp,
100					  struct i40iw_sc_qp *qp, u64 scratch);
101
102enum i40iw_status_code i40iw_sc_static_hmc_pages_allocated(struct i40iw_sc_cqp *cqp,
103							   u64 scratch, u8 hmc_fn_id,
104							   bool post_sq,
105							   bool poll_registers);
106
107enum i40iw_status_code i40iw_config_fpm_values(struct i40iw_sc_dev *dev, u32 qp_count);
108enum i40iw_status_code i40iw_get_rdma_features(struct i40iw_sc_dev *dev);
109
110void free_sd_mem(struct i40iw_sc_dev *dev);
111
112enum i40iw_status_code i40iw_process_cqp_cmd(struct i40iw_sc_dev *dev,
113					     struct cqp_commands_info *pcmdinfo);
114
115enum i40iw_status_code i40iw_process_bh(struct i40iw_sc_dev *dev);
116
117/* prototype for functions used for dynamic memory allocation */
118enum i40iw_status_code i40iw_allocate_dma_mem(struct i40iw_hw *hw,
119					      struct i40iw_dma_mem *mem, u64 size,
120					      u32 alignment);
121void i40iw_free_dma_mem(struct i40iw_hw *hw, struct i40iw_dma_mem *mem);
122enum i40iw_status_code i40iw_allocate_virt_mem(struct i40iw_hw *hw,
123					       struct i40iw_virt_mem *mem, u32 size);
124enum i40iw_status_code i40iw_free_virt_mem(struct i40iw_hw *hw,
125					   struct i40iw_virt_mem *mem);
126u8 i40iw_get_encoded_wqe_size(u32 wqsize, bool cqpsq);
127void i40iw_reinitialize_ieq(struct i40iw_sc_dev *dev);
128
129#endif
130