1/*
2 * Copyright (c) 2016 Hisilicon Limited.
3 * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses.  You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 *     Redistribution and use in source and binary forms, with or
12 *     without modification, are permitted provided that the following
13 *     conditions are met:
14 *
15 *      - Redistributions of source code must retain the above
16 *        copyright notice, this list of conditions and the following
17 *        disclaimer.
18 *
19 *      - Redistributions in binary form must reproduce the above
20 *        copyright notice, this list of conditions and the following
21 *        disclaimer in the documentation and/or other materials
22 *        provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34#ifndef _HNS_ROCE_HEM_H
35#define _HNS_ROCE_HEM_H
36
37#define HEM_HOP_STEP_DIRECT 0xff
38
39enum {
40	/* MAP HEM(Hardware Entry Memory) */
41	HEM_TYPE_QPC = 0,
42	HEM_TYPE_MTPT,
43	HEM_TYPE_CQC,
44	HEM_TYPE_SRQC,
45	HEM_TYPE_SCCC,
46	HEM_TYPE_QPC_TIMER,
47	HEM_TYPE_CQC_TIMER,
48
49	 /* UNMAP HEM */
50	HEM_TYPE_MTT,
51	HEM_TYPE_CQE,
52	HEM_TYPE_SRQWQE,
53	HEM_TYPE_IDX,
54	HEM_TYPE_IRRL,
55	HEM_TYPE_TRRL,
56};
57
58#define HNS_ROCE_HEM_CHUNK_LEN	\
59	 ((256 - sizeof(struct list_head) - 2 * sizeof(int)) /	 \
60	 (sizeof(struct scatterlist) + sizeof(void *)))
61
62#define check_whether_bt_num_3(type, hop_num) \
63	(type < HEM_TYPE_MTT && hop_num == 2)
64
65#define check_whether_bt_num_2(type, hop_num) \
66	((type < HEM_TYPE_MTT && hop_num == 1) || \
67	(type >= HEM_TYPE_MTT && hop_num == 2))
68
69#define check_whether_bt_num_1(type, hop_num) \
70	((type < HEM_TYPE_MTT && hop_num == HNS_ROCE_HOP_NUM_0) || \
71	(type >= HEM_TYPE_MTT && hop_num == 1) || \
72	(type >= HEM_TYPE_MTT && hop_num == HNS_ROCE_HOP_NUM_0))
73
74struct hns_roce_hem_chunk {
75	struct list_head	 list;
76	int			 npages;
77	int			 nsg;
78	struct scatterlist	 mem[HNS_ROCE_HEM_CHUNK_LEN];
79	void			 *buf[HNS_ROCE_HEM_CHUNK_LEN];
80};
81
82struct hns_roce_hem {
83	struct list_head chunk_list;
84	refcount_t refcount;
85};
86
87struct hns_roce_hem_iter {
88	struct hns_roce_hem		 *hem;
89	struct hns_roce_hem_chunk	 *chunk;
90	int				 page_idx;
91};
92
93struct hns_roce_hem_mhop {
94	u32	hop_num;
95	u32	buf_chunk_size;
96	u32	bt_chunk_size;
97	u32	ba_l0_num;
98	u32	l0_idx; /* level 0 base address table index */
99	u32	l1_idx; /* level 1 base address table index */
100	u32	l2_idx; /* level 2 base address table index */
101};
102
103void hns_roce_free_hem(struct hns_roce_dev *hr_dev, struct hns_roce_hem *hem);
104int hns_roce_table_get(struct hns_roce_dev *hr_dev,
105		       struct hns_roce_hem_table *table, unsigned long obj);
106void hns_roce_table_put(struct hns_roce_dev *hr_dev,
107			struct hns_roce_hem_table *table, unsigned long obj);
108void *hns_roce_table_find(struct hns_roce_dev *hr_dev,
109			  struct hns_roce_hem_table *table, unsigned long obj,
110			  dma_addr_t *dma_handle);
111int hns_roce_init_hem_table(struct hns_roce_dev *hr_dev,
112			    struct hns_roce_hem_table *table, u32 type,
113			    unsigned long obj_size, unsigned long nobj,
114			    int use_lowmem);
115void hns_roce_cleanup_hem_table(struct hns_roce_dev *hr_dev,
116				struct hns_roce_hem_table *table);
117void hns_roce_cleanup_hem(struct hns_roce_dev *hr_dev);
118int hns_roce_calc_hem_mhop(struct hns_roce_dev *hr_dev,
119			   struct hns_roce_hem_table *table, unsigned long *obj,
120			   struct hns_roce_hem_mhop *mhop);
121bool hns_roce_check_whether_mhop(struct hns_roce_dev *hr_dev, u32 type);
122
123void hns_roce_hem_list_init(struct hns_roce_hem_list *hem_list);
124int hns_roce_hem_list_calc_root_ba(const struct hns_roce_buf_region *regions,
125				   int region_cnt, int unit);
126int hns_roce_hem_list_request(struct hns_roce_dev *hr_dev,
127			      struct hns_roce_hem_list *hem_list,
128			      const struct hns_roce_buf_region *regions,
129			      int region_cnt, unsigned int bt_pg_shift);
130void hns_roce_hem_list_release(struct hns_roce_dev *hr_dev,
131			       struct hns_roce_hem_list *hem_list);
132void *hns_roce_hem_list_find_mtt(struct hns_roce_dev *hr_dev,
133				 struct hns_roce_hem_list *hem_list,
134				 int offset, int *mtt_cnt, u64 *phy_addr);
135
136static inline void hns_roce_hem_first(struct hns_roce_hem *hem,
137				      struct hns_roce_hem_iter *iter)
138{
139	iter->hem = hem;
140	iter->chunk = list_empty(&hem->chunk_list) ? NULL :
141				 list_entry(hem->chunk_list.next,
142					    struct hns_roce_hem_chunk, list);
143	iter->page_idx = 0;
144}
145
146static inline int hns_roce_hem_last(struct hns_roce_hem_iter *iter)
147{
148	return !iter->chunk;
149}
150
151static inline void hns_roce_hem_next(struct hns_roce_hem_iter *iter)
152{
153	if (++iter->page_idx >= iter->chunk->nsg) {
154		if (iter->chunk->list.next == &iter->hem->chunk_list) {
155			iter->chunk = NULL;
156			return;
157		}
158
159		iter->chunk = list_entry(iter->chunk->list.next,
160					 struct hns_roce_hem_chunk, list);
161		iter->page_idx = 0;
162	}
163}
164
165static inline dma_addr_t hns_roce_hem_addr(struct hns_roce_hem_iter *iter)
166{
167	return sg_dma_address(&iter->chunk->mem[iter->page_idx]);
168}
169
170#endif /* _HNS_ROCE_HEM_H */
171