1/* 2 * Copyright(c) 2017 - 2018 Intel Corporation. 3 * 4 * This file is provided under a dual BSD/GPLv2 license. When using or 5 * redistributing this file, you may do so under either license. 6 * 7 * GPL LICENSE SUMMARY 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of version 2 of the GNU General Public License as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 * 18 * BSD LICENSE 19 * 20 * Redistribution and use in source and binary forms, with or without 21 * modification, are permitted provided that the following conditions 22 * are met: 23 * 24 * - Redistributions of source code must retain the above copyright 25 * notice, this list of conditions and the following disclaimer. 26 * - Redistributions in binary form must reproduce the above copyright 27 * notice, this list of conditions and the following disclaimer in 28 * the documentation and/or other materials provided with the 29 * distribution. 30 * - Neither the name of Intel Corporation nor the names of its 31 * contributors may be used to endorse or promote products derived 32 * from this software without specific prior written permission. 33 * 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 35 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 36 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 37 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 38 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 39 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 40 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 41 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 42 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 43 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 44 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 45 * 46 */ 47 48/* 49 * This file contains HFI1 support for VNIC SDMA functionality 50 */ 51 52#include "sdma.h" 53#include "vnic.h" 54 55#define HFI1_VNIC_SDMA_Q_ACTIVE BIT(0) 56#define HFI1_VNIC_SDMA_Q_DEFERRED BIT(1) 57 58#define HFI1_VNIC_TXREQ_NAME_LEN 32 59#define HFI1_VNIC_SDMA_DESC_WTRMRK 64 60 61/* 62 * struct vnic_txreq - VNIC transmit descriptor 63 * @txreq: sdma transmit request 64 * @sdma: vnic sdma pointer 65 * @skb: skb to send 66 * @pad: pad buffer 67 * @plen: pad length 68 * @pbc_val: pbc value 69 */ 70struct vnic_txreq { 71 struct sdma_txreq txreq; 72 struct hfi1_vnic_sdma *sdma; 73 74 struct sk_buff *skb; 75 unsigned char pad[HFI1_VNIC_MAX_PAD]; 76 u16 plen; 77 __le64 pbc_val; 78}; 79 80static void vnic_sdma_complete(struct sdma_txreq *txreq, 81 int status) 82{ 83 struct vnic_txreq *tx = container_of(txreq, struct vnic_txreq, txreq); 84 struct hfi1_vnic_sdma *vnic_sdma = tx->sdma; 85 86 sdma_txclean(vnic_sdma->dd, txreq); 87 dev_kfree_skb_any(tx->skb); 88 kmem_cache_free(vnic_sdma->dd->vnic.txreq_cache, tx); 89} 90 91static noinline int build_vnic_ulp_payload(struct sdma_engine *sde, 92 struct vnic_txreq *tx) 93{ 94 int i, ret = 0; 95 96 ret = sdma_txadd_kvaddr( 97 sde->dd, 98 &tx->txreq, 99 tx->skb->data, 100 skb_headlen(tx->skb)); 101 if (unlikely(ret)) 102 goto bail_txadd; 103 104 for (i = 0; i < skb_shinfo(tx->skb)->nr_frags; i++) { 105 skb_frag_t *frag = &skb_shinfo(tx->skb)->frags[i]; 106 107 /* combine physically continuous fragments later? */ 108 ret = sdma_txadd_page(sde->dd, 109 &tx->txreq, 110 skb_frag_page(frag), 111 skb_frag_off(frag), 112 skb_frag_size(frag), 113 NULL, NULL, NULL); 114 if (unlikely(ret)) 115 goto bail_txadd; 116 } 117 118 if (tx->plen) 119 ret = sdma_txadd_kvaddr(sde->dd, &tx->txreq, 120 tx->pad + HFI1_VNIC_MAX_PAD - tx->plen, 121 tx->plen); 122 123bail_txadd: 124 return ret; 125} 126 127static int build_vnic_tx_desc(struct sdma_engine *sde, 128 struct vnic_txreq *tx, 129 u64 pbc) 130{ 131 int ret = 0; 132 u16 hdrbytes = 2 << 2; /* PBC */ 133 134 ret = sdma_txinit_ahg( 135 &tx->txreq, 136 0, 137 hdrbytes + tx->skb->len + tx->plen, 138 0, 139 0, 140 NULL, 141 0, 142 vnic_sdma_complete); 143 if (unlikely(ret)) 144 goto bail_txadd; 145 146 /* add pbc */ 147 tx->pbc_val = cpu_to_le64(pbc); 148 ret = sdma_txadd_kvaddr( 149 sde->dd, 150 &tx->txreq, 151 &tx->pbc_val, 152 hdrbytes); 153 if (unlikely(ret)) 154 goto bail_txadd; 155 156 /* add the ulp payload */ 157 ret = build_vnic_ulp_payload(sde, tx); 158bail_txadd: 159 return ret; 160} 161 162/* setup the last plen bypes of pad */ 163static inline void hfi1_vnic_update_pad(unsigned char *pad, u8 plen) 164{ 165 pad[HFI1_VNIC_MAX_PAD - 1] = plen - OPA_VNIC_ICRC_TAIL_LEN; 166} 167 168int hfi1_vnic_send_dma(struct hfi1_devdata *dd, u8 q_idx, 169 struct hfi1_vnic_vport_info *vinfo, 170 struct sk_buff *skb, u64 pbc, u8 plen) 171{ 172 struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[q_idx]; 173 struct sdma_engine *sde = vnic_sdma->sde; 174 struct vnic_txreq *tx; 175 int ret = -ECOMM; 176 177 if (unlikely(READ_ONCE(vnic_sdma->state) != HFI1_VNIC_SDMA_Q_ACTIVE)) 178 goto tx_err; 179 180 if (unlikely(!sde || !sdma_running(sde))) 181 goto tx_err; 182 183 tx = kmem_cache_alloc(dd->vnic.txreq_cache, GFP_ATOMIC); 184 if (unlikely(!tx)) { 185 ret = -ENOMEM; 186 goto tx_err; 187 } 188 189 tx->sdma = vnic_sdma; 190 tx->skb = skb; 191 hfi1_vnic_update_pad(tx->pad, plen); 192 tx->plen = plen; 193 ret = build_vnic_tx_desc(sde, tx, pbc); 194 if (unlikely(ret)) 195 goto free_desc; 196 197 ret = sdma_send_txreq(sde, iowait_get_ib_work(&vnic_sdma->wait), 198 &tx->txreq, vnic_sdma->pkts_sent); 199 /* When -ECOMM, sdma callback will be called with ABORT status */ 200 if (unlikely(ret && unlikely(ret != -ECOMM))) 201 goto free_desc; 202 203 if (!ret) { 204 vnic_sdma->pkts_sent = true; 205 iowait_starve_clear(vnic_sdma->pkts_sent, &vnic_sdma->wait); 206 } 207 return ret; 208 209free_desc: 210 sdma_txclean(dd, &tx->txreq); 211 kmem_cache_free(dd->vnic.txreq_cache, tx); 212tx_err: 213 if (ret != -EBUSY) 214 dev_kfree_skb_any(skb); 215 else 216 vnic_sdma->pkts_sent = false; 217 return ret; 218} 219 220/* 221 * hfi1_vnic_sdma_sleep - vnic sdma sleep function 222 * 223 * This function gets called from sdma_send_txreq() when there are not enough 224 * sdma descriptors available to send the packet. It adds Tx queue's wait 225 * structure to sdma engine's dmawait list to be woken up when descriptors 226 * become available. 227 */ 228static int hfi1_vnic_sdma_sleep(struct sdma_engine *sde, 229 struct iowait_work *wait, 230 struct sdma_txreq *txreq, 231 uint seq, 232 bool pkts_sent) 233{ 234 struct hfi1_vnic_sdma *vnic_sdma = 235 container_of(wait->iow, struct hfi1_vnic_sdma, wait); 236 237 write_seqlock(&sde->waitlock); 238 if (sdma_progress(sde, seq, txreq)) { 239 write_sequnlock(&sde->waitlock); 240 return -EAGAIN; 241 } 242 243 vnic_sdma->state = HFI1_VNIC_SDMA_Q_DEFERRED; 244 if (list_empty(&vnic_sdma->wait.list)) { 245 iowait_get_priority(wait->iow); 246 iowait_queue(pkts_sent, wait->iow, &sde->dmawait); 247 } 248 write_sequnlock(&sde->waitlock); 249 return -EBUSY; 250} 251 252/* 253 * hfi1_vnic_sdma_wakeup - vnic sdma wakeup function 254 * 255 * This function gets called when SDMA descriptors becomes available and Tx 256 * queue's wait structure was previously added to sdma engine's dmawait list. 257 * It notifies the upper driver about Tx queue wakeup. 258 */ 259static void hfi1_vnic_sdma_wakeup(struct iowait *wait, int reason) 260{ 261 struct hfi1_vnic_sdma *vnic_sdma = 262 container_of(wait, struct hfi1_vnic_sdma, wait); 263 struct hfi1_vnic_vport_info *vinfo = vnic_sdma->vinfo; 264 265 vnic_sdma->state = HFI1_VNIC_SDMA_Q_ACTIVE; 266 if (__netif_subqueue_stopped(vinfo->netdev, vnic_sdma->q_idx)) 267 netif_wake_subqueue(vinfo->netdev, vnic_sdma->q_idx); 268}; 269 270inline bool hfi1_vnic_sdma_write_avail(struct hfi1_vnic_vport_info *vinfo, 271 u8 q_idx) 272{ 273 struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[q_idx]; 274 275 return (READ_ONCE(vnic_sdma->state) == HFI1_VNIC_SDMA_Q_ACTIVE); 276} 277 278void hfi1_vnic_sdma_init(struct hfi1_vnic_vport_info *vinfo) 279{ 280 int i; 281 282 for (i = 0; i < vinfo->num_tx_q; i++) { 283 struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[i]; 284 285 iowait_init(&vnic_sdma->wait, 0, NULL, NULL, 286 hfi1_vnic_sdma_sleep, 287 hfi1_vnic_sdma_wakeup, NULL, NULL); 288 vnic_sdma->sde = &vinfo->dd->per_sdma[i]; 289 vnic_sdma->dd = vinfo->dd; 290 vnic_sdma->vinfo = vinfo; 291 vnic_sdma->q_idx = i; 292 vnic_sdma->state = HFI1_VNIC_SDMA_Q_ACTIVE; 293 294 /* Add a free descriptor watermark for wakeups */ 295 if (vnic_sdma->sde->descq_cnt > HFI1_VNIC_SDMA_DESC_WTRMRK) { 296 struct iowait_work *work; 297 298 INIT_LIST_HEAD(&vnic_sdma->stx.list); 299 vnic_sdma->stx.num_desc = HFI1_VNIC_SDMA_DESC_WTRMRK; 300 work = iowait_get_ib_work(&vnic_sdma->wait); 301 list_add_tail(&vnic_sdma->stx.list, &work->tx_head); 302 } 303 } 304} 305 306int hfi1_vnic_txreq_init(struct hfi1_devdata *dd) 307{ 308 char buf[HFI1_VNIC_TXREQ_NAME_LEN]; 309 310 snprintf(buf, sizeof(buf), "hfi1_%u_vnic_txreq_cache", dd->unit); 311 dd->vnic.txreq_cache = kmem_cache_create(buf, 312 sizeof(struct vnic_txreq), 313 0, SLAB_HWCACHE_ALIGN, 314 NULL); 315 if (!dd->vnic.txreq_cache) 316 return -ENOMEM; 317 return 0; 318} 319 320void hfi1_vnic_txreq_deinit(struct hfi1_devdata *dd) 321{ 322 kmem_cache_destroy(dd->vnic.txreq_cache); 323 dd->vnic.txreq_cache = NULL; 324} 325