18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright(c) 2019 Intel Corporation.
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci */
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci#include "aspm.h"
88c2ecf20Sopenharmony_ci
98c2ecf20Sopenharmony_ci/* Time after which the timer interrupt will re-enable ASPM */
108c2ecf20Sopenharmony_ci#define ASPM_TIMER_MS 1000
118c2ecf20Sopenharmony_ci/* Time for which interrupts are ignored after a timer has been scheduled */
128c2ecf20Sopenharmony_ci#define ASPM_RESCHED_TIMER_MS (ASPM_TIMER_MS / 2)
138c2ecf20Sopenharmony_ci/* Two interrupts within this time trigger ASPM disable */
148c2ecf20Sopenharmony_ci#define ASPM_TRIGGER_MS 1
158c2ecf20Sopenharmony_ci#define ASPM_TRIGGER_NS (ASPM_TRIGGER_MS * 1000 * 1000ull)
168c2ecf20Sopenharmony_ci#define ASPM_L1_SUPPORTED(reg) \
178c2ecf20Sopenharmony_ci	((((reg) & PCI_EXP_LNKCAP_ASPMS) >> 10) & 0x2)
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ciuint aspm_mode = ASPM_MODE_DISABLED;
208c2ecf20Sopenharmony_cimodule_param_named(aspm, aspm_mode, uint, 0444);
218c2ecf20Sopenharmony_ciMODULE_PARM_DESC(aspm, "PCIe ASPM: 0: disable, 1: enable, 2: dynamic");
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_cistatic bool aspm_hw_l1_supported(struct hfi1_devdata *dd)
248c2ecf20Sopenharmony_ci{
258c2ecf20Sopenharmony_ci	struct pci_dev *parent = dd->pcidev->bus->self;
268c2ecf20Sopenharmony_ci	u32 up, dn;
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci	/*
298c2ecf20Sopenharmony_ci	 * If the driver does not have access to the upstream component,
308c2ecf20Sopenharmony_ci	 * it cannot support ASPM L1 at all.
318c2ecf20Sopenharmony_ci	 */
328c2ecf20Sopenharmony_ci	if (!parent)
338c2ecf20Sopenharmony_ci		return false;
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci	pcie_capability_read_dword(dd->pcidev, PCI_EXP_LNKCAP, &dn);
368c2ecf20Sopenharmony_ci	dn = ASPM_L1_SUPPORTED(dn);
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci	pcie_capability_read_dword(parent, PCI_EXP_LNKCAP, &up);
398c2ecf20Sopenharmony_ci	up = ASPM_L1_SUPPORTED(up);
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_ci	/* ASPM works on A-step but is reported as not supported */
428c2ecf20Sopenharmony_ci	return (!!dn || is_ax(dd)) && !!up;
438c2ecf20Sopenharmony_ci}
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci/* Set L1 entrance latency for slower entry to L1 */
468c2ecf20Sopenharmony_cistatic void aspm_hw_set_l1_ent_latency(struct hfi1_devdata *dd)
478c2ecf20Sopenharmony_ci{
488c2ecf20Sopenharmony_ci	u32 l1_ent_lat = 0x4u;
498c2ecf20Sopenharmony_ci	u32 reg32;
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci	pci_read_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, &reg32);
528c2ecf20Sopenharmony_ci	reg32 &= ~PCIE_CFG_REG_PL3_L1_ENT_LATENCY_SMASK;
538c2ecf20Sopenharmony_ci	reg32 |= l1_ent_lat << PCIE_CFG_REG_PL3_L1_ENT_LATENCY_SHIFT;
548c2ecf20Sopenharmony_ci	pci_write_config_dword(dd->pcidev, PCIE_CFG_REG_PL3, reg32);
558c2ecf20Sopenharmony_ci}
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_cistatic void aspm_hw_enable_l1(struct hfi1_devdata *dd)
588c2ecf20Sopenharmony_ci{
598c2ecf20Sopenharmony_ci	struct pci_dev *parent = dd->pcidev->bus->self;
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ci	/*
628c2ecf20Sopenharmony_ci	 * If the driver does not have access to the upstream component,
638c2ecf20Sopenharmony_ci	 * it cannot support ASPM L1 at all.
648c2ecf20Sopenharmony_ci	 */
658c2ecf20Sopenharmony_ci	if (!parent)
668c2ecf20Sopenharmony_ci		return;
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci	/* Enable ASPM L1 first in upstream component and then downstream */
698c2ecf20Sopenharmony_ci	pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
708c2ecf20Sopenharmony_ci					   PCI_EXP_LNKCTL_ASPMC,
718c2ecf20Sopenharmony_ci					   PCI_EXP_LNKCTL_ASPM_L1);
728c2ecf20Sopenharmony_ci	pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL,
738c2ecf20Sopenharmony_ci					   PCI_EXP_LNKCTL_ASPMC,
748c2ecf20Sopenharmony_ci					   PCI_EXP_LNKCTL_ASPM_L1);
758c2ecf20Sopenharmony_ci}
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_civoid aspm_hw_disable_l1(struct hfi1_devdata *dd)
788c2ecf20Sopenharmony_ci{
798c2ecf20Sopenharmony_ci	struct pci_dev *parent = dd->pcidev->bus->self;
808c2ecf20Sopenharmony_ci
818c2ecf20Sopenharmony_ci	/* Disable ASPM L1 first in downstream component and then upstream */
828c2ecf20Sopenharmony_ci	pcie_capability_clear_and_set_word(dd->pcidev, PCI_EXP_LNKCTL,
838c2ecf20Sopenharmony_ci					   PCI_EXP_LNKCTL_ASPMC, 0x0);
848c2ecf20Sopenharmony_ci	if (parent)
858c2ecf20Sopenharmony_ci		pcie_capability_clear_and_set_word(parent, PCI_EXP_LNKCTL,
868c2ecf20Sopenharmony_ci						   PCI_EXP_LNKCTL_ASPMC, 0x0);
878c2ecf20Sopenharmony_ci}
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_cistatic  void aspm_enable(struct hfi1_devdata *dd)
908c2ecf20Sopenharmony_ci{
918c2ecf20Sopenharmony_ci	if (dd->aspm_enabled || aspm_mode == ASPM_MODE_DISABLED ||
928c2ecf20Sopenharmony_ci	    !dd->aspm_supported)
938c2ecf20Sopenharmony_ci		return;
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ci	aspm_hw_enable_l1(dd);
968c2ecf20Sopenharmony_ci	dd->aspm_enabled = true;
978c2ecf20Sopenharmony_ci}
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_cistatic  void aspm_disable(struct hfi1_devdata *dd)
1008c2ecf20Sopenharmony_ci{
1018c2ecf20Sopenharmony_ci	if (!dd->aspm_enabled || aspm_mode == ASPM_MODE_ENABLED)
1028c2ecf20Sopenharmony_ci		return;
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ci	aspm_hw_disable_l1(dd);
1058c2ecf20Sopenharmony_ci	dd->aspm_enabled = false;
1068c2ecf20Sopenharmony_ci}
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_cistatic  void aspm_disable_inc(struct hfi1_devdata *dd)
1098c2ecf20Sopenharmony_ci{
1108c2ecf20Sopenharmony_ci	unsigned long flags;
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_ci	spin_lock_irqsave(&dd->aspm_lock, flags);
1138c2ecf20Sopenharmony_ci	aspm_disable(dd);
1148c2ecf20Sopenharmony_ci	atomic_inc(&dd->aspm_disabled_cnt);
1158c2ecf20Sopenharmony_ci	spin_unlock_irqrestore(&dd->aspm_lock, flags);
1168c2ecf20Sopenharmony_ci}
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_cistatic  void aspm_enable_dec(struct hfi1_devdata *dd)
1198c2ecf20Sopenharmony_ci{
1208c2ecf20Sopenharmony_ci	unsigned long flags;
1218c2ecf20Sopenharmony_ci
1228c2ecf20Sopenharmony_ci	spin_lock_irqsave(&dd->aspm_lock, flags);
1238c2ecf20Sopenharmony_ci	if (atomic_dec_and_test(&dd->aspm_disabled_cnt))
1248c2ecf20Sopenharmony_ci		aspm_enable(dd);
1258c2ecf20Sopenharmony_ci	spin_unlock_irqrestore(&dd->aspm_lock, flags);
1268c2ecf20Sopenharmony_ci}
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci/* ASPM processing for each receive context interrupt */
1298c2ecf20Sopenharmony_civoid __aspm_ctx_disable(struct hfi1_ctxtdata *rcd)
1308c2ecf20Sopenharmony_ci{
1318c2ecf20Sopenharmony_ci	bool restart_timer;
1328c2ecf20Sopenharmony_ci	bool close_interrupts;
1338c2ecf20Sopenharmony_ci	unsigned long flags;
1348c2ecf20Sopenharmony_ci	ktime_t now, prev;
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_ci	spin_lock_irqsave(&rcd->aspm_lock, flags);
1378c2ecf20Sopenharmony_ci	/* PSM contexts are open */
1388c2ecf20Sopenharmony_ci	if (!rcd->aspm_intr_enable)
1398c2ecf20Sopenharmony_ci		goto unlock;
1408c2ecf20Sopenharmony_ci
1418c2ecf20Sopenharmony_ci	prev = rcd->aspm_ts_last_intr;
1428c2ecf20Sopenharmony_ci	now = ktime_get();
1438c2ecf20Sopenharmony_ci	rcd->aspm_ts_last_intr = now;
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_ci	/* An interrupt pair close together in time */
1468c2ecf20Sopenharmony_ci	close_interrupts = ktime_to_ns(ktime_sub(now, prev)) < ASPM_TRIGGER_NS;
1478c2ecf20Sopenharmony_ci
1488c2ecf20Sopenharmony_ci	/* Don't push out our timer till this much time has elapsed */
1498c2ecf20Sopenharmony_ci	restart_timer = ktime_to_ns(ktime_sub(now, rcd->aspm_ts_timer_sched)) >
1508c2ecf20Sopenharmony_ci				    ASPM_RESCHED_TIMER_MS * NSEC_PER_MSEC;
1518c2ecf20Sopenharmony_ci	restart_timer = restart_timer && close_interrupts;
1528c2ecf20Sopenharmony_ci
1538c2ecf20Sopenharmony_ci	/* Disable ASPM and schedule timer */
1548c2ecf20Sopenharmony_ci	if (rcd->aspm_enabled && close_interrupts) {
1558c2ecf20Sopenharmony_ci		aspm_disable_inc(rcd->dd);
1568c2ecf20Sopenharmony_ci		rcd->aspm_enabled = false;
1578c2ecf20Sopenharmony_ci		restart_timer = true;
1588c2ecf20Sopenharmony_ci	}
1598c2ecf20Sopenharmony_ci
1608c2ecf20Sopenharmony_ci	if (restart_timer) {
1618c2ecf20Sopenharmony_ci		mod_timer(&rcd->aspm_timer,
1628c2ecf20Sopenharmony_ci			  jiffies + msecs_to_jiffies(ASPM_TIMER_MS));
1638c2ecf20Sopenharmony_ci		rcd->aspm_ts_timer_sched = now;
1648c2ecf20Sopenharmony_ci	}
1658c2ecf20Sopenharmony_ciunlock:
1668c2ecf20Sopenharmony_ci	spin_unlock_irqrestore(&rcd->aspm_lock, flags);
1678c2ecf20Sopenharmony_ci}
1688c2ecf20Sopenharmony_ci
1698c2ecf20Sopenharmony_ci/* Timer function for re-enabling ASPM in the absence of interrupt activity */
1708c2ecf20Sopenharmony_cistatic  void aspm_ctx_timer_function(struct timer_list *t)
1718c2ecf20Sopenharmony_ci{
1728c2ecf20Sopenharmony_ci	struct hfi1_ctxtdata *rcd = from_timer(rcd, t, aspm_timer);
1738c2ecf20Sopenharmony_ci	unsigned long flags;
1748c2ecf20Sopenharmony_ci
1758c2ecf20Sopenharmony_ci	spin_lock_irqsave(&rcd->aspm_lock, flags);
1768c2ecf20Sopenharmony_ci	aspm_enable_dec(rcd->dd);
1778c2ecf20Sopenharmony_ci	rcd->aspm_enabled = true;
1788c2ecf20Sopenharmony_ci	spin_unlock_irqrestore(&rcd->aspm_lock, flags);
1798c2ecf20Sopenharmony_ci}
1808c2ecf20Sopenharmony_ci
1818c2ecf20Sopenharmony_ci/*
1828c2ecf20Sopenharmony_ci * Disable interrupt processing for verbs contexts when PSM or VNIC contexts
1838c2ecf20Sopenharmony_ci * are open.
1848c2ecf20Sopenharmony_ci */
1858c2ecf20Sopenharmony_civoid aspm_disable_all(struct hfi1_devdata *dd)
1868c2ecf20Sopenharmony_ci{
1878c2ecf20Sopenharmony_ci	struct hfi1_ctxtdata *rcd;
1888c2ecf20Sopenharmony_ci	unsigned long flags;
1898c2ecf20Sopenharmony_ci	u16 i;
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_ci	for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
1928c2ecf20Sopenharmony_ci		rcd = hfi1_rcd_get_by_index(dd, i);
1938c2ecf20Sopenharmony_ci		if (rcd) {
1948c2ecf20Sopenharmony_ci			del_timer_sync(&rcd->aspm_timer);
1958c2ecf20Sopenharmony_ci			spin_lock_irqsave(&rcd->aspm_lock, flags);
1968c2ecf20Sopenharmony_ci			rcd->aspm_intr_enable = false;
1978c2ecf20Sopenharmony_ci			spin_unlock_irqrestore(&rcd->aspm_lock, flags);
1988c2ecf20Sopenharmony_ci			hfi1_rcd_put(rcd);
1998c2ecf20Sopenharmony_ci		}
2008c2ecf20Sopenharmony_ci	}
2018c2ecf20Sopenharmony_ci
2028c2ecf20Sopenharmony_ci	aspm_disable(dd);
2038c2ecf20Sopenharmony_ci	atomic_set(&dd->aspm_disabled_cnt, 0);
2048c2ecf20Sopenharmony_ci}
2058c2ecf20Sopenharmony_ci
2068c2ecf20Sopenharmony_ci/* Re-enable interrupt processing for verbs contexts */
2078c2ecf20Sopenharmony_civoid aspm_enable_all(struct hfi1_devdata *dd)
2088c2ecf20Sopenharmony_ci{
2098c2ecf20Sopenharmony_ci	struct hfi1_ctxtdata *rcd;
2108c2ecf20Sopenharmony_ci	unsigned long flags;
2118c2ecf20Sopenharmony_ci	u16 i;
2128c2ecf20Sopenharmony_ci
2138c2ecf20Sopenharmony_ci	aspm_enable(dd);
2148c2ecf20Sopenharmony_ci
2158c2ecf20Sopenharmony_ci	if (aspm_mode != ASPM_MODE_DYNAMIC)
2168c2ecf20Sopenharmony_ci		return;
2178c2ecf20Sopenharmony_ci
2188c2ecf20Sopenharmony_ci	for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
2198c2ecf20Sopenharmony_ci		rcd = hfi1_rcd_get_by_index(dd, i);
2208c2ecf20Sopenharmony_ci		if (rcd) {
2218c2ecf20Sopenharmony_ci			spin_lock_irqsave(&rcd->aspm_lock, flags);
2228c2ecf20Sopenharmony_ci			rcd->aspm_intr_enable = true;
2238c2ecf20Sopenharmony_ci			rcd->aspm_enabled = true;
2248c2ecf20Sopenharmony_ci			spin_unlock_irqrestore(&rcd->aspm_lock, flags);
2258c2ecf20Sopenharmony_ci			hfi1_rcd_put(rcd);
2268c2ecf20Sopenharmony_ci		}
2278c2ecf20Sopenharmony_ci	}
2288c2ecf20Sopenharmony_ci}
2298c2ecf20Sopenharmony_ci
2308c2ecf20Sopenharmony_cistatic  void aspm_ctx_init(struct hfi1_ctxtdata *rcd)
2318c2ecf20Sopenharmony_ci{
2328c2ecf20Sopenharmony_ci	spin_lock_init(&rcd->aspm_lock);
2338c2ecf20Sopenharmony_ci	timer_setup(&rcd->aspm_timer, aspm_ctx_timer_function, 0);
2348c2ecf20Sopenharmony_ci	rcd->aspm_intr_supported = rcd->dd->aspm_supported &&
2358c2ecf20Sopenharmony_ci		aspm_mode == ASPM_MODE_DYNAMIC &&
2368c2ecf20Sopenharmony_ci		rcd->ctxt < rcd->dd->first_dyn_alloc_ctxt;
2378c2ecf20Sopenharmony_ci}
2388c2ecf20Sopenharmony_ci
2398c2ecf20Sopenharmony_civoid aspm_init(struct hfi1_devdata *dd)
2408c2ecf20Sopenharmony_ci{
2418c2ecf20Sopenharmony_ci	struct hfi1_ctxtdata *rcd;
2428c2ecf20Sopenharmony_ci	u16 i;
2438c2ecf20Sopenharmony_ci
2448c2ecf20Sopenharmony_ci	spin_lock_init(&dd->aspm_lock);
2458c2ecf20Sopenharmony_ci	dd->aspm_supported = aspm_hw_l1_supported(dd);
2468c2ecf20Sopenharmony_ci
2478c2ecf20Sopenharmony_ci	for (i = 0; i < dd->first_dyn_alloc_ctxt; i++) {
2488c2ecf20Sopenharmony_ci		rcd = hfi1_rcd_get_by_index(dd, i);
2498c2ecf20Sopenharmony_ci		if (rcd)
2508c2ecf20Sopenharmony_ci			aspm_ctx_init(rcd);
2518c2ecf20Sopenharmony_ci		hfi1_rcd_put(rcd);
2528c2ecf20Sopenharmony_ci	}
2538c2ecf20Sopenharmony_ci
2548c2ecf20Sopenharmony_ci	/* Start with ASPM disabled */
2558c2ecf20Sopenharmony_ci	aspm_hw_set_l1_ent_latency(dd);
2568c2ecf20Sopenharmony_ci	dd->aspm_enabled = false;
2578c2ecf20Sopenharmony_ci	aspm_hw_disable_l1(dd);
2588c2ecf20Sopenharmony_ci
2598c2ecf20Sopenharmony_ci	/* Now turn on ASPM if configured */
2608c2ecf20Sopenharmony_ci	aspm_enable_all(dd);
2618c2ecf20Sopenharmony_ci}
2628c2ecf20Sopenharmony_ci
2638c2ecf20Sopenharmony_civoid aspm_exit(struct hfi1_devdata *dd)
2648c2ecf20Sopenharmony_ci{
2658c2ecf20Sopenharmony_ci	aspm_disable_all(dd);
2668c2ecf20Sopenharmony_ci
2678c2ecf20Sopenharmony_ci	/* Turn on ASPM on exit to conserve power */
2688c2ecf20Sopenharmony_ci	aspm_enable(dd);
2698c2ecf20Sopenharmony_ci}
2708c2ecf20Sopenharmony_ci
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