1/* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Slow Path Operators (header) 37 * 38 */ 39 40#ifndef __BNXT_QPLIB_SP_H__ 41#define __BNXT_QPLIB_SP_H__ 42 43#define BNXT_QPLIB_RESERVED_QP_WRS 128 44 45#define PCI_EXP_DEVCTL2_ATOMIC_REQ 0x0040 46 47struct bnxt_qplib_dev_attr { 48#define FW_VER_ARR_LEN 4 49 u8 fw_ver[FW_VER_ARR_LEN]; 50#define BNXT_QPLIB_NUM_GIDS_SUPPORTED 256 51 u16 max_sgid; 52 u16 max_mrw; 53 u32 max_qp; 54#define BNXT_QPLIB_MAX_OUT_RD_ATOM 126 55 u32 max_qp_rd_atom; 56 u32 max_qp_init_rd_atom; 57 u32 max_qp_wqes; 58 u32 max_qp_sges; 59 u32 max_cq; 60 u32 max_cq_wqes; 61 u32 max_cq_sges; 62 u32 max_mr; 63 u64 max_mr_size; 64 u32 max_pd; 65 u32 max_mw; 66 u32 max_raw_ethy_qp; 67 u32 max_ah; 68 u32 max_srq; 69 u32 max_srq_wqes; 70 u32 max_srq_sges; 71 u32 max_pkey; 72 u32 max_inline_data; 73 u32 l2_db_size; 74 u8 tqm_alloc_reqs[MAX_TQM_ALLOC_REQ]; 75 bool is_atomic; 76}; 77 78struct bnxt_qplib_pd { 79 u32 id; 80}; 81 82struct bnxt_qplib_gid { 83 u8 data[16]; 84}; 85 86struct bnxt_qplib_gid_info { 87 struct bnxt_qplib_gid gid; 88 u16 vlan_id; 89}; 90 91struct bnxt_qplib_ah { 92 struct bnxt_qplib_gid dgid; 93 struct bnxt_qplib_pd *pd; 94 u32 id; 95 u8 sgid_index; 96 /* For Query AH if the hw table and SW table are differnt */ 97 u8 host_sgid_index; 98 u8 traffic_class; 99 u32 flow_label; 100 u8 hop_limit; 101 u8 sl; 102 u8 dmac[6]; 103 u16 vlan_id; 104 u8 nw_type; 105}; 106 107struct bnxt_qplib_mrw { 108 struct bnxt_qplib_pd *pd; 109 int type; 110 u32 flags; 111#define BNXT_QPLIB_FR_PMR 0x80000000 112 u32 lkey; 113 u32 rkey; 114#define BNXT_QPLIB_RSVD_LKEY 0xFFFFFFFF 115 u64 va; 116 u64 total_size; 117 u32 npages; 118 u64 mr_handle; 119 struct bnxt_qplib_hwq hwq; 120}; 121 122struct bnxt_qplib_frpl { 123 int max_pg_ptrs; 124 struct bnxt_qplib_hwq hwq; 125}; 126 127#define BNXT_QPLIB_ACCESS_LOCAL_WRITE BIT(0) 128#define BNXT_QPLIB_ACCESS_REMOTE_READ BIT(1) 129#define BNXT_QPLIB_ACCESS_REMOTE_WRITE BIT(2) 130#define BNXT_QPLIB_ACCESS_REMOTE_ATOMIC BIT(3) 131#define BNXT_QPLIB_ACCESS_MW_BIND BIT(4) 132#define BNXT_QPLIB_ACCESS_ZERO_BASED BIT(5) 133#define BNXT_QPLIB_ACCESS_ON_DEMAND BIT(6) 134 135struct bnxt_qplib_roce_stats { 136 u64 to_retransmits; 137 u64 seq_err_naks_rcvd; 138 /* seq_err_naks_rcvd is 64 b */ 139 u64 max_retry_exceeded; 140 /* max_retry_exceeded is 64 b */ 141 u64 rnr_naks_rcvd; 142 /* rnr_naks_rcvd is 64 b */ 143 u64 missing_resp; 144 u64 unrecoverable_err; 145 /* unrecoverable_err is 64 b */ 146 u64 bad_resp_err; 147 /* bad_resp_err is 64 b */ 148 u64 local_qp_op_err; 149 /* local_qp_op_err is 64 b */ 150 u64 local_protection_err; 151 /* local_protection_err is 64 b */ 152 u64 mem_mgmt_op_err; 153 /* mem_mgmt_op_err is 64 b */ 154 u64 remote_invalid_req_err; 155 /* remote_invalid_req_err is 64 b */ 156 u64 remote_access_err; 157 /* remote_access_err is 64 b */ 158 u64 remote_op_err; 159 /* remote_op_err is 64 b */ 160 u64 dup_req; 161 /* dup_req is 64 b */ 162 u64 res_exceed_max; 163 /* res_exceed_max is 64 b */ 164 u64 res_length_mismatch; 165 /* res_length_mismatch is 64 b */ 166 u64 res_exceeds_wqe; 167 /* res_exceeds_wqe is 64 b */ 168 u64 res_opcode_err; 169 /* res_opcode_err is 64 b */ 170 u64 res_rx_invalid_rkey; 171 /* res_rx_invalid_rkey is 64 b */ 172 u64 res_rx_domain_err; 173 /* res_rx_domain_err is 64 b */ 174 u64 res_rx_no_perm; 175 /* res_rx_no_perm is 64 b */ 176 u64 res_rx_range_err; 177 /* res_rx_range_err is 64 b */ 178 u64 res_tx_invalid_rkey; 179 /* res_tx_invalid_rkey is 64 b */ 180 u64 res_tx_domain_err; 181 /* res_tx_domain_err is 64 b */ 182 u64 res_tx_no_perm; 183 /* res_tx_no_perm is 64 b */ 184 u64 res_tx_range_err; 185 /* res_tx_range_err is 64 b */ 186 u64 res_irrq_oflow; 187 /* res_irrq_oflow is 64 b */ 188 u64 res_unsup_opcode; 189 /* res_unsup_opcode is 64 b */ 190 u64 res_unaligned_atomic; 191 /* res_unaligned_atomic is 64 b */ 192 u64 res_rem_inv_err; 193 /* res_rem_inv_err is 64 b */ 194 u64 res_mem_error; 195 /* res_mem_error is 64 b */ 196 u64 res_srq_err; 197 /* res_srq_err is 64 b */ 198 u64 res_cmp_err; 199 /* res_cmp_err is 64 b */ 200 u64 res_invalid_dup_rkey; 201 /* res_invalid_dup_rkey is 64 b */ 202 u64 res_wqe_format_err; 203 /* res_wqe_format_err is 64 b */ 204 u64 res_cq_load_err; 205 /* res_cq_load_err is 64 b */ 206 u64 res_srq_load_err; 207 /* res_srq_load_err is 64 b */ 208 u64 res_tx_pci_err; 209 /* res_tx_pci_err is 64 b */ 210 u64 res_rx_pci_err; 211 /* res_rx_pci_err is 64 b */ 212 u64 res_oos_drop_count; 213 /* res_oos_drop_count */ 214 u64 active_qp_count_p0; 215 /* port 0 active qps */ 216 u64 active_qp_count_p1; 217 /* port 1 active qps */ 218 u64 active_qp_count_p2; 219 /* port 2 active qps */ 220 u64 active_qp_count_p3; 221 /* port 3 active qps */ 222}; 223 224int bnxt_qplib_get_sgid(struct bnxt_qplib_res *res, 225 struct bnxt_qplib_sgid_tbl *sgid_tbl, int index, 226 struct bnxt_qplib_gid *gid); 227int bnxt_qplib_del_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, 228 struct bnxt_qplib_gid *gid, u16 vlan_id, bool update); 229int bnxt_qplib_add_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, 230 struct bnxt_qplib_gid *gid, u8 *mac, u16 vlan_id, 231 bool update, u32 *index); 232int bnxt_qplib_update_sgid(struct bnxt_qplib_sgid_tbl *sgid_tbl, 233 struct bnxt_qplib_gid *gid, u16 gid_idx, u8 *smac); 234int bnxt_qplib_get_pkey(struct bnxt_qplib_res *res, 235 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 index, 236 u16 *pkey); 237int bnxt_qplib_del_pkey(struct bnxt_qplib_res *res, 238 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey, 239 bool update); 240int bnxt_qplib_add_pkey(struct bnxt_qplib_res *res, 241 struct bnxt_qplib_pkey_tbl *pkey_tbl, u16 *pkey, 242 bool update); 243int bnxt_qplib_get_dev_attr(struct bnxt_qplib_rcfw *rcfw, 244 struct bnxt_qplib_dev_attr *attr, bool vf); 245int bnxt_qplib_set_func_resources(struct bnxt_qplib_res *res, 246 struct bnxt_qplib_rcfw *rcfw, 247 struct bnxt_qplib_ctx *ctx); 248int bnxt_qplib_create_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah, 249 bool block); 250void bnxt_qplib_destroy_ah(struct bnxt_qplib_res *res, struct bnxt_qplib_ah *ah, 251 bool block); 252int bnxt_qplib_alloc_mrw(struct bnxt_qplib_res *res, 253 struct bnxt_qplib_mrw *mrw); 254int bnxt_qplib_dereg_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mrw, 255 bool block); 256int bnxt_qplib_reg_mr(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr, 257 struct ib_umem *umem, int num_pbls, u32 buf_pg_size); 258int bnxt_qplib_free_mrw(struct bnxt_qplib_res *res, struct bnxt_qplib_mrw *mr); 259int bnxt_qplib_alloc_fast_reg_mr(struct bnxt_qplib_res *res, 260 struct bnxt_qplib_mrw *mr, int max); 261int bnxt_qplib_alloc_fast_reg_page_list(struct bnxt_qplib_res *res, 262 struct bnxt_qplib_frpl *frpl, int max); 263int bnxt_qplib_free_fast_reg_page_list(struct bnxt_qplib_res *res, 264 struct bnxt_qplib_frpl *frpl); 265int bnxt_qplib_map_tc2cos(struct bnxt_qplib_res *res, u16 *cids); 266int bnxt_qplib_get_roce_stats(struct bnxt_qplib_rcfw *rcfw, 267 struct bnxt_qplib_roce_stats *stats); 268#endif /* __BNXT_QPLIB_SP_H__*/ 269