1/* 2 * Broadcom NetXtreme-E RoCE driver. 3 * 4 * Copyright (c) 2016 - 2017, Broadcom. All rights reserved. The term 5 * Broadcom refers to Broadcom Limited and/or its subsidiaries. 6 * 7 * This software is available to you under a choice of one of two 8 * licenses. You may choose to be licensed under the terms of the GNU 9 * General Public License (GPL) Version 2, available from the file 10 * COPYING in the main directory of this source tree, or the 11 * BSD license below: 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in 21 * the documentation and/or other materials provided with the 22 * distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 31 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 32 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 33 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 34 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * Description: Main component of the bnxt_re driver 37 */ 38 39#include <linux/module.h> 40#include <linux/netdevice.h> 41#include <linux/ethtool.h> 42#include <linux/mutex.h> 43#include <linux/list.h> 44#include <linux/rculist.h> 45#include <linux/spinlock.h> 46#include <linux/pci.h> 47#include <net/dcbnl.h> 48#include <net/ipv6.h> 49#include <net/addrconf.h> 50#include <linux/if_ether.h> 51 52#include <rdma/ib_verbs.h> 53#include <rdma/ib_user_verbs.h> 54#include <rdma/ib_umem.h> 55#include <rdma/ib_addr.h> 56 57#include "bnxt_ulp.h" 58#include "roce_hsi.h" 59#include "qplib_res.h" 60#include "qplib_sp.h" 61#include "qplib_fp.h" 62#include "qplib_rcfw.h" 63#include "bnxt_re.h" 64#include "ib_verbs.h" 65#include <rdma/bnxt_re-abi.h> 66#include "bnxt.h" 67#include "hw_counters.h" 68 69static char version[] = 70 BNXT_RE_DESC "\n"; 71 72MODULE_AUTHOR("Eddie Wai <eddie.wai@broadcom.com>"); 73MODULE_DESCRIPTION(BNXT_RE_DESC); 74MODULE_LICENSE("Dual BSD/GPL"); 75 76/* globals */ 77static struct list_head bnxt_re_dev_list = LIST_HEAD_INIT(bnxt_re_dev_list); 78/* Mutex to protect the list of bnxt_re devices added */ 79static DEFINE_MUTEX(bnxt_re_dev_lock); 80static struct workqueue_struct *bnxt_re_wq; 81static void bnxt_re_remove_device(struct bnxt_re_dev *rdev); 82static void bnxt_re_dealloc_driver(struct ib_device *ib_dev); 83static void bnxt_re_stop_irq(void *handle); 84 85static void bnxt_re_set_drv_mode(struct bnxt_re_dev *rdev, u8 mode) 86{ 87 struct bnxt_qplib_chip_ctx *cctx; 88 89 cctx = rdev->chip_ctx; 90 cctx->modes.wqe_mode = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 91 mode : BNXT_QPLIB_WQE_MODE_STATIC; 92} 93 94static void bnxt_re_destroy_chip_ctx(struct bnxt_re_dev *rdev) 95{ 96 struct bnxt_qplib_chip_ctx *chip_ctx; 97 98 if (!rdev->chip_ctx) 99 return; 100 chip_ctx = rdev->chip_ctx; 101 rdev->chip_ctx = NULL; 102 rdev->rcfw.res = NULL; 103 rdev->qplib_res.cctx = NULL; 104 rdev->qplib_res.pdev = NULL; 105 rdev->qplib_res.netdev = NULL; 106 kfree(chip_ctx); 107} 108 109static int bnxt_re_setup_chip_ctx(struct bnxt_re_dev *rdev, u8 wqe_mode) 110{ 111 struct bnxt_qplib_chip_ctx *chip_ctx; 112 struct bnxt_en_dev *en_dev; 113 struct bnxt *bp; 114 115 en_dev = rdev->en_dev; 116 bp = netdev_priv(en_dev->net); 117 118 chip_ctx = kzalloc(sizeof(*chip_ctx), GFP_KERNEL); 119 if (!chip_ctx) 120 return -ENOMEM; 121 chip_ctx->chip_num = bp->chip_num; 122 chip_ctx->hw_stats_size = bp->hw_ring_stats_size; 123 124 rdev->chip_ctx = chip_ctx; 125 /* rest members to follow eventually */ 126 127 rdev->qplib_res.cctx = rdev->chip_ctx; 128 rdev->rcfw.res = &rdev->qplib_res; 129 130 bnxt_re_set_drv_mode(rdev, wqe_mode); 131 return 0; 132} 133 134/* SR-IOV helper functions */ 135 136static void bnxt_re_get_sriov_func_type(struct bnxt_re_dev *rdev) 137{ 138 struct bnxt *bp; 139 140 bp = netdev_priv(rdev->en_dev->net); 141 if (BNXT_VF(bp)) 142 rdev->is_virtfn = 1; 143} 144 145/* Set the maximum number of each resource that the driver actually wants 146 * to allocate. This may be up to the maximum number the firmware has 147 * reserved for the function. The driver may choose to allocate fewer 148 * resources than the firmware maximum. 149 */ 150static void bnxt_re_limit_pf_res(struct bnxt_re_dev *rdev) 151{ 152 struct bnxt_qplib_dev_attr *attr; 153 struct bnxt_qplib_ctx *ctx; 154 int i; 155 156 attr = &rdev->dev_attr; 157 ctx = &rdev->qplib_ctx; 158 159 ctx->qpc_count = min_t(u32, BNXT_RE_MAX_QPC_COUNT, 160 attr->max_qp); 161 ctx->mrw_count = BNXT_RE_MAX_MRW_COUNT_256K; 162 /* Use max_mr from fw since max_mrw does not get set */ 163 ctx->mrw_count = min_t(u32, ctx->mrw_count, attr->max_mr); 164 ctx->srqc_count = min_t(u32, BNXT_RE_MAX_SRQC_COUNT, 165 attr->max_srq); 166 ctx->cq_count = min_t(u32, BNXT_RE_MAX_CQ_COUNT, attr->max_cq); 167 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) 168 for (i = 0; i < MAX_TQM_ALLOC_REQ; i++) 169 rdev->qplib_ctx.tqm_ctx.qcount[i] = 170 rdev->dev_attr.tqm_alloc_reqs[i]; 171} 172 173static void bnxt_re_limit_vf_res(struct bnxt_qplib_ctx *qplib_ctx, u32 num_vf) 174{ 175 struct bnxt_qplib_vf_res *vf_res; 176 u32 mrws = 0; 177 u32 vf_pct; 178 u32 nvfs; 179 180 vf_res = &qplib_ctx->vf_res; 181 /* 182 * Reserve a set of resources for the PF. Divide the remaining 183 * resources among the VFs 184 */ 185 vf_pct = 100 - BNXT_RE_PCT_RSVD_FOR_PF; 186 nvfs = num_vf; 187 num_vf = 100 * num_vf; 188 vf_res->max_qp_per_vf = (qplib_ctx->qpc_count * vf_pct) / num_vf; 189 vf_res->max_srq_per_vf = (qplib_ctx->srqc_count * vf_pct) / num_vf; 190 vf_res->max_cq_per_vf = (qplib_ctx->cq_count * vf_pct) / num_vf; 191 /* 192 * The driver allows many more MRs than other resources. If the 193 * firmware does also, then reserve a fixed amount for the PF and 194 * divide the rest among VFs. VFs may use many MRs for NFS 195 * mounts, ISER, NVME applications, etc. If the firmware severely 196 * restricts the number of MRs, then let PF have half and divide 197 * the rest among VFs, as for the other resource types. 198 */ 199 if (qplib_ctx->mrw_count < BNXT_RE_MAX_MRW_COUNT_64K) { 200 mrws = qplib_ctx->mrw_count * vf_pct; 201 nvfs = num_vf; 202 } else { 203 mrws = qplib_ctx->mrw_count - BNXT_RE_RESVD_MR_FOR_PF; 204 } 205 vf_res->max_mrw_per_vf = (mrws / nvfs); 206 vf_res->max_gid_per_vf = BNXT_RE_MAX_GID_PER_VF; 207} 208 209static void bnxt_re_set_resource_limits(struct bnxt_re_dev *rdev) 210{ 211 u32 num_vfs; 212 213 memset(&rdev->qplib_ctx.vf_res, 0, sizeof(struct bnxt_qplib_vf_res)); 214 bnxt_re_limit_pf_res(rdev); 215 216 num_vfs = bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 217 BNXT_RE_GEN_P5_MAX_VF : rdev->num_vfs; 218 if (num_vfs) 219 bnxt_re_limit_vf_res(&rdev->qplib_ctx, num_vfs); 220} 221 222/* for handling bnxt_en callbacks later */ 223static void bnxt_re_stop(void *p) 224{ 225} 226 227static void bnxt_re_start(void *p) 228{ 229} 230 231static void bnxt_re_sriov_config(void *p, int num_vfs) 232{ 233 struct bnxt_re_dev *rdev = p; 234 235 if (!rdev) 236 return; 237 238 rdev->num_vfs = num_vfs; 239 if (!bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)) { 240 bnxt_re_set_resource_limits(rdev); 241 bnxt_qplib_set_func_resources(&rdev->qplib_res, &rdev->rcfw, 242 &rdev->qplib_ctx); 243 } 244} 245 246static void bnxt_re_shutdown(void *p) 247{ 248 struct bnxt_re_dev *rdev = p; 249 250 if (!rdev) 251 return; 252 ASSERT_RTNL(); 253 /* Release the MSIx vectors before queuing unregister */ 254 bnxt_re_stop_irq(rdev); 255 ib_unregister_device_queued(&rdev->ibdev); 256} 257 258static void bnxt_re_stop_irq(void *handle) 259{ 260 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 261 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 262 struct bnxt_qplib_nq *nq; 263 int indx; 264 265 for (indx = BNXT_RE_NQ_IDX; indx < rdev->num_msix; indx++) { 266 nq = &rdev->nq[indx - 1]; 267 bnxt_qplib_nq_stop_irq(nq, false); 268 } 269 270 bnxt_qplib_rcfw_stop_irq(rcfw, false); 271} 272 273static void bnxt_re_start_irq(void *handle, struct bnxt_msix_entry *ent) 274{ 275 struct bnxt_re_dev *rdev = (struct bnxt_re_dev *)handle; 276 struct bnxt_msix_entry *msix_ent = rdev->msix_entries; 277 struct bnxt_qplib_rcfw *rcfw = &rdev->rcfw; 278 struct bnxt_qplib_nq *nq; 279 int indx, rc; 280 281 if (!ent) { 282 /* Not setting the f/w timeout bit in rcfw. 283 * During the driver unload the first command 284 * to f/w will timeout and that will set the 285 * timeout bit. 286 */ 287 ibdev_err(&rdev->ibdev, "Failed to re-start IRQs\n"); 288 return; 289 } 290 291 /* Vectors may change after restart, so update with new vectors 292 * in device sctructure. 293 */ 294 for (indx = 0; indx < rdev->num_msix; indx++) 295 rdev->msix_entries[indx].vector = ent[indx].vector; 296 297 rc = bnxt_qplib_rcfw_start_irq(rcfw, msix_ent[BNXT_RE_AEQ_IDX].vector, 298 false); 299 if (rc) { 300 ibdev_warn(&rdev->ibdev, "Failed to reinit CREQ\n"); 301 return; 302 } 303 for (indx = BNXT_RE_NQ_IDX ; indx < rdev->num_msix; indx++) { 304 nq = &rdev->nq[indx - 1]; 305 rc = bnxt_qplib_nq_start_irq(nq, indx - 1, 306 msix_ent[indx].vector, false); 307 if (rc) { 308 ibdev_warn(&rdev->ibdev, "Failed to reinit NQ index %d\n", 309 indx - 1); 310 return; 311 } 312 } 313} 314 315static struct bnxt_ulp_ops bnxt_re_ulp_ops = { 316 .ulp_async_notifier = NULL, 317 .ulp_stop = bnxt_re_stop, 318 .ulp_start = bnxt_re_start, 319 .ulp_sriov_config = bnxt_re_sriov_config, 320 .ulp_shutdown = bnxt_re_shutdown, 321 .ulp_irq_stop = bnxt_re_stop_irq, 322 .ulp_irq_restart = bnxt_re_start_irq 323}; 324 325/* RoCE -> Net driver */ 326 327/* Driver registration routines used to let the networking driver (bnxt_en) 328 * to know that the RoCE driver is now installed 329 */ 330static int bnxt_re_unregister_netdev(struct bnxt_re_dev *rdev) 331{ 332 struct bnxt_en_dev *en_dev; 333 int rc; 334 335 if (!rdev) 336 return -EINVAL; 337 338 en_dev = rdev->en_dev; 339 340 rc = en_dev->en_ops->bnxt_unregister_device(rdev->en_dev, 341 BNXT_ROCE_ULP); 342 return rc; 343} 344 345static int bnxt_re_register_netdev(struct bnxt_re_dev *rdev) 346{ 347 struct bnxt_en_dev *en_dev; 348 int rc = 0; 349 350 if (!rdev) 351 return -EINVAL; 352 353 en_dev = rdev->en_dev; 354 355 rc = en_dev->en_ops->bnxt_register_device(en_dev, BNXT_ROCE_ULP, 356 &bnxt_re_ulp_ops, rdev); 357 rdev->qplib_res.pdev = rdev->en_dev->pdev; 358 return rc; 359} 360 361static int bnxt_re_free_msix(struct bnxt_re_dev *rdev) 362{ 363 struct bnxt_en_dev *en_dev; 364 int rc; 365 366 if (!rdev) 367 return -EINVAL; 368 369 en_dev = rdev->en_dev; 370 371 372 rc = en_dev->en_ops->bnxt_free_msix(rdev->en_dev, BNXT_ROCE_ULP); 373 374 return rc; 375} 376 377static int bnxt_re_request_msix(struct bnxt_re_dev *rdev) 378{ 379 int rc = 0, num_msix_want = BNXT_RE_MAX_MSIX, num_msix_got; 380 struct bnxt_en_dev *en_dev; 381 382 if (!rdev) 383 return -EINVAL; 384 385 en_dev = rdev->en_dev; 386 387 num_msix_want = min_t(u32, BNXT_RE_MAX_MSIX, num_online_cpus()); 388 389 num_msix_got = en_dev->en_ops->bnxt_request_msix(en_dev, BNXT_ROCE_ULP, 390 rdev->msix_entries, 391 num_msix_want); 392 if (num_msix_got < BNXT_RE_MIN_MSIX) { 393 rc = -EINVAL; 394 goto done; 395 } 396 if (num_msix_got != num_msix_want) { 397 ibdev_warn(&rdev->ibdev, 398 "Requested %d MSI-X vectors, got %d\n", 399 num_msix_want, num_msix_got); 400 } 401 rdev->num_msix = num_msix_got; 402done: 403 return rc; 404} 405 406static void bnxt_re_init_hwrm_hdr(struct bnxt_re_dev *rdev, struct input *hdr, 407 u16 opcd, u16 crid, u16 trid) 408{ 409 hdr->req_type = cpu_to_le16(opcd); 410 hdr->cmpl_ring = cpu_to_le16(crid); 411 hdr->target_id = cpu_to_le16(trid); 412} 413 414static void bnxt_re_fill_fw_msg(struct bnxt_fw_msg *fw_msg, void *msg, 415 int msg_len, void *resp, int resp_max_len, 416 int timeout) 417{ 418 fw_msg->msg = msg; 419 fw_msg->msg_len = msg_len; 420 fw_msg->resp = resp; 421 fw_msg->resp_max_len = resp_max_len; 422 fw_msg->timeout = timeout; 423} 424 425static int bnxt_re_net_ring_free(struct bnxt_re_dev *rdev, 426 u16 fw_ring_id, int type) 427{ 428 struct bnxt_en_dev *en_dev = rdev->en_dev; 429 struct hwrm_ring_free_input req = {0}; 430 struct hwrm_ring_free_output resp; 431 struct bnxt_fw_msg fw_msg; 432 int rc = -EINVAL; 433 434 if (!en_dev) 435 return rc; 436 437 memset(&fw_msg, 0, sizeof(fw_msg)); 438 439 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_FREE, -1, -1); 440 req.ring_type = type; 441 req.ring_id = cpu_to_le16(fw_ring_id); 442 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 443 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 444 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 445 if (rc) 446 ibdev_err(&rdev->ibdev, "Failed to free HW ring:%d :%#x", 447 req.ring_id, rc); 448 return rc; 449} 450 451static int bnxt_re_net_ring_alloc(struct bnxt_re_dev *rdev, 452 struct bnxt_re_ring_attr *ring_attr, 453 u16 *fw_ring_id) 454{ 455 struct bnxt_en_dev *en_dev = rdev->en_dev; 456 struct hwrm_ring_alloc_input req = {0}; 457 struct hwrm_ring_alloc_output resp; 458 struct bnxt_fw_msg fw_msg; 459 int rc = -EINVAL; 460 461 if (!en_dev) 462 return rc; 463 464 memset(&fw_msg, 0, sizeof(fw_msg)); 465 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_RING_ALLOC, -1, -1); 466 req.enables = 0; 467 req.page_tbl_addr = cpu_to_le64(ring_attr->dma_arr[0]); 468 if (ring_attr->pages > 1) { 469 /* Page size is in log2 units */ 470 req.page_size = BNXT_PAGE_SHIFT; 471 req.page_tbl_depth = 1; 472 } 473 req.fbo = 0; 474 /* Association of ring index with doorbell index and MSIX number */ 475 req.logical_id = cpu_to_le16(ring_attr->lrid); 476 req.length = cpu_to_le32(ring_attr->depth + 1); 477 req.ring_type = ring_attr->type; 478 req.int_mode = ring_attr->mode; 479 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 480 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 481 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 482 if (!rc) 483 *fw_ring_id = le16_to_cpu(resp.ring_id); 484 485 return rc; 486} 487 488static int bnxt_re_net_stats_ctx_free(struct bnxt_re_dev *rdev, 489 u32 fw_stats_ctx_id) 490{ 491 struct bnxt_en_dev *en_dev = rdev->en_dev; 492 struct hwrm_stat_ctx_free_input req = {0}; 493 struct bnxt_fw_msg fw_msg; 494 int rc = -EINVAL; 495 496 if (!en_dev) 497 return rc; 498 499 memset(&fw_msg, 0, sizeof(fw_msg)); 500 501 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_FREE, -1, -1); 502 req.stat_ctx_id = cpu_to_le32(fw_stats_ctx_id); 503 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&req, 504 sizeof(req), DFLT_HWRM_CMD_TIMEOUT); 505 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 506 if (rc) 507 ibdev_err(&rdev->ibdev, "Failed to free HW stats context %#x", 508 rc); 509 510 return rc; 511} 512 513static int bnxt_re_net_stats_ctx_alloc(struct bnxt_re_dev *rdev, 514 dma_addr_t dma_map, 515 u32 *fw_stats_ctx_id) 516{ 517 struct bnxt_qplib_chip_ctx *chip_ctx = rdev->chip_ctx; 518 struct hwrm_stat_ctx_alloc_output resp = {0}; 519 struct hwrm_stat_ctx_alloc_input req = {0}; 520 struct bnxt_en_dev *en_dev = rdev->en_dev; 521 struct bnxt_fw_msg fw_msg; 522 int rc = -EINVAL; 523 524 *fw_stats_ctx_id = INVALID_STATS_CTX_ID; 525 526 if (!en_dev) 527 return rc; 528 529 memset(&fw_msg, 0, sizeof(fw_msg)); 530 531 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, HWRM_STAT_CTX_ALLOC, -1, -1); 532 req.update_period_ms = cpu_to_le32(1000); 533 req.stats_dma_addr = cpu_to_le64(dma_map); 534 req.stats_dma_length = cpu_to_le16(chip_ctx->hw_stats_size); 535 req.stat_ctx_flags = STAT_CTX_ALLOC_REQ_STAT_CTX_FLAGS_ROCE; 536 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 537 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 538 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 539 if (!rc) 540 *fw_stats_ctx_id = le32_to_cpu(resp.stat_ctx_id); 541 542 return rc; 543} 544 545/* Device */ 546 547static bool is_bnxt_re_dev(struct net_device *netdev) 548{ 549 struct ethtool_drvinfo drvinfo; 550 551 if (netdev->ethtool_ops && netdev->ethtool_ops->get_drvinfo) { 552 memset(&drvinfo, 0, sizeof(drvinfo)); 553 netdev->ethtool_ops->get_drvinfo(netdev, &drvinfo); 554 555 if (strcmp(drvinfo.driver, "bnxt_en")) 556 return false; 557 return true; 558 } 559 return false; 560} 561 562static struct bnxt_re_dev *bnxt_re_from_netdev(struct net_device *netdev) 563{ 564 struct ib_device *ibdev = 565 ib_device_get_by_netdev(netdev, RDMA_DRIVER_BNXT_RE); 566 if (!ibdev) 567 return NULL; 568 569 return container_of(ibdev, struct bnxt_re_dev, ibdev); 570} 571 572static void bnxt_re_dev_unprobe(struct net_device *netdev, 573 struct bnxt_en_dev *en_dev) 574{ 575 dev_put(netdev); 576 module_put(en_dev->pdev->driver->driver.owner); 577} 578 579static struct bnxt_en_dev *bnxt_re_dev_probe(struct net_device *netdev) 580{ 581 struct bnxt *bp = netdev_priv(netdev); 582 struct bnxt_en_dev *en_dev; 583 struct pci_dev *pdev; 584 585 /* Call bnxt_en's RoCE probe via indirect API */ 586 if (!bp->ulp_probe) 587 return ERR_PTR(-EINVAL); 588 589 en_dev = bp->ulp_probe(netdev); 590 if (IS_ERR(en_dev)) 591 return en_dev; 592 593 pdev = en_dev->pdev; 594 if (!pdev) 595 return ERR_PTR(-EINVAL); 596 597 if (!(en_dev->flags & BNXT_EN_FLAG_ROCE_CAP)) { 598 dev_info(&pdev->dev, 599 "%s: probe error: RoCE is not supported on this device", 600 ROCE_DRV_MODULE_NAME); 601 return ERR_PTR(-ENODEV); 602 } 603 604 /* Bump net device reference count */ 605 if (!try_module_get(pdev->driver->driver.owner)) 606 return ERR_PTR(-ENODEV); 607 608 dev_hold(netdev); 609 610 return en_dev; 611} 612 613static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr, 614 char *buf) 615{ 616 struct bnxt_re_dev *rdev = 617 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev); 618 619 return scnprintf(buf, PAGE_SIZE, "0x%x\n", rdev->en_dev->pdev->vendor); 620} 621static DEVICE_ATTR_RO(hw_rev); 622 623static ssize_t hca_type_show(struct device *device, 624 struct device_attribute *attr, char *buf) 625{ 626 struct bnxt_re_dev *rdev = 627 rdma_device_to_drv_device(device, struct bnxt_re_dev, ibdev); 628 629 return scnprintf(buf, PAGE_SIZE, "%s\n", rdev->ibdev.node_desc); 630} 631static DEVICE_ATTR_RO(hca_type); 632 633static struct attribute *bnxt_re_attributes[] = { 634 &dev_attr_hw_rev.attr, 635 &dev_attr_hca_type.attr, 636 NULL 637}; 638 639static const struct attribute_group bnxt_re_dev_attr_group = { 640 .attrs = bnxt_re_attributes, 641}; 642 643static const struct ib_device_ops bnxt_re_dev_ops = { 644 .owner = THIS_MODULE, 645 .driver_id = RDMA_DRIVER_BNXT_RE, 646 .uverbs_abi_ver = BNXT_RE_ABI_VERSION, 647 648 .add_gid = bnxt_re_add_gid, 649 .alloc_hw_stats = bnxt_re_ib_alloc_hw_stats, 650 .alloc_mr = bnxt_re_alloc_mr, 651 .alloc_pd = bnxt_re_alloc_pd, 652 .alloc_ucontext = bnxt_re_alloc_ucontext, 653 .create_ah = bnxt_re_create_ah, 654 .create_cq = bnxt_re_create_cq, 655 .create_qp = bnxt_re_create_qp, 656 .create_srq = bnxt_re_create_srq, 657 .dealloc_driver = bnxt_re_dealloc_driver, 658 .dealloc_pd = bnxt_re_dealloc_pd, 659 .dealloc_ucontext = bnxt_re_dealloc_ucontext, 660 .del_gid = bnxt_re_del_gid, 661 .dereg_mr = bnxt_re_dereg_mr, 662 .destroy_ah = bnxt_re_destroy_ah, 663 .destroy_cq = bnxt_re_destroy_cq, 664 .destroy_qp = bnxt_re_destroy_qp, 665 .destroy_srq = bnxt_re_destroy_srq, 666 .get_dev_fw_str = bnxt_re_query_fw_str, 667 .get_dma_mr = bnxt_re_get_dma_mr, 668 .get_hw_stats = bnxt_re_ib_get_hw_stats, 669 .get_link_layer = bnxt_re_get_link_layer, 670 .get_port_immutable = bnxt_re_get_port_immutable, 671 .map_mr_sg = bnxt_re_map_mr_sg, 672 .mmap = bnxt_re_mmap, 673 .modify_ah = bnxt_re_modify_ah, 674 .modify_qp = bnxt_re_modify_qp, 675 .modify_srq = bnxt_re_modify_srq, 676 .poll_cq = bnxt_re_poll_cq, 677 .post_recv = bnxt_re_post_recv, 678 .post_send = bnxt_re_post_send, 679 .post_srq_recv = bnxt_re_post_srq_recv, 680 .query_ah = bnxt_re_query_ah, 681 .query_device = bnxt_re_query_device, 682 .query_pkey = bnxt_re_query_pkey, 683 .query_port = bnxt_re_query_port, 684 .query_qp = bnxt_re_query_qp, 685 .query_srq = bnxt_re_query_srq, 686 .reg_user_mr = bnxt_re_reg_user_mr, 687 .req_notify_cq = bnxt_re_req_notify_cq, 688 INIT_RDMA_OBJ_SIZE(ib_ah, bnxt_re_ah, ib_ah), 689 INIT_RDMA_OBJ_SIZE(ib_cq, bnxt_re_cq, ib_cq), 690 INIT_RDMA_OBJ_SIZE(ib_pd, bnxt_re_pd, ib_pd), 691 INIT_RDMA_OBJ_SIZE(ib_srq, bnxt_re_srq, ib_srq), 692 INIT_RDMA_OBJ_SIZE(ib_ucontext, bnxt_re_ucontext, ib_uctx), 693}; 694 695static int bnxt_re_register_ib(struct bnxt_re_dev *rdev) 696{ 697 struct ib_device *ibdev = &rdev->ibdev; 698 int ret; 699 700 /* ib device init */ 701 ibdev->node_type = RDMA_NODE_IB_CA; 702 strlcpy(ibdev->node_desc, BNXT_RE_DESC " HCA", 703 strlen(BNXT_RE_DESC) + 5); 704 ibdev->phys_port_cnt = 1; 705 706 bnxt_qplib_get_guid(rdev->netdev->dev_addr, (u8 *)&ibdev->node_guid); 707 708 ibdev->num_comp_vectors = rdev->num_msix - 1; 709 ibdev->dev.parent = &rdev->en_dev->pdev->dev; 710 ibdev->local_dma_lkey = BNXT_QPLIB_RSVD_LKEY; 711 712 /* User space */ 713 ibdev->uverbs_cmd_mask = 714 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) | 715 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) | 716 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) | 717 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) | 718 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) | 719 (1ull << IB_USER_VERBS_CMD_REG_MR) | 720 (1ull << IB_USER_VERBS_CMD_REREG_MR) | 721 (1ull << IB_USER_VERBS_CMD_DEREG_MR) | 722 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) | 723 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) | 724 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) | 725 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) | 726 (1ull << IB_USER_VERBS_CMD_CREATE_QP) | 727 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) | 728 (1ull << IB_USER_VERBS_CMD_QUERY_QP) | 729 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) | 730 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) | 731 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) | 732 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) | 733 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 734 (1ull << IB_USER_VERBS_CMD_CREATE_AH) | 735 (1ull << IB_USER_VERBS_CMD_MODIFY_AH) | 736 (1ull << IB_USER_VERBS_CMD_QUERY_AH) | 737 (1ull << IB_USER_VERBS_CMD_DESTROY_AH); 738 /* POLL_CQ and REQ_NOTIFY_CQ is directly handled in libbnxt_re */ 739 740 741 rdma_set_device_sysfs_group(ibdev, &bnxt_re_dev_attr_group); 742 ib_set_device_ops(ibdev, &bnxt_re_dev_ops); 743 ret = ib_device_set_netdev(&rdev->ibdev, rdev->netdev, 1); 744 if (ret) 745 return ret; 746 747 dma_set_max_seg_size(&rdev->en_dev->pdev->dev, UINT_MAX); 748 return ib_register_device(ibdev, "bnxt_re%d", &rdev->en_dev->pdev->dev); 749} 750 751static void bnxt_re_dev_remove(struct bnxt_re_dev *rdev) 752{ 753 dev_put(rdev->netdev); 754 rdev->netdev = NULL; 755 mutex_lock(&bnxt_re_dev_lock); 756 list_del_rcu(&rdev->list); 757 mutex_unlock(&bnxt_re_dev_lock); 758 759 synchronize_rcu(); 760} 761 762static struct bnxt_re_dev *bnxt_re_dev_add(struct net_device *netdev, 763 struct bnxt_en_dev *en_dev) 764{ 765 struct bnxt_re_dev *rdev; 766 767 /* Allocate bnxt_re_dev instance here */ 768 rdev = ib_alloc_device(bnxt_re_dev, ibdev); 769 if (!rdev) { 770 ibdev_err(NULL, "%s: bnxt_re_dev allocation failure!", 771 ROCE_DRV_MODULE_NAME); 772 return NULL; 773 } 774 /* Default values */ 775 rdev->netdev = netdev; 776 dev_hold(rdev->netdev); 777 rdev->en_dev = en_dev; 778 rdev->id = rdev->en_dev->pdev->devfn; 779 INIT_LIST_HEAD(&rdev->qp_list); 780 mutex_init(&rdev->qp_lock); 781 atomic_set(&rdev->qp_count, 0); 782 atomic_set(&rdev->cq_count, 0); 783 atomic_set(&rdev->srq_count, 0); 784 atomic_set(&rdev->mr_count, 0); 785 atomic_set(&rdev->mw_count, 0); 786 rdev->cosq[0] = 0xFFFF; 787 rdev->cosq[1] = 0xFFFF; 788 789 mutex_lock(&bnxt_re_dev_lock); 790 list_add_tail_rcu(&rdev->list, &bnxt_re_dev_list); 791 mutex_unlock(&bnxt_re_dev_lock); 792 return rdev; 793} 794 795static int bnxt_re_handle_unaffi_async_event(struct creq_func_event 796 *unaffi_async) 797{ 798 switch (unaffi_async->event) { 799 case CREQ_FUNC_EVENT_EVENT_TX_WQE_ERROR: 800 break; 801 case CREQ_FUNC_EVENT_EVENT_TX_DATA_ERROR: 802 break; 803 case CREQ_FUNC_EVENT_EVENT_RX_WQE_ERROR: 804 break; 805 case CREQ_FUNC_EVENT_EVENT_RX_DATA_ERROR: 806 break; 807 case CREQ_FUNC_EVENT_EVENT_CQ_ERROR: 808 break; 809 case CREQ_FUNC_EVENT_EVENT_TQM_ERROR: 810 break; 811 case CREQ_FUNC_EVENT_EVENT_CFCQ_ERROR: 812 break; 813 case CREQ_FUNC_EVENT_EVENT_CFCS_ERROR: 814 break; 815 case CREQ_FUNC_EVENT_EVENT_CFCC_ERROR: 816 break; 817 case CREQ_FUNC_EVENT_EVENT_CFCM_ERROR: 818 break; 819 case CREQ_FUNC_EVENT_EVENT_TIM_ERROR: 820 break; 821 default: 822 return -EINVAL; 823 } 824 return 0; 825} 826 827static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event, 828 struct bnxt_re_qp *qp) 829{ 830 struct ib_event event; 831 unsigned int flags; 832 833 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR && 834 rdma_is_kernel_res(&qp->ib_qp.res)) { 835 flags = bnxt_re_lock_cqs(qp); 836 bnxt_qplib_add_flush_qp(&qp->qplib_qp); 837 bnxt_re_unlock_cqs(qp, flags); 838 } 839 840 memset(&event, 0, sizeof(event)); 841 if (qp->qplib_qp.srq) { 842 event.device = &qp->rdev->ibdev; 843 event.element.qp = &qp->ib_qp; 844 event.event = IB_EVENT_QP_LAST_WQE_REACHED; 845 } 846 847 if (event.device && qp->ib_qp.event_handler) 848 qp->ib_qp.event_handler(&event, qp->ib_qp.qp_context); 849 850 return 0; 851} 852 853static int bnxt_re_handle_affi_async_event(struct creq_qp_event *affi_async, 854 void *obj) 855{ 856 int rc = 0; 857 u8 event; 858 859 if (!obj) 860 return rc; /* QP was already dead, still return success */ 861 862 event = affi_async->event; 863 if (event == CREQ_QP_EVENT_EVENT_QP_ERROR_NOTIFICATION) { 864 struct bnxt_qplib_qp *lib_qp = obj; 865 struct bnxt_re_qp *qp = container_of(lib_qp, struct bnxt_re_qp, 866 qplib_qp); 867 rc = bnxt_re_handle_qp_async_event(affi_async, qp); 868 } 869 return rc; 870} 871 872static int bnxt_re_aeq_handler(struct bnxt_qplib_rcfw *rcfw, 873 void *aeqe, void *obj) 874{ 875 struct creq_qp_event *affi_async; 876 struct creq_func_event *unaffi_async; 877 u8 type; 878 int rc; 879 880 type = ((struct creq_base *)aeqe)->type; 881 if (type == CREQ_BASE_TYPE_FUNC_EVENT) { 882 unaffi_async = aeqe; 883 rc = bnxt_re_handle_unaffi_async_event(unaffi_async); 884 } else { 885 affi_async = aeqe; 886 rc = bnxt_re_handle_affi_async_event(affi_async, obj); 887 } 888 889 return rc; 890} 891 892static int bnxt_re_srqn_handler(struct bnxt_qplib_nq *nq, 893 struct bnxt_qplib_srq *handle, u8 event) 894{ 895 struct bnxt_re_srq *srq = container_of(handle, struct bnxt_re_srq, 896 qplib_srq); 897 struct ib_event ib_event; 898 int rc = 0; 899 900 if (!srq) { 901 ibdev_err(NULL, "%s: SRQ is NULL, SRQN not handled", 902 ROCE_DRV_MODULE_NAME); 903 rc = -EINVAL; 904 goto done; 905 } 906 ib_event.device = &srq->rdev->ibdev; 907 ib_event.element.srq = &srq->ib_srq; 908 if (event == NQ_SRQ_EVENT_EVENT_SRQ_THRESHOLD_EVENT) 909 ib_event.event = IB_EVENT_SRQ_LIMIT_REACHED; 910 else 911 ib_event.event = IB_EVENT_SRQ_ERR; 912 913 if (srq->ib_srq.event_handler) { 914 /* Lock event_handler? */ 915 (*srq->ib_srq.event_handler)(&ib_event, 916 srq->ib_srq.srq_context); 917 } 918done: 919 return rc; 920} 921 922static int bnxt_re_cqn_handler(struct bnxt_qplib_nq *nq, 923 struct bnxt_qplib_cq *handle) 924{ 925 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq, 926 qplib_cq); 927 928 if (!cq) { 929 ibdev_err(NULL, "%s: CQ is NULL, CQN not handled", 930 ROCE_DRV_MODULE_NAME); 931 return -EINVAL; 932 } 933 if (cq->ib_cq.comp_handler) { 934 /* Lock comp_handler? */ 935 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context); 936 } 937 938 return 0; 939} 940 941#define BNXT_RE_GEN_P5_PF_NQ_DB 0x10000 942#define BNXT_RE_GEN_P5_VF_NQ_DB 0x4000 943static u32 bnxt_re_get_nqdb_offset(struct bnxt_re_dev *rdev, u16 indx) 944{ 945 return bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx) ? 946 (rdev->is_virtfn ? BNXT_RE_GEN_P5_VF_NQ_DB : 947 BNXT_RE_GEN_P5_PF_NQ_DB) : 948 rdev->msix_entries[indx].db_offset; 949} 950 951static void bnxt_re_cleanup_res(struct bnxt_re_dev *rdev) 952{ 953 int i; 954 955 for (i = 1; i < rdev->num_msix; i++) 956 bnxt_qplib_disable_nq(&rdev->nq[i - 1]); 957 958 if (rdev->qplib_res.rcfw) 959 bnxt_qplib_cleanup_res(&rdev->qplib_res); 960} 961 962static int bnxt_re_init_res(struct bnxt_re_dev *rdev) 963{ 964 int num_vec_enabled = 0; 965 int rc = 0, i; 966 u32 db_offt; 967 968 bnxt_qplib_init_res(&rdev->qplib_res); 969 970 for (i = 1; i < rdev->num_msix ; i++) { 971 db_offt = bnxt_re_get_nqdb_offset(rdev, i); 972 rc = bnxt_qplib_enable_nq(rdev->en_dev->pdev, &rdev->nq[i - 1], 973 i - 1, rdev->msix_entries[i].vector, 974 db_offt, &bnxt_re_cqn_handler, 975 &bnxt_re_srqn_handler); 976 if (rc) { 977 ibdev_err(&rdev->ibdev, 978 "Failed to enable NQ with rc = 0x%x", rc); 979 goto fail; 980 } 981 num_vec_enabled++; 982 } 983 return 0; 984fail: 985 for (i = num_vec_enabled; i >= 0; i--) 986 bnxt_qplib_disable_nq(&rdev->nq[i]); 987 return rc; 988} 989 990static void bnxt_re_free_nq_res(struct bnxt_re_dev *rdev) 991{ 992 u8 type; 993 int i; 994 995 for (i = 0; i < rdev->num_msix - 1; i++) { 996 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 997 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type); 998 bnxt_qplib_free_nq(&rdev->nq[i]); 999 rdev->nq[i].res = NULL; 1000 } 1001} 1002 1003static void bnxt_re_free_res(struct bnxt_re_dev *rdev) 1004{ 1005 bnxt_re_free_nq_res(rdev); 1006 1007 if (rdev->qplib_res.dpi_tbl.max) { 1008 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 1009 &rdev->qplib_res.dpi_tbl, 1010 &rdev->dpi_privileged); 1011 } 1012 if (rdev->qplib_res.rcfw) { 1013 bnxt_qplib_free_res(&rdev->qplib_res); 1014 rdev->qplib_res.rcfw = NULL; 1015 } 1016} 1017 1018static int bnxt_re_alloc_res(struct bnxt_re_dev *rdev) 1019{ 1020 struct bnxt_re_ring_attr rattr = {}; 1021 int num_vec_created = 0; 1022 int rc = 0, i; 1023 u8 type; 1024 1025 /* Configure and allocate resources for qplib */ 1026 rdev->qplib_res.rcfw = &rdev->rcfw; 1027 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 1028 rdev->is_virtfn); 1029 if (rc) 1030 goto fail; 1031 1032 rc = bnxt_qplib_alloc_res(&rdev->qplib_res, rdev->en_dev->pdev, 1033 rdev->netdev, &rdev->dev_attr); 1034 if (rc) 1035 goto fail; 1036 1037 rc = bnxt_qplib_alloc_dpi(&rdev->qplib_res.dpi_tbl, 1038 &rdev->dpi_privileged, 1039 rdev); 1040 if (rc) 1041 goto dealloc_res; 1042 1043 for (i = 0; i < rdev->num_msix - 1; i++) { 1044 struct bnxt_qplib_nq *nq; 1045 1046 nq = &rdev->nq[i]; 1047 nq->hwq.max_elements = BNXT_QPLIB_NQE_MAX_CNT; 1048 rc = bnxt_qplib_alloc_nq(&rdev->qplib_res, &rdev->nq[i]); 1049 if (rc) { 1050 ibdev_err(&rdev->ibdev, "Alloc Failed NQ%d rc:%#x", 1051 i, rc); 1052 goto free_nq; 1053 } 1054 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1055 rattr.dma_arr = nq->hwq.pbl[PBL_LVL_0].pg_map_arr; 1056 rattr.pages = nq->hwq.pbl[rdev->nq[i].hwq.level].pg_count; 1057 rattr.type = type; 1058 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX; 1059 rattr.depth = BNXT_QPLIB_NQE_MAX_CNT - 1; 1060 rattr.lrid = rdev->msix_entries[i + 1].ring_idx; 1061 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &nq->ring_id); 1062 if (rc) { 1063 ibdev_err(&rdev->ibdev, 1064 "Failed to allocate NQ fw id with rc = 0x%x", 1065 rc); 1066 bnxt_qplib_free_nq(&rdev->nq[i]); 1067 goto free_nq; 1068 } 1069 num_vec_created++; 1070 } 1071 return 0; 1072free_nq: 1073 for (i = num_vec_created - 1; i >= 0; i--) { 1074 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1075 bnxt_re_net_ring_free(rdev, rdev->nq[i].ring_id, type); 1076 bnxt_qplib_free_nq(&rdev->nq[i]); 1077 } 1078 bnxt_qplib_dealloc_dpi(&rdev->qplib_res, 1079 &rdev->qplib_res.dpi_tbl, 1080 &rdev->dpi_privileged); 1081dealloc_res: 1082 bnxt_qplib_free_res(&rdev->qplib_res); 1083 1084fail: 1085 rdev->qplib_res.rcfw = NULL; 1086 return rc; 1087} 1088 1089static void bnxt_re_dispatch_event(struct ib_device *ibdev, struct ib_qp *qp, 1090 u8 port_num, enum ib_event_type event) 1091{ 1092 struct ib_event ib_event; 1093 1094 ib_event.device = ibdev; 1095 if (qp) { 1096 ib_event.element.qp = qp; 1097 ib_event.event = event; 1098 if (qp->event_handler) 1099 qp->event_handler(&ib_event, qp->qp_context); 1100 1101 } else { 1102 ib_event.element.port_num = port_num; 1103 ib_event.event = event; 1104 ib_dispatch_event(&ib_event); 1105 } 1106} 1107 1108#define HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN 0x02 1109static int bnxt_re_query_hwrm_pri2cos(struct bnxt_re_dev *rdev, u8 dir, 1110 u64 *cid_map) 1111{ 1112 struct hwrm_queue_pri2cos_qcfg_input req = {0}; 1113 struct bnxt *bp = netdev_priv(rdev->netdev); 1114 struct hwrm_queue_pri2cos_qcfg_output resp; 1115 struct bnxt_en_dev *en_dev = rdev->en_dev; 1116 struct bnxt_fw_msg fw_msg; 1117 u32 flags = 0; 1118 u8 *qcfgmap, *tmp_map; 1119 int rc = 0, i; 1120 1121 if (!cid_map) 1122 return -EINVAL; 1123 1124 memset(&fw_msg, 0, sizeof(fw_msg)); 1125 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, 1126 HWRM_QUEUE_PRI2COS_QCFG, -1, -1); 1127 flags |= (dir & 0x01); 1128 flags |= HWRM_QUEUE_PRI2COS_QCFG_INPUT_FLAGS_IVLAN; 1129 req.flags = cpu_to_le32(flags); 1130 req.port_id = bp->pf.port_id; 1131 1132 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 1133 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 1134 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 1135 if (rc) 1136 return rc; 1137 1138 if (resp.queue_cfg_info) { 1139 ibdev_warn(&rdev->ibdev, 1140 "Asymmetric cos queue configuration detected"); 1141 ibdev_warn(&rdev->ibdev, 1142 " on device, QoS may not be fully functional\n"); 1143 } 1144 qcfgmap = &resp.pri0_cos_queue_id; 1145 tmp_map = (u8 *)cid_map; 1146 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) 1147 tmp_map[i] = qcfgmap[i]; 1148 1149 return rc; 1150} 1151 1152static bool bnxt_re_is_qp1_or_shadow_qp(struct bnxt_re_dev *rdev, 1153 struct bnxt_re_qp *qp) 1154{ 1155 return (qp->ib_qp.qp_type == IB_QPT_GSI) || 1156 (qp == rdev->gsi_ctx.gsi_sqp); 1157} 1158 1159static void bnxt_re_dev_stop(struct bnxt_re_dev *rdev) 1160{ 1161 int mask = IB_QP_STATE; 1162 struct ib_qp_attr qp_attr; 1163 struct bnxt_re_qp *qp; 1164 1165 qp_attr.qp_state = IB_QPS_ERR; 1166 mutex_lock(&rdev->qp_lock); 1167 list_for_each_entry(qp, &rdev->qp_list, list) { 1168 /* Modify the state of all QPs except QP1/Shadow QP */ 1169 if (!bnxt_re_is_qp1_or_shadow_qp(rdev, qp)) { 1170 if (qp->qplib_qp.state != 1171 CMDQ_MODIFY_QP_NEW_STATE_RESET && 1172 qp->qplib_qp.state != 1173 CMDQ_MODIFY_QP_NEW_STATE_ERR) { 1174 bnxt_re_dispatch_event(&rdev->ibdev, &qp->ib_qp, 1175 1, IB_EVENT_QP_FATAL); 1176 bnxt_re_modify_qp(&qp->ib_qp, &qp_attr, mask, 1177 NULL); 1178 } 1179 } 1180 } 1181 mutex_unlock(&rdev->qp_lock); 1182} 1183 1184static int bnxt_re_update_gid(struct bnxt_re_dev *rdev) 1185{ 1186 struct bnxt_qplib_sgid_tbl *sgid_tbl = &rdev->qplib_res.sgid_tbl; 1187 struct bnxt_qplib_gid gid; 1188 u16 gid_idx, index; 1189 int rc = 0; 1190 1191 if (!ib_device_try_get(&rdev->ibdev)) 1192 return 0; 1193 1194 for (index = 0; index < sgid_tbl->active; index++) { 1195 gid_idx = sgid_tbl->hw_id[index]; 1196 1197 if (!memcmp(&sgid_tbl->tbl[index], &bnxt_qplib_gid_zero, 1198 sizeof(bnxt_qplib_gid_zero))) 1199 continue; 1200 /* need to modify the VLAN enable setting of non VLAN GID only 1201 * as setting is done for VLAN GID while adding GID 1202 */ 1203 if (sgid_tbl->vlan[index]) 1204 continue; 1205 1206 memcpy(&gid, &sgid_tbl->tbl[index], sizeof(gid)); 1207 1208 rc = bnxt_qplib_update_sgid(sgid_tbl, &gid, gid_idx, 1209 rdev->qplib_res.netdev->dev_addr); 1210 } 1211 1212 ib_device_put(&rdev->ibdev); 1213 return rc; 1214} 1215 1216static u32 bnxt_re_get_priority_mask(struct bnxt_re_dev *rdev) 1217{ 1218 u32 prio_map = 0, tmp_map = 0; 1219 struct net_device *netdev; 1220 struct dcb_app app; 1221 1222 netdev = rdev->netdev; 1223 1224 memset(&app, 0, sizeof(app)); 1225 app.selector = IEEE_8021QAZ_APP_SEL_ETHERTYPE; 1226 app.protocol = ETH_P_IBOE; 1227 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1228 prio_map = tmp_map; 1229 1230 app.selector = IEEE_8021QAZ_APP_SEL_DGRAM; 1231 app.protocol = ROCE_V2_UDP_DPORT; 1232 tmp_map = dcb_ieee_getapp_mask(netdev, &app); 1233 prio_map |= tmp_map; 1234 1235 return prio_map; 1236} 1237 1238static void bnxt_re_parse_cid_map(u8 prio_map, u8 *cid_map, u16 *cosq) 1239{ 1240 u16 prio; 1241 u8 id; 1242 1243 for (prio = 0, id = 0; prio < 8; prio++) { 1244 if (prio_map & (1 << prio)) { 1245 cosq[id] = cid_map[prio]; 1246 id++; 1247 if (id == 2) /* Max 2 tcs supported */ 1248 break; 1249 } 1250 } 1251} 1252 1253static int bnxt_re_setup_qos(struct bnxt_re_dev *rdev) 1254{ 1255 u8 prio_map = 0; 1256 u64 cid_map; 1257 int rc; 1258 1259 /* Get priority for roce */ 1260 prio_map = bnxt_re_get_priority_mask(rdev); 1261 1262 if (prio_map == rdev->cur_prio_map) 1263 return 0; 1264 rdev->cur_prio_map = prio_map; 1265 /* Get cosq id for this priority */ 1266 rc = bnxt_re_query_hwrm_pri2cos(rdev, 0, &cid_map); 1267 if (rc) { 1268 ibdev_warn(&rdev->ibdev, "no cos for p_mask %x\n", prio_map); 1269 return rc; 1270 } 1271 /* Parse CoS IDs for app priority */ 1272 bnxt_re_parse_cid_map(prio_map, (u8 *)&cid_map, rdev->cosq); 1273 1274 /* Config BONO. */ 1275 rc = bnxt_qplib_map_tc2cos(&rdev->qplib_res, rdev->cosq); 1276 if (rc) { 1277 ibdev_warn(&rdev->ibdev, "no tc for cos{%x, %x}\n", 1278 rdev->cosq[0], rdev->cosq[1]); 1279 return rc; 1280 } 1281 1282 /* Actual priorities are not programmed as they are already 1283 * done by L2 driver; just enable or disable priority vlan tagging 1284 */ 1285 if ((prio_map == 0 && rdev->qplib_res.prio) || 1286 (prio_map != 0 && !rdev->qplib_res.prio)) { 1287 rdev->qplib_res.prio = prio_map ? true : false; 1288 1289 bnxt_re_update_gid(rdev); 1290 } 1291 1292 return 0; 1293} 1294 1295static void bnxt_re_query_hwrm_intf_version(struct bnxt_re_dev *rdev) 1296{ 1297 struct bnxt_en_dev *en_dev = rdev->en_dev; 1298 struct hwrm_ver_get_output resp = {0}; 1299 struct hwrm_ver_get_input req = {0}; 1300 struct bnxt_fw_msg fw_msg; 1301 int rc = 0; 1302 1303 memset(&fw_msg, 0, sizeof(fw_msg)); 1304 bnxt_re_init_hwrm_hdr(rdev, (void *)&req, 1305 HWRM_VER_GET, -1, -1); 1306 req.hwrm_intf_maj = HWRM_VERSION_MAJOR; 1307 req.hwrm_intf_min = HWRM_VERSION_MINOR; 1308 req.hwrm_intf_upd = HWRM_VERSION_UPDATE; 1309 bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), (void *)&resp, 1310 sizeof(resp), DFLT_HWRM_CMD_TIMEOUT); 1311 rc = en_dev->en_ops->bnxt_send_fw_msg(en_dev, BNXT_ROCE_ULP, &fw_msg); 1312 if (rc) { 1313 ibdev_err(&rdev->ibdev, "Failed to query HW version, rc = 0x%x", 1314 rc); 1315 return; 1316 } 1317 rdev->qplib_ctx.hwrm_intf_ver = 1318 (u64)le16_to_cpu(resp.hwrm_intf_major) << 48 | 1319 (u64)le16_to_cpu(resp.hwrm_intf_minor) << 32 | 1320 (u64)le16_to_cpu(resp.hwrm_intf_build) << 16 | 1321 le16_to_cpu(resp.hwrm_intf_patch); 1322} 1323 1324static int bnxt_re_ib_init(struct bnxt_re_dev *rdev) 1325{ 1326 int rc = 0; 1327 u32 event; 1328 1329 /* Register ib dev */ 1330 rc = bnxt_re_register_ib(rdev); 1331 if (rc) { 1332 pr_err("Failed to register with IB: %#x\n", rc); 1333 return rc; 1334 } 1335 dev_info(rdev_to_dev(rdev), "Device registered successfully"); 1336 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1337 &rdev->active_width); 1338 set_bit(BNXT_RE_FLAG_ISSUE_ROCE_STATS, &rdev->flags); 1339 1340 event = netif_running(rdev->netdev) && netif_carrier_ok(rdev->netdev) ? 1341 IB_EVENT_PORT_ACTIVE : IB_EVENT_PORT_ERR; 1342 1343 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, event); 1344 1345 return rc; 1346} 1347 1348static void bnxt_re_dev_uninit(struct bnxt_re_dev *rdev) 1349{ 1350 u8 type; 1351 int rc; 1352 1353 if (test_and_clear_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags)) 1354 cancel_delayed_work_sync(&rdev->worker); 1355 1356 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, 1357 &rdev->flags)) 1358 bnxt_re_cleanup_res(rdev); 1359 if (test_and_clear_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags)) 1360 bnxt_re_free_res(rdev); 1361 1362 if (test_and_clear_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags)) { 1363 rc = bnxt_qplib_deinit_rcfw(&rdev->rcfw); 1364 if (rc) 1365 ibdev_warn(&rdev->ibdev, 1366 "Failed to deinitialize RCFW: %#x", rc); 1367 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); 1368 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx); 1369 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1370 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1371 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type); 1372 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1373 } 1374 if (test_and_clear_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags)) { 1375 rc = bnxt_re_free_msix(rdev); 1376 if (rc) 1377 ibdev_warn(&rdev->ibdev, 1378 "Failed to free MSI-X vectors: %#x", rc); 1379 } 1380 1381 bnxt_re_destroy_chip_ctx(rdev); 1382 if (test_and_clear_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags)) { 1383 rc = bnxt_re_unregister_netdev(rdev); 1384 if (rc) 1385 ibdev_warn(&rdev->ibdev, 1386 "Failed to unregister with netdev: %#x", rc); 1387 } 1388} 1389 1390/* worker thread for polling periodic events. Now used for QoS programming*/ 1391static void bnxt_re_worker(struct work_struct *work) 1392{ 1393 struct bnxt_re_dev *rdev = container_of(work, struct bnxt_re_dev, 1394 worker.work); 1395 1396 bnxt_re_setup_qos(rdev); 1397 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1398} 1399 1400static int bnxt_re_dev_init(struct bnxt_re_dev *rdev, u8 wqe_mode) 1401{ 1402 struct bnxt_qplib_creq_ctx *creq; 1403 struct bnxt_re_ring_attr rattr; 1404 u32 db_offt; 1405 int vid; 1406 u8 type; 1407 int rc; 1408 1409 /* Registered a new RoCE device instance to netdev */ 1410 memset(&rattr, 0, sizeof(rattr)); 1411 rc = bnxt_re_register_netdev(rdev); 1412 if (rc) { 1413 ibdev_err(&rdev->ibdev, 1414 "Failed to register with netedev: %#x\n", rc); 1415 return -EINVAL; 1416 } 1417 set_bit(BNXT_RE_FLAG_NETDEV_REGISTERED, &rdev->flags); 1418 1419 rc = bnxt_re_setup_chip_ctx(rdev, wqe_mode); 1420 if (rc) { 1421 ibdev_err(&rdev->ibdev, "Failed to get chip context\n"); 1422 return -EINVAL; 1423 } 1424 1425 /* Check whether VF or PF */ 1426 bnxt_re_get_sriov_func_type(rdev); 1427 1428 rc = bnxt_re_request_msix(rdev); 1429 if (rc) { 1430 ibdev_err(&rdev->ibdev, 1431 "Failed to get MSI-X vectors: %#x\n", rc); 1432 rc = -EINVAL; 1433 goto fail; 1434 } 1435 set_bit(BNXT_RE_FLAG_GOT_MSIX, &rdev->flags); 1436 1437 bnxt_re_query_hwrm_intf_version(rdev); 1438 1439 /* Establish RCFW Communication Channel to initialize the context 1440 * memory for the function and all child VFs 1441 */ 1442 rc = bnxt_qplib_alloc_rcfw_channel(&rdev->qplib_res, &rdev->rcfw, 1443 &rdev->qplib_ctx, 1444 BNXT_RE_MAX_QPC_COUNT); 1445 if (rc) { 1446 ibdev_err(&rdev->ibdev, 1447 "Failed to allocate RCFW Channel: %#x\n", rc); 1448 goto fail; 1449 } 1450 1451 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1452 creq = &rdev->rcfw.creq; 1453 rattr.dma_arr = creq->hwq.pbl[PBL_LVL_0].pg_map_arr; 1454 rattr.pages = creq->hwq.pbl[creq->hwq.level].pg_count; 1455 rattr.type = type; 1456 rattr.mode = RING_ALLOC_REQ_INT_MODE_MSIX; 1457 rattr.depth = BNXT_QPLIB_CREQE_MAX_CNT - 1; 1458 rattr.lrid = rdev->msix_entries[BNXT_RE_AEQ_IDX].ring_idx; 1459 rc = bnxt_re_net_ring_alloc(rdev, &rattr, &creq->ring_id); 1460 if (rc) { 1461 ibdev_err(&rdev->ibdev, "Failed to allocate CREQ: %#x\n", rc); 1462 goto free_rcfw; 1463 } 1464 db_offt = bnxt_re_get_nqdb_offset(rdev, BNXT_RE_AEQ_IDX); 1465 vid = rdev->msix_entries[BNXT_RE_AEQ_IDX].vector; 1466 rc = bnxt_qplib_enable_rcfw_channel(&rdev->rcfw, 1467 vid, db_offt, rdev->is_virtfn, 1468 &bnxt_re_aeq_handler); 1469 if (rc) { 1470 ibdev_err(&rdev->ibdev, "Failed to enable RCFW channel: %#x\n", 1471 rc); 1472 goto free_ring; 1473 } 1474 1475 rc = bnxt_qplib_get_dev_attr(&rdev->rcfw, &rdev->dev_attr, 1476 rdev->is_virtfn); 1477 if (rc) 1478 goto disable_rcfw; 1479 1480 bnxt_re_set_resource_limits(rdev); 1481 1482 rc = bnxt_qplib_alloc_ctx(&rdev->qplib_res, &rdev->qplib_ctx, 0, 1483 bnxt_qplib_is_chip_gen_p5(rdev->chip_ctx)); 1484 if (rc) { 1485 ibdev_err(&rdev->ibdev, 1486 "Failed to allocate QPLIB context: %#x\n", rc); 1487 goto disable_rcfw; 1488 } 1489 rc = bnxt_re_net_stats_ctx_alloc(rdev, 1490 rdev->qplib_ctx.stats.dma_map, 1491 &rdev->qplib_ctx.stats.fw_id); 1492 if (rc) { 1493 ibdev_err(&rdev->ibdev, 1494 "Failed to allocate stats context: %#x\n", rc); 1495 goto free_ctx; 1496 } 1497 1498 rc = bnxt_qplib_init_rcfw(&rdev->rcfw, &rdev->qplib_ctx, 1499 rdev->is_virtfn); 1500 if (rc) { 1501 ibdev_err(&rdev->ibdev, 1502 "Failed to initialize RCFW: %#x\n", rc); 1503 goto free_sctx; 1504 } 1505 set_bit(BNXT_RE_FLAG_RCFW_CHANNEL_EN, &rdev->flags); 1506 1507 /* Resources based on the 'new' device caps */ 1508 rc = bnxt_re_alloc_res(rdev); 1509 if (rc) { 1510 ibdev_err(&rdev->ibdev, 1511 "Failed to allocate resources: %#x\n", rc); 1512 goto fail; 1513 } 1514 set_bit(BNXT_RE_FLAG_RESOURCES_ALLOCATED, &rdev->flags); 1515 rc = bnxt_re_init_res(rdev); 1516 if (rc) { 1517 ibdev_err(&rdev->ibdev, 1518 "Failed to initialize resources: %#x\n", rc); 1519 goto fail; 1520 } 1521 1522 set_bit(BNXT_RE_FLAG_RESOURCES_INITIALIZED, &rdev->flags); 1523 1524 if (!rdev->is_virtfn) { 1525 rc = bnxt_re_setup_qos(rdev); 1526 if (rc) 1527 ibdev_info(&rdev->ibdev, 1528 "RoCE priority not yet configured\n"); 1529 1530 INIT_DELAYED_WORK(&rdev->worker, bnxt_re_worker); 1531 set_bit(BNXT_RE_FLAG_QOS_WORK_REG, &rdev->flags); 1532 schedule_delayed_work(&rdev->worker, msecs_to_jiffies(30000)); 1533 } 1534 1535 return 0; 1536free_sctx: 1537 bnxt_re_net_stats_ctx_free(rdev, rdev->qplib_ctx.stats.fw_id); 1538free_ctx: 1539 bnxt_qplib_free_ctx(&rdev->qplib_res, &rdev->qplib_ctx); 1540disable_rcfw: 1541 bnxt_qplib_disable_rcfw_channel(&rdev->rcfw); 1542free_ring: 1543 type = bnxt_qplib_get_ring_type(rdev->chip_ctx); 1544 bnxt_re_net_ring_free(rdev, rdev->rcfw.creq.ring_id, type); 1545free_rcfw: 1546 bnxt_qplib_free_rcfw_channel(&rdev->rcfw); 1547fail: 1548 bnxt_re_dev_uninit(rdev); 1549 1550 return rc; 1551} 1552 1553static void bnxt_re_dev_unreg(struct bnxt_re_dev *rdev) 1554{ 1555 struct bnxt_en_dev *en_dev = rdev->en_dev; 1556 struct net_device *netdev = rdev->netdev; 1557 1558 bnxt_re_dev_remove(rdev); 1559 1560 if (netdev) 1561 bnxt_re_dev_unprobe(netdev, en_dev); 1562} 1563 1564static int bnxt_re_dev_reg(struct bnxt_re_dev **rdev, struct net_device *netdev) 1565{ 1566 struct bnxt_en_dev *en_dev; 1567 int rc = 0; 1568 1569 if (!is_bnxt_re_dev(netdev)) 1570 return -ENODEV; 1571 1572 en_dev = bnxt_re_dev_probe(netdev); 1573 if (IS_ERR(en_dev)) { 1574 if (en_dev != ERR_PTR(-ENODEV)) 1575 ibdev_err(&(*rdev)->ibdev, "%s: Failed to probe\n", 1576 ROCE_DRV_MODULE_NAME); 1577 rc = PTR_ERR(en_dev); 1578 goto exit; 1579 } 1580 *rdev = bnxt_re_dev_add(netdev, en_dev); 1581 if (!*rdev) { 1582 rc = -ENOMEM; 1583 bnxt_re_dev_unprobe(netdev, en_dev); 1584 goto exit; 1585 } 1586exit: 1587 return rc; 1588} 1589 1590static void bnxt_re_remove_device(struct bnxt_re_dev *rdev) 1591{ 1592 bnxt_re_dev_uninit(rdev); 1593 pci_dev_put(rdev->en_dev->pdev); 1594 bnxt_re_dev_unreg(rdev); 1595} 1596 1597static int bnxt_re_add_device(struct bnxt_re_dev **rdev, 1598 struct net_device *netdev, u8 wqe_mode) 1599{ 1600 int rc; 1601 1602 rc = bnxt_re_dev_reg(rdev, netdev); 1603 if (rc == -ENODEV) 1604 return rc; 1605 if (rc) { 1606 pr_err("Failed to register with the device %s: %#x\n", 1607 netdev->name, rc); 1608 return rc; 1609 } 1610 1611 pci_dev_get((*rdev)->en_dev->pdev); 1612 rc = bnxt_re_dev_init(*rdev, wqe_mode); 1613 if (rc) { 1614 pci_dev_put((*rdev)->en_dev->pdev); 1615 bnxt_re_dev_unreg(*rdev); 1616 } 1617 1618 return rc; 1619} 1620 1621static void bnxt_re_dealloc_driver(struct ib_device *ib_dev) 1622{ 1623 struct bnxt_re_dev *rdev = 1624 container_of(ib_dev, struct bnxt_re_dev, ibdev); 1625 1626 dev_info(rdev_to_dev(rdev), "Unregistering Device"); 1627 1628 rtnl_lock(); 1629 bnxt_re_remove_device(rdev); 1630 rtnl_unlock(); 1631} 1632 1633/* Handle all deferred netevents tasks */ 1634static void bnxt_re_task(struct work_struct *work) 1635{ 1636 struct bnxt_re_work *re_work; 1637 struct bnxt_re_dev *rdev; 1638 int rc = 0; 1639 1640 re_work = container_of(work, struct bnxt_re_work, work); 1641 rdev = re_work->rdev; 1642 1643 if (re_work->event == NETDEV_REGISTER) { 1644 rc = bnxt_re_ib_init(rdev); 1645 if (rc) { 1646 ibdev_err(&rdev->ibdev, 1647 "Failed to register with IB: %#x", rc); 1648 rtnl_lock(); 1649 bnxt_re_remove_device(rdev); 1650 rtnl_unlock(); 1651 goto exit; 1652 } 1653 goto exit; 1654 } 1655 1656 if (!ib_device_try_get(&rdev->ibdev)) 1657 goto exit; 1658 1659 switch (re_work->event) { 1660 case NETDEV_UP: 1661 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1662 IB_EVENT_PORT_ACTIVE); 1663 break; 1664 case NETDEV_DOWN: 1665 bnxt_re_dev_stop(rdev); 1666 break; 1667 case NETDEV_CHANGE: 1668 if (!netif_carrier_ok(rdev->netdev)) 1669 bnxt_re_dev_stop(rdev); 1670 else if (netif_carrier_ok(rdev->netdev)) 1671 bnxt_re_dispatch_event(&rdev->ibdev, NULL, 1, 1672 IB_EVENT_PORT_ACTIVE); 1673 ib_get_eth_speed(&rdev->ibdev, 1, &rdev->active_speed, 1674 &rdev->active_width); 1675 break; 1676 default: 1677 break; 1678 } 1679 ib_device_put(&rdev->ibdev); 1680exit: 1681 put_device(&rdev->ibdev.dev); 1682 kfree(re_work); 1683} 1684 1685/* 1686 * "Notifier chain callback can be invoked for the same chain from 1687 * different CPUs at the same time". 1688 * 1689 * For cases when the netdev is already present, our call to the 1690 * register_netdevice_notifier() will actually get the rtnl_lock() 1691 * before sending NETDEV_REGISTER and (if up) NETDEV_UP 1692 * events. 1693 * 1694 * But for cases when the netdev is not already present, the notifier 1695 * chain is subjected to be invoked from different CPUs simultaneously. 1696 * 1697 * This is protected by the netdev_mutex. 1698 */ 1699static int bnxt_re_netdev_event(struct notifier_block *notifier, 1700 unsigned long event, void *ptr) 1701{ 1702 struct net_device *real_dev, *netdev = netdev_notifier_info_to_dev(ptr); 1703 struct bnxt_re_work *re_work; 1704 struct bnxt_re_dev *rdev; 1705 int rc = 0; 1706 bool sch_work = false; 1707 bool release = true; 1708 1709 real_dev = rdma_vlan_dev_real_dev(netdev); 1710 if (!real_dev) 1711 real_dev = netdev; 1712 1713 rdev = bnxt_re_from_netdev(real_dev); 1714 if (!rdev && event != NETDEV_REGISTER) 1715 return NOTIFY_OK; 1716 1717 if (real_dev != netdev) 1718 goto exit; 1719 1720 switch (event) { 1721 case NETDEV_REGISTER: 1722 if (rdev) 1723 break; 1724 rc = bnxt_re_add_device(&rdev, real_dev, 1725 BNXT_QPLIB_WQE_MODE_STATIC); 1726 if (!rc) 1727 sch_work = true; 1728 release = false; 1729 break; 1730 1731 case NETDEV_UNREGISTER: 1732 ib_unregister_device_queued(&rdev->ibdev); 1733 break; 1734 1735 default: 1736 sch_work = true; 1737 break; 1738 } 1739 if (sch_work) { 1740 /* Allocate for the deferred task */ 1741 re_work = kzalloc(sizeof(*re_work), GFP_ATOMIC); 1742 if (re_work) { 1743 get_device(&rdev->ibdev.dev); 1744 re_work->rdev = rdev; 1745 re_work->event = event; 1746 re_work->vlan_dev = (real_dev == netdev ? 1747 NULL : netdev); 1748 INIT_WORK(&re_work->work, bnxt_re_task); 1749 queue_work(bnxt_re_wq, &re_work->work); 1750 } 1751 } 1752 1753exit: 1754 if (rdev && release) 1755 ib_device_put(&rdev->ibdev); 1756 return NOTIFY_DONE; 1757} 1758 1759static struct notifier_block bnxt_re_netdev_notifier = { 1760 .notifier_call = bnxt_re_netdev_event 1761}; 1762 1763static int __init bnxt_re_mod_init(void) 1764{ 1765 int rc = 0; 1766 1767 pr_info("%s: %s", ROCE_DRV_MODULE_NAME, version); 1768 1769 bnxt_re_wq = create_singlethread_workqueue("bnxt_re"); 1770 if (!bnxt_re_wq) 1771 return -ENOMEM; 1772 1773 INIT_LIST_HEAD(&bnxt_re_dev_list); 1774 1775 rc = register_netdevice_notifier(&bnxt_re_netdev_notifier); 1776 if (rc) { 1777 pr_err("%s: Cannot register to netdevice_notifier", 1778 ROCE_DRV_MODULE_NAME); 1779 goto err_netdev; 1780 } 1781 return 0; 1782 1783err_netdev: 1784 destroy_workqueue(bnxt_re_wq); 1785 1786 return rc; 1787} 1788 1789static void __exit bnxt_re_mod_exit(void) 1790{ 1791 struct bnxt_re_dev *rdev; 1792 1793 unregister_netdevice_notifier(&bnxt_re_netdev_notifier); 1794 if (bnxt_re_wq) 1795 destroy_workqueue(bnxt_re_wq); 1796 list_for_each_entry(rdev, &bnxt_re_dev_list, list) { 1797 /* VF device removal should be called before the removal 1798 * of PF device. Queue VFs unregister first, so that VFs 1799 * shall be removed before the PF during the call of 1800 * ib_unregister_driver. 1801 */ 1802 if (rdev->is_virtfn) 1803 ib_unregister_device(&rdev->ibdev); 1804 } 1805 ib_unregister_driver(RDMA_DRIVER_BNXT_RE); 1806} 1807 1808module_init(bnxt_re_mod_init); 1809module_exit(bnxt_re_mod_exit); 1810