18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci/** 38c2ecf20Sopenharmony_ci * opt3001.c - Texas Instruments OPT3001 Light Sensor 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Author: Andreas Dannenberg <dannenberg@ti.com> 88c2ecf20Sopenharmony_ci * Based on previous work from: Felipe Balbi <balbi@ti.com> 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#include <linux/bitops.h> 128c2ecf20Sopenharmony_ci#include <linux/delay.h> 138c2ecf20Sopenharmony_ci#include <linux/device.h> 148c2ecf20Sopenharmony_ci#include <linux/i2c.h> 158c2ecf20Sopenharmony_ci#include <linux/interrupt.h> 168c2ecf20Sopenharmony_ci#include <linux/irq.h> 178c2ecf20Sopenharmony_ci#include <linux/kernel.h> 188c2ecf20Sopenharmony_ci#include <linux/module.h> 198c2ecf20Sopenharmony_ci#include <linux/mod_devicetable.h> 208c2ecf20Sopenharmony_ci#include <linux/mutex.h> 218c2ecf20Sopenharmony_ci#include <linux/slab.h> 228c2ecf20Sopenharmony_ci#include <linux/types.h> 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci#include <linux/iio/events.h> 258c2ecf20Sopenharmony_ci#include <linux/iio/iio.h> 268c2ecf20Sopenharmony_ci#include <linux/iio/sysfs.h> 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci#define OPT3001_RESULT 0x00 298c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION 0x01 308c2ecf20Sopenharmony_ci#define OPT3001_LOW_LIMIT 0x02 318c2ecf20Sopenharmony_ci#define OPT3001_HIGH_LIMIT 0x03 328c2ecf20Sopenharmony_ci#define OPT3001_MANUFACTURER_ID 0x7e 338c2ecf20Sopenharmony_ci#define OPT3001_DEVICE_ID 0x7f 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_RN_MASK (0xf << 12) 368c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12) 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_CT BIT(11) 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_M_MASK (3 << 9) 418c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9) 428c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_M_SINGLE (1 << 9) 438c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */ 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_OVF BIT(8) 468c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_CRF BIT(7) 478c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_FH BIT(6) 488c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_FL BIT(5) 498c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_L BIT(4) 508c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_POL BIT(3) 518c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_ME BIT(2) 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci#define OPT3001_CONFIGURATION_FC_MASK (3 << 0) 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci/* The end-of-conversion enable is located in the low-limit register */ 568c2ecf20Sopenharmony_ci#define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci#define OPT3001_REG_EXPONENT(n) ((n) >> 12) 598c2ecf20Sopenharmony_ci#define OPT3001_REG_MANTISSA(n) ((n) & 0xfff) 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci#define OPT3001_INT_TIME_LONG 800000 628c2ecf20Sopenharmony_ci#define OPT3001_INT_TIME_SHORT 100000 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci/* 658c2ecf20Sopenharmony_ci * Time to wait for conversion result to be ready. The device datasheet 668c2ecf20Sopenharmony_ci * sect. 6.5 states results are ready after total integration time plus 3ms. 678c2ecf20Sopenharmony_ci * This results in worst-case max values of 113ms or 883ms, respectively. 688c2ecf20Sopenharmony_ci * Add some slack to be on the safe side. 698c2ecf20Sopenharmony_ci */ 708c2ecf20Sopenharmony_ci#define OPT3001_RESULT_READY_SHORT 150 718c2ecf20Sopenharmony_ci#define OPT3001_RESULT_READY_LONG 1000 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_cistruct opt3001 { 748c2ecf20Sopenharmony_ci struct i2c_client *client; 758c2ecf20Sopenharmony_ci struct device *dev; 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ci struct mutex lock; 788c2ecf20Sopenharmony_ci bool ok_to_ignore_lock; 798c2ecf20Sopenharmony_ci bool result_ready; 808c2ecf20Sopenharmony_ci wait_queue_head_t result_ready_queue; 818c2ecf20Sopenharmony_ci u16 result; 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ci u32 int_time; 848c2ecf20Sopenharmony_ci u32 mode; 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ci u16 high_thresh_mantissa; 878c2ecf20Sopenharmony_ci u16 low_thresh_mantissa; 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ci u8 high_thresh_exp; 908c2ecf20Sopenharmony_ci u8 low_thresh_exp; 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci bool use_irq; 938c2ecf20Sopenharmony_ci}; 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_cistruct opt3001_scale { 968c2ecf20Sopenharmony_ci int val; 978c2ecf20Sopenharmony_ci int val2; 988c2ecf20Sopenharmony_ci}; 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_cistatic const struct opt3001_scale opt3001_scales[] = { 1018c2ecf20Sopenharmony_ci { 1028c2ecf20Sopenharmony_ci .val = 40, 1038c2ecf20Sopenharmony_ci .val2 = 950000, 1048c2ecf20Sopenharmony_ci }, 1058c2ecf20Sopenharmony_ci { 1068c2ecf20Sopenharmony_ci .val = 81, 1078c2ecf20Sopenharmony_ci .val2 = 900000, 1088c2ecf20Sopenharmony_ci }, 1098c2ecf20Sopenharmony_ci { 1108c2ecf20Sopenharmony_ci .val = 163, 1118c2ecf20Sopenharmony_ci .val2 = 800000, 1128c2ecf20Sopenharmony_ci }, 1138c2ecf20Sopenharmony_ci { 1148c2ecf20Sopenharmony_ci .val = 327, 1158c2ecf20Sopenharmony_ci .val2 = 600000, 1168c2ecf20Sopenharmony_ci }, 1178c2ecf20Sopenharmony_ci { 1188c2ecf20Sopenharmony_ci .val = 655, 1198c2ecf20Sopenharmony_ci .val2 = 200000, 1208c2ecf20Sopenharmony_ci }, 1218c2ecf20Sopenharmony_ci { 1228c2ecf20Sopenharmony_ci .val = 1310, 1238c2ecf20Sopenharmony_ci .val2 = 400000, 1248c2ecf20Sopenharmony_ci }, 1258c2ecf20Sopenharmony_ci { 1268c2ecf20Sopenharmony_ci .val = 2620, 1278c2ecf20Sopenharmony_ci .val2 = 800000, 1288c2ecf20Sopenharmony_ci }, 1298c2ecf20Sopenharmony_ci { 1308c2ecf20Sopenharmony_ci .val = 5241, 1318c2ecf20Sopenharmony_ci .val2 = 600000, 1328c2ecf20Sopenharmony_ci }, 1338c2ecf20Sopenharmony_ci { 1348c2ecf20Sopenharmony_ci .val = 10483, 1358c2ecf20Sopenharmony_ci .val2 = 200000, 1368c2ecf20Sopenharmony_ci }, 1378c2ecf20Sopenharmony_ci { 1388c2ecf20Sopenharmony_ci .val = 20966, 1398c2ecf20Sopenharmony_ci .val2 = 400000, 1408c2ecf20Sopenharmony_ci }, 1418c2ecf20Sopenharmony_ci { 1428c2ecf20Sopenharmony_ci .val = 83865, 1438c2ecf20Sopenharmony_ci .val2 = 600000, 1448c2ecf20Sopenharmony_ci }, 1458c2ecf20Sopenharmony_ci}; 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_cistatic int opt3001_find_scale(const struct opt3001 *opt, int val, 1488c2ecf20Sopenharmony_ci int val2, u8 *exponent) 1498c2ecf20Sopenharmony_ci{ 1508c2ecf20Sopenharmony_ci int i; 1518c2ecf20Sopenharmony_ci 1528c2ecf20Sopenharmony_ci for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) { 1538c2ecf20Sopenharmony_ci const struct opt3001_scale *scale = &opt3001_scales[i]; 1548c2ecf20Sopenharmony_ci 1558c2ecf20Sopenharmony_ci /* 1568c2ecf20Sopenharmony_ci * Combine the integer and micro parts for comparison 1578c2ecf20Sopenharmony_ci * purposes. Use milli lux precision to avoid 32-bit integer 1588c2ecf20Sopenharmony_ci * overflows. 1598c2ecf20Sopenharmony_ci */ 1608c2ecf20Sopenharmony_ci if ((val * 1000 + val2 / 1000) <= 1618c2ecf20Sopenharmony_ci (scale->val * 1000 + scale->val2 / 1000)) { 1628c2ecf20Sopenharmony_ci *exponent = i; 1638c2ecf20Sopenharmony_ci return 0; 1648c2ecf20Sopenharmony_ci } 1658c2ecf20Sopenharmony_ci } 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci return -EINVAL; 1688c2ecf20Sopenharmony_ci} 1698c2ecf20Sopenharmony_ci 1708c2ecf20Sopenharmony_cistatic void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent, 1718c2ecf20Sopenharmony_ci u16 mantissa, int *val, int *val2) 1728c2ecf20Sopenharmony_ci{ 1738c2ecf20Sopenharmony_ci int lux; 1748c2ecf20Sopenharmony_ci 1758c2ecf20Sopenharmony_ci lux = 10 * (mantissa << exponent); 1768c2ecf20Sopenharmony_ci *val = lux / 1000; 1778c2ecf20Sopenharmony_ci *val2 = (lux - (*val * 1000)) * 1000; 1788c2ecf20Sopenharmony_ci} 1798c2ecf20Sopenharmony_ci 1808c2ecf20Sopenharmony_cistatic void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode) 1818c2ecf20Sopenharmony_ci{ 1828c2ecf20Sopenharmony_ci *reg &= ~OPT3001_CONFIGURATION_M_MASK; 1838c2ecf20Sopenharmony_ci *reg |= mode; 1848c2ecf20Sopenharmony_ci opt->mode = mode; 1858c2ecf20Sopenharmony_ci} 1868c2ecf20Sopenharmony_ci 1878c2ecf20Sopenharmony_cistatic IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8"); 1888c2ecf20Sopenharmony_ci 1898c2ecf20Sopenharmony_cistatic struct attribute *opt3001_attributes[] = { 1908c2ecf20Sopenharmony_ci &iio_const_attr_integration_time_available.dev_attr.attr, 1918c2ecf20Sopenharmony_ci NULL 1928c2ecf20Sopenharmony_ci}; 1938c2ecf20Sopenharmony_ci 1948c2ecf20Sopenharmony_cistatic const struct attribute_group opt3001_attribute_group = { 1958c2ecf20Sopenharmony_ci .attrs = opt3001_attributes, 1968c2ecf20Sopenharmony_ci}; 1978c2ecf20Sopenharmony_ci 1988c2ecf20Sopenharmony_cistatic const struct iio_event_spec opt3001_event_spec[] = { 1998c2ecf20Sopenharmony_ci { 2008c2ecf20Sopenharmony_ci .type = IIO_EV_TYPE_THRESH, 2018c2ecf20Sopenharmony_ci .dir = IIO_EV_DIR_RISING, 2028c2ecf20Sopenharmony_ci .mask_separate = BIT(IIO_EV_INFO_VALUE) | 2038c2ecf20Sopenharmony_ci BIT(IIO_EV_INFO_ENABLE), 2048c2ecf20Sopenharmony_ci }, 2058c2ecf20Sopenharmony_ci { 2068c2ecf20Sopenharmony_ci .type = IIO_EV_TYPE_THRESH, 2078c2ecf20Sopenharmony_ci .dir = IIO_EV_DIR_FALLING, 2088c2ecf20Sopenharmony_ci .mask_separate = BIT(IIO_EV_INFO_VALUE) | 2098c2ecf20Sopenharmony_ci BIT(IIO_EV_INFO_ENABLE), 2108c2ecf20Sopenharmony_ci }, 2118c2ecf20Sopenharmony_ci}; 2128c2ecf20Sopenharmony_ci 2138c2ecf20Sopenharmony_cistatic const struct iio_chan_spec opt3001_channels[] = { 2148c2ecf20Sopenharmony_ci { 2158c2ecf20Sopenharmony_ci .type = IIO_LIGHT, 2168c2ecf20Sopenharmony_ci .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) | 2178c2ecf20Sopenharmony_ci BIT(IIO_CHAN_INFO_INT_TIME), 2188c2ecf20Sopenharmony_ci .event_spec = opt3001_event_spec, 2198c2ecf20Sopenharmony_ci .num_event_specs = ARRAY_SIZE(opt3001_event_spec), 2208c2ecf20Sopenharmony_ci }, 2218c2ecf20Sopenharmony_ci IIO_CHAN_SOFT_TIMESTAMP(1), 2228c2ecf20Sopenharmony_ci}; 2238c2ecf20Sopenharmony_ci 2248c2ecf20Sopenharmony_cistatic int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2) 2258c2ecf20Sopenharmony_ci{ 2268c2ecf20Sopenharmony_ci int ret; 2278c2ecf20Sopenharmony_ci u16 mantissa; 2288c2ecf20Sopenharmony_ci u16 reg; 2298c2ecf20Sopenharmony_ci u8 exponent; 2308c2ecf20Sopenharmony_ci u16 value; 2318c2ecf20Sopenharmony_ci long timeout; 2328c2ecf20Sopenharmony_ci 2338c2ecf20Sopenharmony_ci if (opt->use_irq) { 2348c2ecf20Sopenharmony_ci /* 2358c2ecf20Sopenharmony_ci * Enable the end-of-conversion interrupt mechanism. Note that 2368c2ecf20Sopenharmony_ci * doing so will overwrite the low-level limit value however we 2378c2ecf20Sopenharmony_ci * will restore this value later on. 2388c2ecf20Sopenharmony_ci */ 2398c2ecf20Sopenharmony_ci ret = i2c_smbus_write_word_swapped(opt->client, 2408c2ecf20Sopenharmony_ci OPT3001_LOW_LIMIT, 2418c2ecf20Sopenharmony_ci OPT3001_LOW_LIMIT_EOC_ENABLE); 2428c2ecf20Sopenharmony_ci if (ret < 0) { 2438c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to write register %02x\n", 2448c2ecf20Sopenharmony_ci OPT3001_LOW_LIMIT); 2458c2ecf20Sopenharmony_ci return ret; 2468c2ecf20Sopenharmony_ci } 2478c2ecf20Sopenharmony_ci 2488c2ecf20Sopenharmony_ci /* Allow IRQ to access the device despite lock being set */ 2498c2ecf20Sopenharmony_ci opt->ok_to_ignore_lock = true; 2508c2ecf20Sopenharmony_ci } 2518c2ecf20Sopenharmony_ci 2528c2ecf20Sopenharmony_ci /* Reset data-ready indicator flag */ 2538c2ecf20Sopenharmony_ci opt->result_ready = false; 2548c2ecf20Sopenharmony_ci 2558c2ecf20Sopenharmony_ci /* Configure for single-conversion mode and start a new conversion */ 2568c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 2578c2ecf20Sopenharmony_ci if (ret < 0) { 2588c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 2598c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 2608c2ecf20Sopenharmony_ci goto err; 2618c2ecf20Sopenharmony_ci } 2628c2ecf20Sopenharmony_ci 2638c2ecf20Sopenharmony_ci reg = ret; 2648c2ecf20Sopenharmony_ci opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SINGLE); 2658c2ecf20Sopenharmony_ci 2668c2ecf20Sopenharmony_ci ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 2678c2ecf20Sopenharmony_ci reg); 2688c2ecf20Sopenharmony_ci if (ret < 0) { 2698c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to write register %02x\n", 2708c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 2718c2ecf20Sopenharmony_ci goto err; 2728c2ecf20Sopenharmony_ci } 2738c2ecf20Sopenharmony_ci 2748c2ecf20Sopenharmony_ci if (opt->use_irq) { 2758c2ecf20Sopenharmony_ci /* Wait for the IRQ to indicate the conversion is complete */ 2768c2ecf20Sopenharmony_ci ret = wait_event_timeout(opt->result_ready_queue, 2778c2ecf20Sopenharmony_ci opt->result_ready, 2788c2ecf20Sopenharmony_ci msecs_to_jiffies(OPT3001_RESULT_READY_LONG)); 2798c2ecf20Sopenharmony_ci if (ret == 0) 2808c2ecf20Sopenharmony_ci return -ETIMEDOUT; 2818c2ecf20Sopenharmony_ci } else { 2828c2ecf20Sopenharmony_ci /* Sleep for result ready time */ 2838c2ecf20Sopenharmony_ci timeout = (opt->int_time == OPT3001_INT_TIME_SHORT) ? 2848c2ecf20Sopenharmony_ci OPT3001_RESULT_READY_SHORT : OPT3001_RESULT_READY_LONG; 2858c2ecf20Sopenharmony_ci msleep(timeout); 2868c2ecf20Sopenharmony_ci 2878c2ecf20Sopenharmony_ci /* Check result ready flag */ 2888c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, 2898c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 2908c2ecf20Sopenharmony_ci if (ret < 0) { 2918c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 2928c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 2938c2ecf20Sopenharmony_ci goto err; 2948c2ecf20Sopenharmony_ci } 2958c2ecf20Sopenharmony_ci 2968c2ecf20Sopenharmony_ci if (!(ret & OPT3001_CONFIGURATION_CRF)) { 2978c2ecf20Sopenharmony_ci ret = -ETIMEDOUT; 2988c2ecf20Sopenharmony_ci goto err; 2998c2ecf20Sopenharmony_ci } 3008c2ecf20Sopenharmony_ci 3018c2ecf20Sopenharmony_ci /* Obtain value */ 3028c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 3038c2ecf20Sopenharmony_ci if (ret < 0) { 3048c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 3058c2ecf20Sopenharmony_ci OPT3001_RESULT); 3068c2ecf20Sopenharmony_ci goto err; 3078c2ecf20Sopenharmony_ci } 3088c2ecf20Sopenharmony_ci opt->result = ret; 3098c2ecf20Sopenharmony_ci opt->result_ready = true; 3108c2ecf20Sopenharmony_ci } 3118c2ecf20Sopenharmony_ci 3128c2ecf20Sopenharmony_cierr: 3138c2ecf20Sopenharmony_ci if (opt->use_irq) 3148c2ecf20Sopenharmony_ci /* Disallow IRQ to access the device while lock is active */ 3158c2ecf20Sopenharmony_ci opt->ok_to_ignore_lock = false; 3168c2ecf20Sopenharmony_ci 3178c2ecf20Sopenharmony_ci if (ret < 0) 3188c2ecf20Sopenharmony_ci return ret; 3198c2ecf20Sopenharmony_ci 3208c2ecf20Sopenharmony_ci if (opt->use_irq) { 3218c2ecf20Sopenharmony_ci /* 3228c2ecf20Sopenharmony_ci * Disable the end-of-conversion interrupt mechanism by 3238c2ecf20Sopenharmony_ci * restoring the low-level limit value (clearing 3248c2ecf20Sopenharmony_ci * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing 3258c2ecf20Sopenharmony_ci * those enable bits would affect the actual limit value due to 3268c2ecf20Sopenharmony_ci * bit-overlap and therefore can't be done. 3278c2ecf20Sopenharmony_ci */ 3288c2ecf20Sopenharmony_ci value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa; 3298c2ecf20Sopenharmony_ci ret = i2c_smbus_write_word_swapped(opt->client, 3308c2ecf20Sopenharmony_ci OPT3001_LOW_LIMIT, 3318c2ecf20Sopenharmony_ci value); 3328c2ecf20Sopenharmony_ci if (ret < 0) { 3338c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to write register %02x\n", 3348c2ecf20Sopenharmony_ci OPT3001_LOW_LIMIT); 3358c2ecf20Sopenharmony_ci return ret; 3368c2ecf20Sopenharmony_ci } 3378c2ecf20Sopenharmony_ci } 3388c2ecf20Sopenharmony_ci 3398c2ecf20Sopenharmony_ci exponent = OPT3001_REG_EXPONENT(opt->result); 3408c2ecf20Sopenharmony_ci mantissa = OPT3001_REG_MANTISSA(opt->result); 3418c2ecf20Sopenharmony_ci 3428c2ecf20Sopenharmony_ci opt3001_to_iio_ret(opt, exponent, mantissa, val, val2); 3438c2ecf20Sopenharmony_ci 3448c2ecf20Sopenharmony_ci return IIO_VAL_INT_PLUS_MICRO; 3458c2ecf20Sopenharmony_ci} 3468c2ecf20Sopenharmony_ci 3478c2ecf20Sopenharmony_cistatic int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2) 3488c2ecf20Sopenharmony_ci{ 3498c2ecf20Sopenharmony_ci *val = 0; 3508c2ecf20Sopenharmony_ci *val2 = opt->int_time; 3518c2ecf20Sopenharmony_ci 3528c2ecf20Sopenharmony_ci return IIO_VAL_INT_PLUS_MICRO; 3538c2ecf20Sopenharmony_ci} 3548c2ecf20Sopenharmony_ci 3558c2ecf20Sopenharmony_cistatic int opt3001_set_int_time(struct opt3001 *opt, int time) 3568c2ecf20Sopenharmony_ci{ 3578c2ecf20Sopenharmony_ci int ret; 3588c2ecf20Sopenharmony_ci u16 reg; 3598c2ecf20Sopenharmony_ci 3608c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 3618c2ecf20Sopenharmony_ci if (ret < 0) { 3628c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 3638c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 3648c2ecf20Sopenharmony_ci return ret; 3658c2ecf20Sopenharmony_ci } 3668c2ecf20Sopenharmony_ci 3678c2ecf20Sopenharmony_ci reg = ret; 3688c2ecf20Sopenharmony_ci 3698c2ecf20Sopenharmony_ci switch (time) { 3708c2ecf20Sopenharmony_ci case OPT3001_INT_TIME_SHORT: 3718c2ecf20Sopenharmony_ci reg &= ~OPT3001_CONFIGURATION_CT; 3728c2ecf20Sopenharmony_ci opt->int_time = OPT3001_INT_TIME_SHORT; 3738c2ecf20Sopenharmony_ci break; 3748c2ecf20Sopenharmony_ci case OPT3001_INT_TIME_LONG: 3758c2ecf20Sopenharmony_ci reg |= OPT3001_CONFIGURATION_CT; 3768c2ecf20Sopenharmony_ci opt->int_time = OPT3001_INT_TIME_LONG; 3778c2ecf20Sopenharmony_ci break; 3788c2ecf20Sopenharmony_ci default: 3798c2ecf20Sopenharmony_ci return -EINVAL; 3808c2ecf20Sopenharmony_ci } 3818c2ecf20Sopenharmony_ci 3828c2ecf20Sopenharmony_ci return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 3838c2ecf20Sopenharmony_ci reg); 3848c2ecf20Sopenharmony_ci} 3858c2ecf20Sopenharmony_ci 3868c2ecf20Sopenharmony_cistatic int opt3001_read_raw(struct iio_dev *iio, 3878c2ecf20Sopenharmony_ci struct iio_chan_spec const *chan, int *val, int *val2, 3888c2ecf20Sopenharmony_ci long mask) 3898c2ecf20Sopenharmony_ci{ 3908c2ecf20Sopenharmony_ci struct opt3001 *opt = iio_priv(iio); 3918c2ecf20Sopenharmony_ci int ret; 3928c2ecf20Sopenharmony_ci 3938c2ecf20Sopenharmony_ci if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 3948c2ecf20Sopenharmony_ci return -EBUSY; 3958c2ecf20Sopenharmony_ci 3968c2ecf20Sopenharmony_ci if (chan->type != IIO_LIGHT) 3978c2ecf20Sopenharmony_ci return -EINVAL; 3988c2ecf20Sopenharmony_ci 3998c2ecf20Sopenharmony_ci mutex_lock(&opt->lock); 4008c2ecf20Sopenharmony_ci 4018c2ecf20Sopenharmony_ci switch (mask) { 4028c2ecf20Sopenharmony_ci case IIO_CHAN_INFO_PROCESSED: 4038c2ecf20Sopenharmony_ci ret = opt3001_get_lux(opt, val, val2); 4048c2ecf20Sopenharmony_ci break; 4058c2ecf20Sopenharmony_ci case IIO_CHAN_INFO_INT_TIME: 4068c2ecf20Sopenharmony_ci ret = opt3001_get_int_time(opt, val, val2); 4078c2ecf20Sopenharmony_ci break; 4088c2ecf20Sopenharmony_ci default: 4098c2ecf20Sopenharmony_ci ret = -EINVAL; 4108c2ecf20Sopenharmony_ci } 4118c2ecf20Sopenharmony_ci 4128c2ecf20Sopenharmony_ci mutex_unlock(&opt->lock); 4138c2ecf20Sopenharmony_ci 4148c2ecf20Sopenharmony_ci return ret; 4158c2ecf20Sopenharmony_ci} 4168c2ecf20Sopenharmony_ci 4178c2ecf20Sopenharmony_cistatic int opt3001_write_raw(struct iio_dev *iio, 4188c2ecf20Sopenharmony_ci struct iio_chan_spec const *chan, int val, int val2, 4198c2ecf20Sopenharmony_ci long mask) 4208c2ecf20Sopenharmony_ci{ 4218c2ecf20Sopenharmony_ci struct opt3001 *opt = iio_priv(iio); 4228c2ecf20Sopenharmony_ci int ret; 4238c2ecf20Sopenharmony_ci 4248c2ecf20Sopenharmony_ci if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 4258c2ecf20Sopenharmony_ci return -EBUSY; 4268c2ecf20Sopenharmony_ci 4278c2ecf20Sopenharmony_ci if (chan->type != IIO_LIGHT) 4288c2ecf20Sopenharmony_ci return -EINVAL; 4298c2ecf20Sopenharmony_ci 4308c2ecf20Sopenharmony_ci if (mask != IIO_CHAN_INFO_INT_TIME) 4318c2ecf20Sopenharmony_ci return -EINVAL; 4328c2ecf20Sopenharmony_ci 4338c2ecf20Sopenharmony_ci if (val != 0) 4348c2ecf20Sopenharmony_ci return -EINVAL; 4358c2ecf20Sopenharmony_ci 4368c2ecf20Sopenharmony_ci mutex_lock(&opt->lock); 4378c2ecf20Sopenharmony_ci ret = opt3001_set_int_time(opt, val2); 4388c2ecf20Sopenharmony_ci mutex_unlock(&opt->lock); 4398c2ecf20Sopenharmony_ci 4408c2ecf20Sopenharmony_ci return ret; 4418c2ecf20Sopenharmony_ci} 4428c2ecf20Sopenharmony_ci 4438c2ecf20Sopenharmony_cistatic int opt3001_read_event_value(struct iio_dev *iio, 4448c2ecf20Sopenharmony_ci const struct iio_chan_spec *chan, enum iio_event_type type, 4458c2ecf20Sopenharmony_ci enum iio_event_direction dir, enum iio_event_info info, 4468c2ecf20Sopenharmony_ci int *val, int *val2) 4478c2ecf20Sopenharmony_ci{ 4488c2ecf20Sopenharmony_ci struct opt3001 *opt = iio_priv(iio); 4498c2ecf20Sopenharmony_ci int ret = IIO_VAL_INT_PLUS_MICRO; 4508c2ecf20Sopenharmony_ci 4518c2ecf20Sopenharmony_ci mutex_lock(&opt->lock); 4528c2ecf20Sopenharmony_ci 4538c2ecf20Sopenharmony_ci switch (dir) { 4548c2ecf20Sopenharmony_ci case IIO_EV_DIR_RISING: 4558c2ecf20Sopenharmony_ci opt3001_to_iio_ret(opt, opt->high_thresh_exp, 4568c2ecf20Sopenharmony_ci opt->high_thresh_mantissa, val, val2); 4578c2ecf20Sopenharmony_ci break; 4588c2ecf20Sopenharmony_ci case IIO_EV_DIR_FALLING: 4598c2ecf20Sopenharmony_ci opt3001_to_iio_ret(opt, opt->low_thresh_exp, 4608c2ecf20Sopenharmony_ci opt->low_thresh_mantissa, val, val2); 4618c2ecf20Sopenharmony_ci break; 4628c2ecf20Sopenharmony_ci default: 4638c2ecf20Sopenharmony_ci ret = -EINVAL; 4648c2ecf20Sopenharmony_ci } 4658c2ecf20Sopenharmony_ci 4668c2ecf20Sopenharmony_ci mutex_unlock(&opt->lock); 4678c2ecf20Sopenharmony_ci 4688c2ecf20Sopenharmony_ci return ret; 4698c2ecf20Sopenharmony_ci} 4708c2ecf20Sopenharmony_ci 4718c2ecf20Sopenharmony_cistatic int opt3001_write_event_value(struct iio_dev *iio, 4728c2ecf20Sopenharmony_ci const struct iio_chan_spec *chan, enum iio_event_type type, 4738c2ecf20Sopenharmony_ci enum iio_event_direction dir, enum iio_event_info info, 4748c2ecf20Sopenharmony_ci int val, int val2) 4758c2ecf20Sopenharmony_ci{ 4768c2ecf20Sopenharmony_ci struct opt3001 *opt = iio_priv(iio); 4778c2ecf20Sopenharmony_ci int ret; 4788c2ecf20Sopenharmony_ci 4798c2ecf20Sopenharmony_ci u16 mantissa; 4808c2ecf20Sopenharmony_ci u16 value; 4818c2ecf20Sopenharmony_ci u16 reg; 4828c2ecf20Sopenharmony_ci 4838c2ecf20Sopenharmony_ci u8 exponent; 4848c2ecf20Sopenharmony_ci 4858c2ecf20Sopenharmony_ci if (val < 0) 4868c2ecf20Sopenharmony_ci return -EINVAL; 4878c2ecf20Sopenharmony_ci 4888c2ecf20Sopenharmony_ci mutex_lock(&opt->lock); 4898c2ecf20Sopenharmony_ci 4908c2ecf20Sopenharmony_ci ret = opt3001_find_scale(opt, val, val2, &exponent); 4918c2ecf20Sopenharmony_ci if (ret < 0) { 4928c2ecf20Sopenharmony_ci dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2); 4938c2ecf20Sopenharmony_ci goto err; 4948c2ecf20Sopenharmony_ci } 4958c2ecf20Sopenharmony_ci 4968c2ecf20Sopenharmony_ci mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent; 4978c2ecf20Sopenharmony_ci value = (exponent << 12) | mantissa; 4988c2ecf20Sopenharmony_ci 4998c2ecf20Sopenharmony_ci switch (dir) { 5008c2ecf20Sopenharmony_ci case IIO_EV_DIR_RISING: 5018c2ecf20Sopenharmony_ci reg = OPT3001_HIGH_LIMIT; 5028c2ecf20Sopenharmony_ci opt->high_thresh_mantissa = mantissa; 5038c2ecf20Sopenharmony_ci opt->high_thresh_exp = exponent; 5048c2ecf20Sopenharmony_ci break; 5058c2ecf20Sopenharmony_ci case IIO_EV_DIR_FALLING: 5068c2ecf20Sopenharmony_ci reg = OPT3001_LOW_LIMIT; 5078c2ecf20Sopenharmony_ci opt->low_thresh_mantissa = mantissa; 5088c2ecf20Sopenharmony_ci opt->low_thresh_exp = exponent; 5098c2ecf20Sopenharmony_ci break; 5108c2ecf20Sopenharmony_ci default: 5118c2ecf20Sopenharmony_ci ret = -EINVAL; 5128c2ecf20Sopenharmony_ci goto err; 5138c2ecf20Sopenharmony_ci } 5148c2ecf20Sopenharmony_ci 5158c2ecf20Sopenharmony_ci ret = i2c_smbus_write_word_swapped(opt->client, reg, value); 5168c2ecf20Sopenharmony_ci if (ret < 0) { 5178c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to write register %02x\n", reg); 5188c2ecf20Sopenharmony_ci goto err; 5198c2ecf20Sopenharmony_ci } 5208c2ecf20Sopenharmony_ci 5218c2ecf20Sopenharmony_cierr: 5228c2ecf20Sopenharmony_ci mutex_unlock(&opt->lock); 5238c2ecf20Sopenharmony_ci 5248c2ecf20Sopenharmony_ci return ret; 5258c2ecf20Sopenharmony_ci} 5268c2ecf20Sopenharmony_ci 5278c2ecf20Sopenharmony_cistatic int opt3001_read_event_config(struct iio_dev *iio, 5288c2ecf20Sopenharmony_ci const struct iio_chan_spec *chan, enum iio_event_type type, 5298c2ecf20Sopenharmony_ci enum iio_event_direction dir) 5308c2ecf20Sopenharmony_ci{ 5318c2ecf20Sopenharmony_ci struct opt3001 *opt = iio_priv(iio); 5328c2ecf20Sopenharmony_ci 5338c2ecf20Sopenharmony_ci return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS; 5348c2ecf20Sopenharmony_ci} 5358c2ecf20Sopenharmony_ci 5368c2ecf20Sopenharmony_cistatic int opt3001_write_event_config(struct iio_dev *iio, 5378c2ecf20Sopenharmony_ci const struct iio_chan_spec *chan, enum iio_event_type type, 5388c2ecf20Sopenharmony_ci enum iio_event_direction dir, int state) 5398c2ecf20Sopenharmony_ci{ 5408c2ecf20Sopenharmony_ci struct opt3001 *opt = iio_priv(iio); 5418c2ecf20Sopenharmony_ci int ret; 5428c2ecf20Sopenharmony_ci u16 mode; 5438c2ecf20Sopenharmony_ci u16 reg; 5448c2ecf20Sopenharmony_ci 5458c2ecf20Sopenharmony_ci if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS) 5468c2ecf20Sopenharmony_ci return 0; 5478c2ecf20Sopenharmony_ci 5488c2ecf20Sopenharmony_ci if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN) 5498c2ecf20Sopenharmony_ci return 0; 5508c2ecf20Sopenharmony_ci 5518c2ecf20Sopenharmony_ci mutex_lock(&opt->lock); 5528c2ecf20Sopenharmony_ci 5538c2ecf20Sopenharmony_ci mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS 5548c2ecf20Sopenharmony_ci : OPT3001_CONFIGURATION_M_SHUTDOWN; 5558c2ecf20Sopenharmony_ci 5568c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 5578c2ecf20Sopenharmony_ci if (ret < 0) { 5588c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 5598c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 5608c2ecf20Sopenharmony_ci goto err; 5618c2ecf20Sopenharmony_ci } 5628c2ecf20Sopenharmony_ci 5638c2ecf20Sopenharmony_ci reg = ret; 5648c2ecf20Sopenharmony_ci opt3001_set_mode(opt, ®, mode); 5658c2ecf20Sopenharmony_ci 5668c2ecf20Sopenharmony_ci ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 5678c2ecf20Sopenharmony_ci reg); 5688c2ecf20Sopenharmony_ci if (ret < 0) { 5698c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to write register %02x\n", 5708c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 5718c2ecf20Sopenharmony_ci goto err; 5728c2ecf20Sopenharmony_ci } 5738c2ecf20Sopenharmony_ci 5748c2ecf20Sopenharmony_cierr: 5758c2ecf20Sopenharmony_ci mutex_unlock(&opt->lock); 5768c2ecf20Sopenharmony_ci 5778c2ecf20Sopenharmony_ci return ret; 5788c2ecf20Sopenharmony_ci} 5798c2ecf20Sopenharmony_ci 5808c2ecf20Sopenharmony_cistatic const struct iio_info opt3001_info = { 5818c2ecf20Sopenharmony_ci .attrs = &opt3001_attribute_group, 5828c2ecf20Sopenharmony_ci .read_raw = opt3001_read_raw, 5838c2ecf20Sopenharmony_ci .write_raw = opt3001_write_raw, 5848c2ecf20Sopenharmony_ci .read_event_value = opt3001_read_event_value, 5858c2ecf20Sopenharmony_ci .write_event_value = opt3001_write_event_value, 5868c2ecf20Sopenharmony_ci .read_event_config = opt3001_read_event_config, 5878c2ecf20Sopenharmony_ci .write_event_config = opt3001_write_event_config, 5888c2ecf20Sopenharmony_ci}; 5898c2ecf20Sopenharmony_ci 5908c2ecf20Sopenharmony_cistatic int opt3001_read_id(struct opt3001 *opt) 5918c2ecf20Sopenharmony_ci{ 5928c2ecf20Sopenharmony_ci char manufacturer[2]; 5938c2ecf20Sopenharmony_ci u16 device_id; 5948c2ecf20Sopenharmony_ci int ret; 5958c2ecf20Sopenharmony_ci 5968c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID); 5978c2ecf20Sopenharmony_ci if (ret < 0) { 5988c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 5998c2ecf20Sopenharmony_ci OPT3001_MANUFACTURER_ID); 6008c2ecf20Sopenharmony_ci return ret; 6018c2ecf20Sopenharmony_ci } 6028c2ecf20Sopenharmony_ci 6038c2ecf20Sopenharmony_ci manufacturer[0] = ret >> 8; 6048c2ecf20Sopenharmony_ci manufacturer[1] = ret & 0xff; 6058c2ecf20Sopenharmony_ci 6068c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID); 6078c2ecf20Sopenharmony_ci if (ret < 0) { 6088c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 6098c2ecf20Sopenharmony_ci OPT3001_DEVICE_ID); 6108c2ecf20Sopenharmony_ci return ret; 6118c2ecf20Sopenharmony_ci } 6128c2ecf20Sopenharmony_ci 6138c2ecf20Sopenharmony_ci device_id = ret; 6148c2ecf20Sopenharmony_ci 6158c2ecf20Sopenharmony_ci dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0], 6168c2ecf20Sopenharmony_ci manufacturer[1], device_id); 6178c2ecf20Sopenharmony_ci 6188c2ecf20Sopenharmony_ci return 0; 6198c2ecf20Sopenharmony_ci} 6208c2ecf20Sopenharmony_ci 6218c2ecf20Sopenharmony_cistatic int opt3001_configure(struct opt3001 *opt) 6228c2ecf20Sopenharmony_ci{ 6238c2ecf20Sopenharmony_ci int ret; 6248c2ecf20Sopenharmony_ci u16 reg; 6258c2ecf20Sopenharmony_ci 6268c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 6278c2ecf20Sopenharmony_ci if (ret < 0) { 6288c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 6298c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 6308c2ecf20Sopenharmony_ci return ret; 6318c2ecf20Sopenharmony_ci } 6328c2ecf20Sopenharmony_ci 6338c2ecf20Sopenharmony_ci reg = ret; 6348c2ecf20Sopenharmony_ci 6358c2ecf20Sopenharmony_ci /* Enable automatic full-scale setting mode */ 6368c2ecf20Sopenharmony_ci reg &= ~OPT3001_CONFIGURATION_RN_MASK; 6378c2ecf20Sopenharmony_ci reg |= OPT3001_CONFIGURATION_RN_AUTO; 6388c2ecf20Sopenharmony_ci 6398c2ecf20Sopenharmony_ci /* Reflect status of the device's integration time setting */ 6408c2ecf20Sopenharmony_ci if (reg & OPT3001_CONFIGURATION_CT) 6418c2ecf20Sopenharmony_ci opt->int_time = OPT3001_INT_TIME_LONG; 6428c2ecf20Sopenharmony_ci else 6438c2ecf20Sopenharmony_ci opt->int_time = OPT3001_INT_TIME_SHORT; 6448c2ecf20Sopenharmony_ci 6458c2ecf20Sopenharmony_ci /* Ensure device is in shutdown initially */ 6468c2ecf20Sopenharmony_ci opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 6478c2ecf20Sopenharmony_ci 6488c2ecf20Sopenharmony_ci /* Configure for latched window-style comparison operation */ 6498c2ecf20Sopenharmony_ci reg |= OPT3001_CONFIGURATION_L; 6508c2ecf20Sopenharmony_ci reg &= ~OPT3001_CONFIGURATION_POL; 6518c2ecf20Sopenharmony_ci reg &= ~OPT3001_CONFIGURATION_ME; 6528c2ecf20Sopenharmony_ci reg &= ~OPT3001_CONFIGURATION_FC_MASK; 6538c2ecf20Sopenharmony_ci 6548c2ecf20Sopenharmony_ci ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 6558c2ecf20Sopenharmony_ci reg); 6568c2ecf20Sopenharmony_ci if (ret < 0) { 6578c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to write register %02x\n", 6588c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 6598c2ecf20Sopenharmony_ci return ret; 6608c2ecf20Sopenharmony_ci } 6618c2ecf20Sopenharmony_ci 6628c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT); 6638c2ecf20Sopenharmony_ci if (ret < 0) { 6648c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 6658c2ecf20Sopenharmony_ci OPT3001_LOW_LIMIT); 6668c2ecf20Sopenharmony_ci return ret; 6678c2ecf20Sopenharmony_ci } 6688c2ecf20Sopenharmony_ci 6698c2ecf20Sopenharmony_ci opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 6708c2ecf20Sopenharmony_ci opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret); 6718c2ecf20Sopenharmony_ci 6728c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT); 6738c2ecf20Sopenharmony_ci if (ret < 0) { 6748c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 6758c2ecf20Sopenharmony_ci OPT3001_HIGH_LIMIT); 6768c2ecf20Sopenharmony_ci return ret; 6778c2ecf20Sopenharmony_ci } 6788c2ecf20Sopenharmony_ci 6798c2ecf20Sopenharmony_ci opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret); 6808c2ecf20Sopenharmony_ci opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret); 6818c2ecf20Sopenharmony_ci 6828c2ecf20Sopenharmony_ci return 0; 6838c2ecf20Sopenharmony_ci} 6848c2ecf20Sopenharmony_ci 6858c2ecf20Sopenharmony_cistatic irqreturn_t opt3001_irq(int irq, void *_iio) 6868c2ecf20Sopenharmony_ci{ 6878c2ecf20Sopenharmony_ci struct iio_dev *iio = _iio; 6888c2ecf20Sopenharmony_ci struct opt3001 *opt = iio_priv(iio); 6898c2ecf20Sopenharmony_ci int ret; 6908c2ecf20Sopenharmony_ci bool wake_result_ready_queue = false; 6918c2ecf20Sopenharmony_ci 6928c2ecf20Sopenharmony_ci if (!opt->ok_to_ignore_lock) 6938c2ecf20Sopenharmony_ci mutex_lock(&opt->lock); 6948c2ecf20Sopenharmony_ci 6958c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 6968c2ecf20Sopenharmony_ci if (ret < 0) { 6978c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 6988c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 6998c2ecf20Sopenharmony_ci goto out; 7008c2ecf20Sopenharmony_ci } 7018c2ecf20Sopenharmony_ci 7028c2ecf20Sopenharmony_ci if ((ret & OPT3001_CONFIGURATION_M_MASK) == 7038c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION_M_CONTINUOUS) { 7048c2ecf20Sopenharmony_ci if (ret & OPT3001_CONFIGURATION_FH) 7058c2ecf20Sopenharmony_ci iio_push_event(iio, 7068c2ecf20Sopenharmony_ci IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, 7078c2ecf20Sopenharmony_ci IIO_EV_TYPE_THRESH, 7088c2ecf20Sopenharmony_ci IIO_EV_DIR_RISING), 7098c2ecf20Sopenharmony_ci iio_get_time_ns(iio)); 7108c2ecf20Sopenharmony_ci if (ret & OPT3001_CONFIGURATION_FL) 7118c2ecf20Sopenharmony_ci iio_push_event(iio, 7128c2ecf20Sopenharmony_ci IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0, 7138c2ecf20Sopenharmony_ci IIO_EV_TYPE_THRESH, 7148c2ecf20Sopenharmony_ci IIO_EV_DIR_FALLING), 7158c2ecf20Sopenharmony_ci iio_get_time_ns(iio)); 7168c2ecf20Sopenharmony_ci } else if (ret & OPT3001_CONFIGURATION_CRF) { 7178c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT); 7188c2ecf20Sopenharmony_ci if (ret < 0) { 7198c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 7208c2ecf20Sopenharmony_ci OPT3001_RESULT); 7218c2ecf20Sopenharmony_ci goto out; 7228c2ecf20Sopenharmony_ci } 7238c2ecf20Sopenharmony_ci opt->result = ret; 7248c2ecf20Sopenharmony_ci opt->result_ready = true; 7258c2ecf20Sopenharmony_ci wake_result_ready_queue = true; 7268c2ecf20Sopenharmony_ci } 7278c2ecf20Sopenharmony_ci 7288c2ecf20Sopenharmony_ciout: 7298c2ecf20Sopenharmony_ci if (!opt->ok_to_ignore_lock) 7308c2ecf20Sopenharmony_ci mutex_unlock(&opt->lock); 7318c2ecf20Sopenharmony_ci 7328c2ecf20Sopenharmony_ci if (wake_result_ready_queue) 7338c2ecf20Sopenharmony_ci wake_up(&opt->result_ready_queue); 7348c2ecf20Sopenharmony_ci 7358c2ecf20Sopenharmony_ci return IRQ_HANDLED; 7368c2ecf20Sopenharmony_ci} 7378c2ecf20Sopenharmony_ci 7388c2ecf20Sopenharmony_cistatic int opt3001_probe(struct i2c_client *client, 7398c2ecf20Sopenharmony_ci const struct i2c_device_id *id) 7408c2ecf20Sopenharmony_ci{ 7418c2ecf20Sopenharmony_ci struct device *dev = &client->dev; 7428c2ecf20Sopenharmony_ci 7438c2ecf20Sopenharmony_ci struct iio_dev *iio; 7448c2ecf20Sopenharmony_ci struct opt3001 *opt; 7458c2ecf20Sopenharmony_ci int irq = client->irq; 7468c2ecf20Sopenharmony_ci int ret; 7478c2ecf20Sopenharmony_ci 7488c2ecf20Sopenharmony_ci iio = devm_iio_device_alloc(dev, sizeof(*opt)); 7498c2ecf20Sopenharmony_ci if (!iio) 7508c2ecf20Sopenharmony_ci return -ENOMEM; 7518c2ecf20Sopenharmony_ci 7528c2ecf20Sopenharmony_ci opt = iio_priv(iio); 7538c2ecf20Sopenharmony_ci opt->client = client; 7548c2ecf20Sopenharmony_ci opt->dev = dev; 7558c2ecf20Sopenharmony_ci 7568c2ecf20Sopenharmony_ci mutex_init(&opt->lock); 7578c2ecf20Sopenharmony_ci init_waitqueue_head(&opt->result_ready_queue); 7588c2ecf20Sopenharmony_ci i2c_set_clientdata(client, iio); 7598c2ecf20Sopenharmony_ci 7608c2ecf20Sopenharmony_ci ret = opt3001_read_id(opt); 7618c2ecf20Sopenharmony_ci if (ret) 7628c2ecf20Sopenharmony_ci return ret; 7638c2ecf20Sopenharmony_ci 7648c2ecf20Sopenharmony_ci ret = opt3001_configure(opt); 7658c2ecf20Sopenharmony_ci if (ret) 7668c2ecf20Sopenharmony_ci return ret; 7678c2ecf20Sopenharmony_ci 7688c2ecf20Sopenharmony_ci iio->name = client->name; 7698c2ecf20Sopenharmony_ci iio->channels = opt3001_channels; 7708c2ecf20Sopenharmony_ci iio->num_channels = ARRAY_SIZE(opt3001_channels); 7718c2ecf20Sopenharmony_ci iio->modes = INDIO_DIRECT_MODE; 7728c2ecf20Sopenharmony_ci iio->info = &opt3001_info; 7738c2ecf20Sopenharmony_ci 7748c2ecf20Sopenharmony_ci ret = devm_iio_device_register(dev, iio); 7758c2ecf20Sopenharmony_ci if (ret) { 7768c2ecf20Sopenharmony_ci dev_err(dev, "failed to register IIO device\n"); 7778c2ecf20Sopenharmony_ci return ret; 7788c2ecf20Sopenharmony_ci } 7798c2ecf20Sopenharmony_ci 7808c2ecf20Sopenharmony_ci /* Make use of INT pin only if valid IRQ no. is given */ 7818c2ecf20Sopenharmony_ci if (irq > 0) { 7828c2ecf20Sopenharmony_ci ret = request_threaded_irq(irq, NULL, opt3001_irq, 7838c2ecf20Sopenharmony_ci IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 7848c2ecf20Sopenharmony_ci "opt3001", iio); 7858c2ecf20Sopenharmony_ci if (ret) { 7868c2ecf20Sopenharmony_ci dev_err(dev, "failed to request IRQ #%d\n", irq); 7878c2ecf20Sopenharmony_ci return ret; 7888c2ecf20Sopenharmony_ci } 7898c2ecf20Sopenharmony_ci opt->use_irq = true; 7908c2ecf20Sopenharmony_ci } else { 7918c2ecf20Sopenharmony_ci dev_dbg(opt->dev, "enabling interrupt-less operation\n"); 7928c2ecf20Sopenharmony_ci } 7938c2ecf20Sopenharmony_ci 7948c2ecf20Sopenharmony_ci return 0; 7958c2ecf20Sopenharmony_ci} 7968c2ecf20Sopenharmony_ci 7978c2ecf20Sopenharmony_cistatic int opt3001_remove(struct i2c_client *client) 7988c2ecf20Sopenharmony_ci{ 7998c2ecf20Sopenharmony_ci struct iio_dev *iio = i2c_get_clientdata(client); 8008c2ecf20Sopenharmony_ci struct opt3001 *opt = iio_priv(iio); 8018c2ecf20Sopenharmony_ci int ret; 8028c2ecf20Sopenharmony_ci u16 reg; 8038c2ecf20Sopenharmony_ci 8048c2ecf20Sopenharmony_ci if (opt->use_irq) 8058c2ecf20Sopenharmony_ci free_irq(client->irq, iio); 8068c2ecf20Sopenharmony_ci 8078c2ecf20Sopenharmony_ci ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION); 8088c2ecf20Sopenharmony_ci if (ret < 0) { 8098c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to read register %02x\n", 8108c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 8118c2ecf20Sopenharmony_ci return ret; 8128c2ecf20Sopenharmony_ci } 8138c2ecf20Sopenharmony_ci 8148c2ecf20Sopenharmony_ci reg = ret; 8158c2ecf20Sopenharmony_ci opt3001_set_mode(opt, ®, OPT3001_CONFIGURATION_M_SHUTDOWN); 8168c2ecf20Sopenharmony_ci 8178c2ecf20Sopenharmony_ci ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION, 8188c2ecf20Sopenharmony_ci reg); 8198c2ecf20Sopenharmony_ci if (ret < 0) { 8208c2ecf20Sopenharmony_ci dev_err(opt->dev, "failed to write register %02x\n", 8218c2ecf20Sopenharmony_ci OPT3001_CONFIGURATION); 8228c2ecf20Sopenharmony_ci return ret; 8238c2ecf20Sopenharmony_ci } 8248c2ecf20Sopenharmony_ci 8258c2ecf20Sopenharmony_ci return 0; 8268c2ecf20Sopenharmony_ci} 8278c2ecf20Sopenharmony_ci 8288c2ecf20Sopenharmony_cistatic const struct i2c_device_id opt3001_id[] = { 8298c2ecf20Sopenharmony_ci { "opt3001", 0 }, 8308c2ecf20Sopenharmony_ci { } /* Terminating Entry */ 8318c2ecf20Sopenharmony_ci}; 8328c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(i2c, opt3001_id); 8338c2ecf20Sopenharmony_ci 8348c2ecf20Sopenharmony_cistatic const struct of_device_id opt3001_of_match[] = { 8358c2ecf20Sopenharmony_ci { .compatible = "ti,opt3001" }, 8368c2ecf20Sopenharmony_ci { } 8378c2ecf20Sopenharmony_ci}; 8388c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, opt3001_of_match); 8398c2ecf20Sopenharmony_ci 8408c2ecf20Sopenharmony_cistatic struct i2c_driver opt3001_driver = { 8418c2ecf20Sopenharmony_ci .probe = opt3001_probe, 8428c2ecf20Sopenharmony_ci .remove = opt3001_remove, 8438c2ecf20Sopenharmony_ci .id_table = opt3001_id, 8448c2ecf20Sopenharmony_ci 8458c2ecf20Sopenharmony_ci .driver = { 8468c2ecf20Sopenharmony_ci .name = "opt3001", 8478c2ecf20Sopenharmony_ci .of_match_table = opt3001_of_match, 8488c2ecf20Sopenharmony_ci }, 8498c2ecf20Sopenharmony_ci}; 8508c2ecf20Sopenharmony_ci 8518c2ecf20Sopenharmony_cimodule_i2c_driver(opt3001_driver); 8528c2ecf20Sopenharmony_ci 8538c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2"); 8548c2ecf20Sopenharmony_ciMODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>"); 8558c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver"); 856