1// SPDX-License-Identifier: GPL-2.0 2/* 3 * ADIS16475 IMU driver 4 * 5 * Copyright 2019 Analog Devices Inc. 6 */ 7#include <linux/bitfield.h> 8#include <linux/bitops.h> 9#include <linux/clk.h> 10#include <linux/debugfs.h> 11#include <linux/delay.h> 12#include <linux/device.h> 13#include <linux/kernel.h> 14#include <linux/iio/buffer.h> 15#include <linux/iio/iio.h> 16#include <linux/iio/imu/adis.h> 17#include <linux/iio/sysfs.h> 18#include <linux/iio/trigger_consumer.h> 19#include <linux/irq.h> 20#include <linux/module.h> 21#include <linux/mod_devicetable.h> 22#include <linux/property.h> 23#include <linux/spi/spi.h> 24 25#define ADIS16475_REG_DIAG_STAT 0x02 26#define ADIS16475_REG_X_GYRO_L 0x04 27#define ADIS16475_REG_Y_GYRO_L 0x08 28#define ADIS16475_REG_Z_GYRO_L 0x0C 29#define ADIS16475_REG_X_ACCEL_L 0x10 30#define ADIS16475_REG_Y_ACCEL_L 0x14 31#define ADIS16475_REG_Z_ACCEL_L 0x18 32#define ADIS16475_REG_TEMP_OUT 0x1c 33#define ADIS16475_REG_X_GYRO_BIAS_L 0x40 34#define ADIS16475_REG_Y_GYRO_BIAS_L 0x44 35#define ADIS16475_REG_Z_GYRO_BIAS_L 0x48 36#define ADIS16475_REG_X_ACCEL_BIAS_L 0x4c 37#define ADIS16475_REG_Y_ACCEL_BIAS_L 0x50 38#define ADIS16475_REG_Z_ACCEL_BIAS_L 0x54 39#define ADIS16475_REG_FILT_CTRL 0x5c 40#define ADIS16475_FILT_CTRL_MASK GENMASK(2, 0) 41#define ADIS16475_FILT_CTRL(x) FIELD_PREP(ADIS16475_FILT_CTRL_MASK, x) 42#define ADIS16475_REG_MSG_CTRL 0x60 43#define ADIS16475_MSG_CTRL_DR_POL_MASK BIT(0) 44#define ADIS16475_MSG_CTRL_DR_POL(x) \ 45 FIELD_PREP(ADIS16475_MSG_CTRL_DR_POL_MASK, x) 46#define ADIS16475_SYNC_MODE_MASK GENMASK(4, 2) 47#define ADIS16475_SYNC_MODE(x) FIELD_PREP(ADIS16475_SYNC_MODE_MASK, x) 48#define ADIS16475_REG_UP_SCALE 0x62 49#define ADIS16475_REG_DEC_RATE 0x64 50#define ADIS16475_REG_GLOB_CMD 0x68 51#define ADIS16475_REG_FIRM_REV 0x6c 52#define ADIS16475_REG_FIRM_DM 0x6e 53#define ADIS16475_REG_FIRM_Y 0x70 54#define ADIS16475_REG_PROD_ID 0x72 55#define ADIS16475_REG_SERIAL_NUM 0x74 56#define ADIS16475_REG_FLASH_CNT 0x7c 57#define ADIS16500_BURST32_MASK BIT(9) 58#define ADIS16500_BURST32(x) FIELD_PREP(ADIS16500_BURST32_MASK, x) 59/* number of data elements in burst mode */ 60#define ADIS16475_BURST32_MAX_DATA 32 61#define ADIS16475_BURST_MAX_DATA 20 62#define ADIS16475_MAX_SCAN_DATA 20 63/* spi max speed in brust mode */ 64#define ADIS16475_BURST_MAX_SPEED 1000000 65#define ADIS16475_LSB_DEC_MASK BIT(0) 66#define ADIS16475_LSB_FIR_MASK BIT(1) 67 68enum { 69 ADIS16475_SYNC_DIRECT = 1, 70 ADIS16475_SYNC_SCALED, 71 ADIS16475_SYNC_OUTPUT, 72 ADIS16475_SYNC_PULSE = 5, 73}; 74 75struct adis16475_sync { 76 u16 sync_mode; 77 u16 min_rate; 78 u16 max_rate; 79}; 80 81struct adis16475_chip_info { 82 const struct iio_chan_spec *channels; 83 const struct adis16475_sync *sync; 84 const struct adis_data adis_data; 85 const char *name; 86 u32 num_channels; 87 u32 gyro_max_val; 88 u32 gyro_max_scale; 89 u32 accel_max_val; 90 u32 accel_max_scale; 91 u32 temp_scale; 92 u32 int_clk; 93 u16 max_dec; 94 u8 num_sync; 95 bool has_burst32; 96}; 97 98struct adis16475 { 99 const struct adis16475_chip_info *info; 100 struct adis adis; 101 u32 clk_freq; 102 bool burst32; 103 unsigned long lsb_flag; 104 /* Alignment needed for the timestamp */ 105 __be16 data[ADIS16475_MAX_SCAN_DATA] __aligned(8); 106}; 107 108enum { 109 ADIS16475_SCAN_GYRO_X, 110 ADIS16475_SCAN_GYRO_Y, 111 ADIS16475_SCAN_GYRO_Z, 112 ADIS16475_SCAN_ACCEL_X, 113 ADIS16475_SCAN_ACCEL_Y, 114 ADIS16475_SCAN_ACCEL_Z, 115 ADIS16475_SCAN_TEMP, 116 ADIS16475_SCAN_DIAG_S_FLAGS, 117 ADIS16475_SCAN_CRC_FAILURE, 118}; 119 120#ifdef CONFIG_DEBUG_FS 121static ssize_t adis16475_show_firmware_revision(struct file *file, 122 char __user *userbuf, 123 size_t count, loff_t *ppos) 124{ 125 struct adis16475 *st = file->private_data; 126 char buf[7]; 127 size_t len; 128 u16 rev; 129 int ret; 130 131 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_REV, &rev); 132 if (ret) 133 return ret; 134 135 len = scnprintf(buf, sizeof(buf), "%x.%x\n", rev >> 8, rev & 0xff); 136 137 return simple_read_from_buffer(userbuf, count, ppos, buf, len); 138} 139 140static const struct file_operations adis16475_firmware_revision_fops = { 141 .open = simple_open, 142 .read = adis16475_show_firmware_revision, 143 .llseek = default_llseek, 144 .owner = THIS_MODULE, 145}; 146 147static ssize_t adis16475_show_firmware_date(struct file *file, 148 char __user *userbuf, 149 size_t count, loff_t *ppos) 150{ 151 struct adis16475 *st = file->private_data; 152 u16 md, year; 153 char buf[12]; 154 size_t len; 155 int ret; 156 157 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_Y, &year); 158 if (ret) 159 return ret; 160 161 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FIRM_DM, &md); 162 if (ret) 163 return ret; 164 165 len = snprintf(buf, sizeof(buf), "%.2x-%.2x-%.4x\n", md >> 8, md & 0xff, 166 year); 167 168 return simple_read_from_buffer(userbuf, count, ppos, buf, len); 169} 170 171static const struct file_operations adis16475_firmware_date_fops = { 172 .open = simple_open, 173 .read = adis16475_show_firmware_date, 174 .llseek = default_llseek, 175 .owner = THIS_MODULE, 176}; 177 178static int adis16475_show_serial_number(void *arg, u64 *val) 179{ 180 struct adis16475 *st = arg; 181 u16 serial; 182 int ret; 183 184 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_SERIAL_NUM, &serial); 185 if (ret) 186 return ret; 187 188 *val = serial; 189 190 return 0; 191} 192DEFINE_DEBUGFS_ATTRIBUTE(adis16475_serial_number_fops, 193 adis16475_show_serial_number, NULL, "0x%.4llx\n"); 194 195static int adis16475_show_product_id(void *arg, u64 *val) 196{ 197 struct adis16475 *st = arg; 198 u16 prod_id; 199 int ret; 200 201 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_PROD_ID, &prod_id); 202 if (ret) 203 return ret; 204 205 *val = prod_id; 206 207 return 0; 208} 209DEFINE_DEBUGFS_ATTRIBUTE(adis16475_product_id_fops, 210 adis16475_show_product_id, NULL, "%llu\n"); 211 212static int adis16475_show_flash_count(void *arg, u64 *val) 213{ 214 struct adis16475 *st = arg; 215 u32 flash_count; 216 int ret; 217 218 ret = adis_read_reg_32(&st->adis, ADIS16475_REG_FLASH_CNT, 219 &flash_count); 220 if (ret) 221 return ret; 222 223 *val = flash_count; 224 225 return 0; 226} 227DEFINE_DEBUGFS_ATTRIBUTE(adis16475_flash_count_fops, 228 adis16475_show_flash_count, NULL, "%lld\n"); 229 230static void adis16475_debugfs_init(struct iio_dev *indio_dev) 231{ 232 struct adis16475 *st = iio_priv(indio_dev); 233 struct dentry *d = iio_get_debugfs_dentry(indio_dev); 234 235 debugfs_create_file_unsafe("serial_number", 0400, 236 d, st, &adis16475_serial_number_fops); 237 debugfs_create_file_unsafe("product_id", 0400, 238 d, st, &adis16475_product_id_fops); 239 debugfs_create_file_unsafe("flash_count", 0400, 240 d, st, &adis16475_flash_count_fops); 241 debugfs_create_file("firmware_revision", 0400, 242 d, st, &adis16475_firmware_revision_fops); 243 debugfs_create_file("firmware_date", 0400, d, 244 st, &adis16475_firmware_date_fops); 245} 246#else 247static void adis16475_debugfs_init(struct iio_dev *indio_dev) 248{ 249} 250#endif 251 252static int adis16475_get_freq(struct adis16475 *st, u32 *freq) 253{ 254 int ret; 255 u16 dec; 256 257 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_DEC_RATE, &dec); 258 if (ret) 259 return -EINVAL; 260 261 *freq = DIV_ROUND_CLOSEST(st->clk_freq, dec + 1); 262 263 return 0; 264} 265 266static int adis16475_set_freq(struct adis16475 *st, const u32 freq) 267{ 268 u16 dec; 269 int ret; 270 271 if (!freq) 272 return -EINVAL; 273 274 dec = DIV_ROUND_CLOSEST(st->clk_freq, freq); 275 276 if (dec) 277 dec--; 278 279 if (dec > st->info->max_dec) 280 dec = st->info->max_dec; 281 282 ret = adis_write_reg_16(&st->adis, ADIS16475_REG_DEC_RATE, dec); 283 if (ret) 284 return ret; 285 286 /* 287 * If decimation is used, then gyro and accel data will have meaningful 288 * bits on the LSB registers. This info is used on the trigger handler. 289 */ 290 assign_bit(ADIS16475_LSB_DEC_MASK, &st->lsb_flag, dec); 291 292 return 0; 293} 294 295/* The values are approximated. */ 296static const u32 adis16475_3db_freqs[] = { 297 [0] = 720, /* Filter disabled, full BW (~720Hz) */ 298 [1] = 360, 299 [2] = 164, 300 [3] = 80, 301 [4] = 40, 302 [5] = 20, 303 [6] = 10, 304}; 305 306static int adis16475_get_filter(struct adis16475 *st, u32 *filter) 307{ 308 u16 filter_sz; 309 int ret; 310 const int mask = ADIS16475_FILT_CTRL_MASK; 311 312 ret = adis_read_reg_16(&st->adis, ADIS16475_REG_FILT_CTRL, &filter_sz); 313 if (ret) 314 return ret; 315 316 *filter = adis16475_3db_freqs[filter_sz & mask]; 317 318 return 0; 319} 320 321static int adis16475_set_filter(struct adis16475 *st, const u32 filter) 322{ 323 int i = ARRAY_SIZE(adis16475_3db_freqs); 324 int ret; 325 326 while (--i) { 327 if (adis16475_3db_freqs[i] >= filter) 328 break; 329 } 330 331 ret = adis_write_reg_16(&st->adis, ADIS16475_REG_FILT_CTRL, 332 ADIS16475_FILT_CTRL(i)); 333 if (ret) 334 return ret; 335 336 /* 337 * If FIR is used, then gyro and accel data will have meaningful 338 * bits on the LSB registers. This info is used on the trigger handler. 339 */ 340 assign_bit(ADIS16475_LSB_FIR_MASK, &st->lsb_flag, i); 341 342 return 0; 343} 344 345static const u32 adis16475_calib_regs[] = { 346 [ADIS16475_SCAN_GYRO_X] = ADIS16475_REG_X_GYRO_BIAS_L, 347 [ADIS16475_SCAN_GYRO_Y] = ADIS16475_REG_Y_GYRO_BIAS_L, 348 [ADIS16475_SCAN_GYRO_Z] = ADIS16475_REG_Z_GYRO_BIAS_L, 349 [ADIS16475_SCAN_ACCEL_X] = ADIS16475_REG_X_ACCEL_BIAS_L, 350 [ADIS16475_SCAN_ACCEL_Y] = ADIS16475_REG_Y_ACCEL_BIAS_L, 351 [ADIS16475_SCAN_ACCEL_Z] = ADIS16475_REG_Z_ACCEL_BIAS_L, 352}; 353 354static int adis16475_read_raw(struct iio_dev *indio_dev, 355 const struct iio_chan_spec *chan, 356 int *val, int *val2, long info) 357{ 358 struct adis16475 *st = iio_priv(indio_dev); 359 int ret; 360 u32 tmp; 361 362 switch (info) { 363 case IIO_CHAN_INFO_RAW: 364 return adis_single_conversion(indio_dev, chan, 0, val); 365 case IIO_CHAN_INFO_SCALE: 366 switch (chan->type) { 367 case IIO_ANGL_VEL: 368 *val = st->info->gyro_max_val; 369 *val2 = st->info->gyro_max_scale; 370 return IIO_VAL_FRACTIONAL; 371 case IIO_ACCEL: 372 *val = st->info->accel_max_val; 373 *val2 = st->info->accel_max_scale; 374 return IIO_VAL_FRACTIONAL; 375 case IIO_TEMP: 376 *val = st->info->temp_scale; 377 return IIO_VAL_INT; 378 default: 379 return -EINVAL; 380 } 381 case IIO_CHAN_INFO_CALIBBIAS: 382 ret = adis_read_reg_32(&st->adis, 383 adis16475_calib_regs[chan->scan_index], 384 val); 385 if (ret) 386 return ret; 387 388 return IIO_VAL_INT; 389 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 390 ret = adis16475_get_filter(st, val); 391 if (ret) 392 return ret; 393 394 return IIO_VAL_INT; 395 case IIO_CHAN_INFO_SAMP_FREQ: 396 ret = adis16475_get_freq(st, &tmp); 397 if (ret) 398 return ret; 399 400 *val = tmp / 1000; 401 *val2 = (tmp % 1000) * 1000; 402 return IIO_VAL_INT_PLUS_MICRO; 403 default: 404 return -EINVAL; 405 } 406} 407 408static int adis16475_write_raw(struct iio_dev *indio_dev, 409 const struct iio_chan_spec *chan, 410 int val, int val2, long info) 411{ 412 struct adis16475 *st = iio_priv(indio_dev); 413 u32 tmp; 414 415 switch (info) { 416 case IIO_CHAN_INFO_SAMP_FREQ: 417 tmp = val * 1000 + val2 / 1000; 418 return adis16475_set_freq(st, tmp); 419 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 420 return adis16475_set_filter(st, val); 421 case IIO_CHAN_INFO_CALIBBIAS: 422 return adis_write_reg_32(&st->adis, 423 adis16475_calib_regs[chan->scan_index], 424 val); 425 default: 426 return -EINVAL; 427 } 428} 429 430#define ADIS16475_MOD_CHAN(_type, _mod, _address, _si, _r_bits, _s_bits) \ 431 { \ 432 .type = (_type), \ 433 .modified = 1, \ 434 .channel2 = (_mod), \ 435 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 436 BIT(IIO_CHAN_INFO_CALIBBIAS), \ 437 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ 438 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ 439 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 440 .address = (_address), \ 441 .scan_index = (_si), \ 442 .scan_type = { \ 443 .sign = 's', \ 444 .realbits = (_r_bits), \ 445 .storagebits = (_s_bits), \ 446 .endianness = IIO_BE, \ 447 }, \ 448 } 449 450#define ADIS16475_GYRO_CHANNEL(_mod) \ 451 ADIS16475_MOD_CHAN(IIO_ANGL_VEL, IIO_MOD_ ## _mod, \ 452 ADIS16475_REG_ ## _mod ## _GYRO_L, \ 453 ADIS16475_SCAN_GYRO_ ## _mod, 32, 32) 454 455#define ADIS16475_ACCEL_CHANNEL(_mod) \ 456 ADIS16475_MOD_CHAN(IIO_ACCEL, IIO_MOD_ ## _mod, \ 457 ADIS16475_REG_ ## _mod ## _ACCEL_L, \ 458 ADIS16475_SCAN_ACCEL_ ## _mod, 32, 32) 459 460#define ADIS16475_TEMP_CHANNEL() { \ 461 .type = IIO_TEMP, \ 462 .indexed = 1, \ 463 .channel = 0, \ 464 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 465 BIT(IIO_CHAN_INFO_SCALE), \ 466 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ 467 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 468 .address = ADIS16475_REG_TEMP_OUT, \ 469 .scan_index = ADIS16475_SCAN_TEMP, \ 470 .scan_type = { \ 471 .sign = 's', \ 472 .realbits = 16, \ 473 .storagebits = 16, \ 474 .endianness = IIO_BE, \ 475 }, \ 476 } 477 478static const struct iio_chan_spec adis16475_channels[] = { 479 ADIS16475_GYRO_CHANNEL(X), 480 ADIS16475_GYRO_CHANNEL(Y), 481 ADIS16475_GYRO_CHANNEL(Z), 482 ADIS16475_ACCEL_CHANNEL(X), 483 ADIS16475_ACCEL_CHANNEL(Y), 484 ADIS16475_ACCEL_CHANNEL(Z), 485 ADIS16475_TEMP_CHANNEL(), 486 IIO_CHAN_SOFT_TIMESTAMP(7) 487}; 488 489enum adis16475_variant { 490 ADIS16470, 491 ADIS16475_1, 492 ADIS16475_2, 493 ADIS16475_3, 494 ADIS16477_1, 495 ADIS16477_2, 496 ADIS16477_3, 497 ADIS16465_1, 498 ADIS16465_2, 499 ADIS16465_3, 500 ADIS16467_1, 501 ADIS16467_2, 502 ADIS16467_3, 503 ADIS16500, 504 ADIS16505_1, 505 ADIS16505_2, 506 ADIS16505_3, 507 ADIS16507_1, 508 ADIS16507_2, 509 ADIS16507_3, 510}; 511 512enum { 513 ADIS16475_DIAG_STAT_DATA_PATH = 1, 514 ADIS16475_DIAG_STAT_FLASH_MEM, 515 ADIS16475_DIAG_STAT_SPI, 516 ADIS16475_DIAG_STAT_STANDBY, 517 ADIS16475_DIAG_STAT_SENSOR, 518 ADIS16475_DIAG_STAT_MEMORY, 519 ADIS16475_DIAG_STAT_CLK, 520}; 521 522static const char * const adis16475_status_error_msgs[] = { 523 [ADIS16475_DIAG_STAT_DATA_PATH] = "Data Path Overrun", 524 [ADIS16475_DIAG_STAT_FLASH_MEM] = "Flash memory update failure", 525 [ADIS16475_DIAG_STAT_SPI] = "SPI communication error", 526 [ADIS16475_DIAG_STAT_STANDBY] = "Standby mode", 527 [ADIS16475_DIAG_STAT_SENSOR] = "Sensor failure", 528 [ADIS16475_DIAG_STAT_MEMORY] = "Memory failure", 529 [ADIS16475_DIAG_STAT_CLK] = "Clock error", 530}; 531 532static int adis16475_enable_irq(struct adis *adis, bool enable) 533{ 534 /* 535 * There is no way to gate the data-ready signal internally inside the 536 * ADIS16475. We can only control it's polarity... 537 */ 538 if (enable) 539 enable_irq(adis->spi->irq); 540 else 541 disable_irq(adis->spi->irq); 542 543 return 0; 544} 545 546#define ADIS16475_DATA(_prod_id, _timeouts) \ 547{ \ 548 .msc_ctrl_reg = ADIS16475_REG_MSG_CTRL, \ 549 .glob_cmd_reg = ADIS16475_REG_GLOB_CMD, \ 550 .diag_stat_reg = ADIS16475_REG_DIAG_STAT, \ 551 .prod_id_reg = ADIS16475_REG_PROD_ID, \ 552 .prod_id = (_prod_id), \ 553 .self_test_mask = BIT(2), \ 554 .self_test_reg = ADIS16475_REG_GLOB_CMD, \ 555 .cs_change_delay = 16, \ 556 .read_delay = 5, \ 557 .write_delay = 5, \ 558 .status_error_msgs = adis16475_status_error_msgs, \ 559 .status_error_mask = BIT(ADIS16475_DIAG_STAT_DATA_PATH) | \ 560 BIT(ADIS16475_DIAG_STAT_FLASH_MEM) | \ 561 BIT(ADIS16475_DIAG_STAT_SPI) | \ 562 BIT(ADIS16475_DIAG_STAT_STANDBY) | \ 563 BIT(ADIS16475_DIAG_STAT_SENSOR) | \ 564 BIT(ADIS16475_DIAG_STAT_MEMORY) | \ 565 BIT(ADIS16475_DIAG_STAT_CLK), \ 566 .enable_irq = adis16475_enable_irq, \ 567 .timeouts = (_timeouts), \ 568 .burst_reg_cmd = ADIS16475_REG_GLOB_CMD, \ 569 .burst_len = ADIS16475_BURST_MAX_DATA, \ 570 .burst_max_len = ADIS16475_BURST32_MAX_DATA \ 571} 572 573static const struct adis16475_sync adis16475_sync_mode[] = { 574 { ADIS16475_SYNC_OUTPUT }, 575 { ADIS16475_SYNC_DIRECT, 1900, 2100 }, 576 { ADIS16475_SYNC_SCALED, 1, 128 }, 577 { ADIS16475_SYNC_PULSE, 1000, 2100 }, 578}; 579 580static const struct adis_timeout adis16475_timeouts = { 581 .reset_ms = 200, 582 .sw_reset_ms = 200, 583 .self_test_ms = 20, 584}; 585 586static const struct adis_timeout adis1650x_timeouts = { 587 .reset_ms = 260, 588 .sw_reset_ms = 260, 589 .self_test_ms = 30, 590}; 591 592static const struct adis16475_chip_info adis16475_chip_info[] = { 593 [ADIS16470] = { 594 .name = "adis16470", 595 .num_channels = ARRAY_SIZE(adis16475_channels), 596 .channels = adis16475_channels, 597 .gyro_max_val = 1, 598 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16), 599 .accel_max_val = 1, 600 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16), 601 .temp_scale = 100, 602 .int_clk = 2000, 603 .max_dec = 1999, 604 .sync = adis16475_sync_mode, 605 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 606 .adis_data = ADIS16475_DATA(16470, &adis16475_timeouts), 607 }, 608 [ADIS16475_1] = { 609 .name = "adis16475-1", 610 .num_channels = ARRAY_SIZE(adis16475_channels), 611 .channels = adis16475_channels, 612 .gyro_max_val = 1, 613 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16), 614 .accel_max_val = 1, 615 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16), 616 .temp_scale = 100, 617 .int_clk = 2000, 618 .max_dec = 1999, 619 .sync = adis16475_sync_mode, 620 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 621 .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts), 622 }, 623 [ADIS16475_2] = { 624 .name = "adis16475-2", 625 .num_channels = ARRAY_SIZE(adis16475_channels), 626 .channels = adis16475_channels, 627 .gyro_max_val = 1, 628 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16), 629 .accel_max_val = 1, 630 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16), 631 .temp_scale = 100, 632 .int_clk = 2000, 633 .max_dec = 1999, 634 .sync = adis16475_sync_mode, 635 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 636 .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts), 637 }, 638 [ADIS16475_3] = { 639 .name = "adis16475-3", 640 .num_channels = ARRAY_SIZE(adis16475_channels), 641 .channels = adis16475_channels, 642 .gyro_max_val = 1, 643 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16), 644 .accel_max_val = 1, 645 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16), 646 .temp_scale = 100, 647 .int_clk = 2000, 648 .max_dec = 1999, 649 .sync = adis16475_sync_mode, 650 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 651 .adis_data = ADIS16475_DATA(16475, &adis16475_timeouts), 652 }, 653 [ADIS16477_1] = { 654 .name = "adis16477-1", 655 .num_channels = ARRAY_SIZE(adis16475_channels), 656 .channels = adis16475_channels, 657 .gyro_max_val = 1, 658 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16), 659 .accel_max_val = 1, 660 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16), 661 .temp_scale = 100, 662 .int_clk = 2000, 663 .max_dec = 1999, 664 .sync = adis16475_sync_mode, 665 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 666 .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts), 667 }, 668 [ADIS16477_2] = { 669 .name = "adis16477-2", 670 .num_channels = ARRAY_SIZE(adis16475_channels), 671 .channels = adis16475_channels, 672 .gyro_max_val = 1, 673 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16), 674 .accel_max_val = 1, 675 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16), 676 .temp_scale = 100, 677 .int_clk = 2000, 678 .max_dec = 1999, 679 .sync = adis16475_sync_mode, 680 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 681 .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts), 682 }, 683 [ADIS16477_3] = { 684 .name = "adis16477-3", 685 .num_channels = ARRAY_SIZE(adis16475_channels), 686 .channels = adis16475_channels, 687 .gyro_max_val = 1, 688 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16), 689 .accel_max_val = 1, 690 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16), 691 .temp_scale = 100, 692 .int_clk = 2000, 693 .max_dec = 1999, 694 .sync = adis16475_sync_mode, 695 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 696 .adis_data = ADIS16475_DATA(16477, &adis16475_timeouts), 697 }, 698 [ADIS16465_1] = { 699 .name = "adis16465-1", 700 .num_channels = ARRAY_SIZE(adis16475_channels), 701 .channels = adis16475_channels, 702 .gyro_max_val = 1, 703 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16), 704 .accel_max_val = 1, 705 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16), 706 .temp_scale = 100, 707 .int_clk = 2000, 708 .max_dec = 1999, 709 .sync = adis16475_sync_mode, 710 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 711 .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts), 712 }, 713 [ADIS16465_2] = { 714 .name = "adis16465-2", 715 .num_channels = ARRAY_SIZE(adis16475_channels), 716 .channels = adis16475_channels, 717 .gyro_max_val = 1, 718 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16), 719 .accel_max_val = 1, 720 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16), 721 .temp_scale = 100, 722 .int_clk = 2000, 723 .max_dec = 1999, 724 .sync = adis16475_sync_mode, 725 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 726 .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts), 727 }, 728 [ADIS16465_3] = { 729 .name = "adis16465-3", 730 .num_channels = ARRAY_SIZE(adis16475_channels), 731 .channels = adis16475_channels, 732 .gyro_max_val = 1, 733 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16), 734 .accel_max_val = 1, 735 .accel_max_scale = IIO_M_S_2_TO_G(4000 << 16), 736 .temp_scale = 100, 737 .int_clk = 2000, 738 .max_dec = 1999, 739 .sync = adis16475_sync_mode, 740 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 741 .adis_data = ADIS16475_DATA(16465, &adis16475_timeouts), 742 }, 743 [ADIS16467_1] = { 744 .name = "adis16467-1", 745 .num_channels = ARRAY_SIZE(adis16475_channels), 746 .channels = adis16475_channels, 747 .gyro_max_val = 1, 748 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16), 749 .accel_max_val = 1, 750 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16), 751 .temp_scale = 100, 752 .int_clk = 2000, 753 .max_dec = 1999, 754 .sync = adis16475_sync_mode, 755 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 756 .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts), 757 }, 758 [ADIS16467_2] = { 759 .name = "adis16467-2", 760 .num_channels = ARRAY_SIZE(adis16475_channels), 761 .channels = adis16475_channels, 762 .gyro_max_val = 1, 763 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16), 764 .accel_max_val = 1, 765 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16), 766 .temp_scale = 100, 767 .int_clk = 2000, 768 .max_dec = 1999, 769 .sync = adis16475_sync_mode, 770 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 771 .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts), 772 }, 773 [ADIS16467_3] = { 774 .name = "adis16467-3", 775 .num_channels = ARRAY_SIZE(adis16475_channels), 776 .channels = adis16475_channels, 777 .gyro_max_val = 1, 778 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16), 779 .accel_max_val = 1, 780 .accel_max_scale = IIO_M_S_2_TO_G(800 << 16), 781 .temp_scale = 100, 782 .int_clk = 2000, 783 .max_dec = 1999, 784 .sync = adis16475_sync_mode, 785 .num_sync = ARRAY_SIZE(adis16475_sync_mode), 786 .adis_data = ADIS16475_DATA(16467, &adis16475_timeouts), 787 }, 788 [ADIS16500] = { 789 .name = "adis16500", 790 .num_channels = ARRAY_SIZE(adis16475_channels), 791 .channels = adis16475_channels, 792 .gyro_max_val = 1, 793 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16), 794 .accel_max_val = 392, 795 .accel_max_scale = 32000 << 16, 796 .temp_scale = 100, 797 .int_clk = 2000, 798 .max_dec = 1999, 799 .sync = adis16475_sync_mode, 800 /* pulse sync not supported */ 801 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1, 802 .has_burst32 = true, 803 .adis_data = ADIS16475_DATA(16500, &adis1650x_timeouts), 804 }, 805 [ADIS16505_1] = { 806 .name = "adis16505-1", 807 .num_channels = ARRAY_SIZE(adis16475_channels), 808 .channels = adis16475_channels, 809 .gyro_max_val = 1, 810 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16), 811 .accel_max_val = 78, 812 .accel_max_scale = 32000 << 16, 813 .temp_scale = 100, 814 .int_clk = 2000, 815 .max_dec = 1999, 816 .sync = adis16475_sync_mode, 817 /* pulse sync not supported */ 818 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1, 819 .has_burst32 = true, 820 .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts), 821 }, 822 [ADIS16505_2] = { 823 .name = "adis16505-2", 824 .num_channels = ARRAY_SIZE(adis16475_channels), 825 .channels = adis16475_channels, 826 .gyro_max_val = 1, 827 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16), 828 .accel_max_val = 78, 829 .accel_max_scale = 32000 << 16, 830 .temp_scale = 100, 831 .int_clk = 2000, 832 .max_dec = 1999, 833 .sync = adis16475_sync_mode, 834 /* pulse sync not supported */ 835 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1, 836 .has_burst32 = true, 837 .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts), 838 }, 839 [ADIS16505_3] = { 840 .name = "adis16505-3", 841 .num_channels = ARRAY_SIZE(adis16475_channels), 842 .channels = adis16475_channels, 843 .gyro_max_val = 1, 844 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16), 845 .accel_max_val = 78, 846 .accel_max_scale = 32000 << 16, 847 .temp_scale = 100, 848 .int_clk = 2000, 849 .max_dec = 1999, 850 .sync = adis16475_sync_mode, 851 /* pulse sync not supported */ 852 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1, 853 .has_burst32 = true, 854 .adis_data = ADIS16475_DATA(16505, &adis1650x_timeouts), 855 }, 856 [ADIS16507_1] = { 857 .name = "adis16507-1", 858 .num_channels = ARRAY_SIZE(adis16475_channels), 859 .channels = adis16475_channels, 860 .gyro_max_val = 1, 861 .gyro_max_scale = IIO_RAD_TO_DEGREE(160 << 16), 862 .accel_max_val = 392, 863 .accel_max_scale = 32000 << 16, 864 .temp_scale = 100, 865 .int_clk = 2000, 866 .max_dec = 1999, 867 .sync = adis16475_sync_mode, 868 /* pulse sync not supported */ 869 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1, 870 .has_burst32 = true, 871 .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts), 872 }, 873 [ADIS16507_2] = { 874 .name = "adis16507-2", 875 .num_channels = ARRAY_SIZE(adis16475_channels), 876 .channels = adis16475_channels, 877 .gyro_max_val = 1, 878 .gyro_max_scale = IIO_RAD_TO_DEGREE(40 << 16), 879 .accel_max_val = 392, 880 .accel_max_scale = 32000 << 16, 881 .temp_scale = 100, 882 .int_clk = 2000, 883 .max_dec = 1999, 884 .sync = adis16475_sync_mode, 885 /* pulse sync not supported */ 886 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1, 887 .has_burst32 = true, 888 .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts), 889 }, 890 [ADIS16507_3] = { 891 .name = "adis16507-3", 892 .num_channels = ARRAY_SIZE(adis16475_channels), 893 .channels = adis16475_channels, 894 .gyro_max_val = 1, 895 .gyro_max_scale = IIO_RAD_TO_DEGREE(10 << 16), 896 .accel_max_val = 392, 897 .accel_max_scale = 32000 << 16, 898 .temp_scale = 100, 899 .int_clk = 2000, 900 .max_dec = 1999, 901 .sync = adis16475_sync_mode, 902 /* pulse sync not supported */ 903 .num_sync = ARRAY_SIZE(adis16475_sync_mode) - 1, 904 .has_burst32 = true, 905 .adis_data = ADIS16475_DATA(16507, &adis1650x_timeouts), 906 }, 907}; 908 909static const struct iio_info adis16475_info = { 910 .read_raw = &adis16475_read_raw, 911 .write_raw = &adis16475_write_raw, 912 .update_scan_mode = adis_update_scan_mode, 913 .debugfs_reg_access = adis_debugfs_reg_access, 914}; 915 916static bool adis16475_validate_crc(const u8 *buffer, u16 crc, 917 const bool burst32) 918{ 919 int i; 920 /* extra 6 elements for low gyro and accel */ 921 const u16 sz = burst32 ? ADIS16475_BURST32_MAX_DATA : 922 ADIS16475_BURST_MAX_DATA; 923 924 for (i = 0; i < sz - 2; i++) 925 crc -= buffer[i]; 926 927 return crc == 0; 928} 929 930static void adis16475_burst32_check(struct adis16475 *st) 931{ 932 int ret; 933 struct adis *adis = &st->adis; 934 935 if (!st->info->has_burst32) 936 return; 937 938 if (st->lsb_flag && !st->burst32) { 939 const u16 en = ADIS16500_BURST32(1); 940 941 ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL, 942 ADIS16500_BURST32_MASK, en); 943 if (ret) 944 return; 945 946 st->burst32 = true; 947 948 /* 949 * In 32-bit mode we need extra 2 bytes for all gyro 950 * and accel channels. 951 */ 952 adis->burst_extra_len = 6 * sizeof(u16); 953 adis->xfer[1].len += 6 * sizeof(u16); 954 dev_dbg(&adis->spi->dev, "Enable burst32 mode, xfer:%d", 955 adis->xfer[1].len); 956 957 } else if (!st->lsb_flag && st->burst32) { 958 const u16 en = ADIS16500_BURST32(0); 959 960 ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL, 961 ADIS16500_BURST32_MASK, en); 962 if (ret) 963 return; 964 965 st->burst32 = false; 966 967 /* Remove the extra bits */ 968 adis->burst_extra_len = 0; 969 adis->xfer[1].len -= 6 * sizeof(u16); 970 dev_dbg(&adis->spi->dev, "Disable burst32 mode, xfer:%d\n", 971 adis->xfer[1].len); 972 } 973} 974 975static irqreturn_t adis16475_trigger_handler(int irq, void *p) 976{ 977 struct iio_poll_func *pf = p; 978 struct iio_dev *indio_dev = pf->indio_dev; 979 struct adis16475 *st = iio_priv(indio_dev); 980 struct adis *adis = &st->adis; 981 int ret, bit, i = 0; 982 __be16 *buffer; 983 u16 crc; 984 bool valid; 985 /* offset until the first element after gyro and accel */ 986 const u8 offset = st->burst32 ? 13 : 7; 987 const u32 cached_spi_speed_hz = adis->spi->max_speed_hz; 988 989 adis->spi->max_speed_hz = ADIS16475_BURST_MAX_SPEED; 990 991 ret = spi_sync(adis->spi, &adis->msg); 992 if (ret) 993 goto check_burst32; 994 995 adis->spi->max_speed_hz = cached_spi_speed_hz; 996 buffer = adis->buffer; 997 998 crc = be16_to_cpu(buffer[offset + 2]); 999 valid = adis16475_validate_crc(adis->buffer, crc, st->burst32); 1000 if (!valid) { 1001 dev_err(&adis->spi->dev, "Invalid crc\n"); 1002 goto check_burst32; 1003 } 1004 1005 for_each_set_bit(bit, indio_dev->active_scan_mask, 1006 indio_dev->masklength) { 1007 /* 1008 * When burst mode is used, system flags is the first data 1009 * channel in the sequence, but the scan index is 7. 1010 */ 1011 switch (bit) { 1012 case ADIS16475_SCAN_TEMP: 1013 st->data[i++] = buffer[offset]; 1014 break; 1015 case ADIS16475_SCAN_GYRO_X ... ADIS16475_SCAN_ACCEL_Z: 1016 /* 1017 * The first 2 bytes on the received data are the 1018 * DIAG_STAT reg, hence the +1 offset here... 1019 */ 1020 if (st->burst32) { 1021 /* upper 16 */ 1022 st->data[i++] = buffer[bit * 2 + 2]; 1023 /* lower 16 */ 1024 st->data[i++] = buffer[bit * 2 + 1]; 1025 } else { 1026 st->data[i++] = buffer[bit + 1]; 1027 /* 1028 * Don't bother in doing the manual read if the 1029 * device supports burst32. burst32 will be 1030 * enabled in the next call to 1031 * adis16475_burst32_check()... 1032 */ 1033 if (st->lsb_flag && !st->info->has_burst32) { 1034 u16 val = 0; 1035 const u32 reg = ADIS16475_REG_X_GYRO_L + 1036 bit * 4; 1037 1038 adis_read_reg_16(adis, reg, &val); 1039 st->data[i++] = cpu_to_be16(val); 1040 } else { 1041 /* lower not used */ 1042 st->data[i++] = 0; 1043 } 1044 } 1045 break; 1046 } 1047 } 1048 1049 iio_push_to_buffers_with_timestamp(indio_dev, st->data, pf->timestamp); 1050check_burst32: 1051 /* 1052 * We only check the burst mode at the end of the current capture since 1053 * it takes a full data ready cycle for the device to update the burst 1054 * array. 1055 */ 1056 adis16475_burst32_check(st); 1057 iio_trigger_notify_done(indio_dev->trig); 1058 1059 return IRQ_HANDLED; 1060} 1061 1062static void adis16475_disable_clk(void *data) 1063{ 1064 clk_disable_unprepare((struct clk *)data); 1065} 1066 1067static int adis16475_config_sync_mode(struct adis16475 *st) 1068{ 1069 int ret; 1070 struct device *dev = &st->adis.spi->dev; 1071 const struct adis16475_sync *sync; 1072 u32 sync_mode; 1073 1074 /* default to internal clk */ 1075 st->clk_freq = st->info->int_clk * 1000; 1076 1077 ret = device_property_read_u32(dev, "adi,sync-mode", &sync_mode); 1078 if (ret) 1079 return 0; 1080 1081 if (sync_mode >= st->info->num_sync) { 1082 dev_err(dev, "Invalid sync mode: %u for %s\n", sync_mode, 1083 st->info->name); 1084 return -EINVAL; 1085 } 1086 1087 sync = &st->info->sync[sync_mode]; 1088 1089 /* All the other modes require external input signal */ 1090 if (sync->sync_mode != ADIS16475_SYNC_OUTPUT) { 1091 struct clk *clk = devm_clk_get(dev, NULL); 1092 1093 if (IS_ERR(clk)) 1094 return PTR_ERR(clk); 1095 1096 ret = clk_prepare_enable(clk); 1097 if (ret) 1098 return ret; 1099 1100 ret = devm_add_action_or_reset(dev, adis16475_disable_clk, clk); 1101 if (ret) 1102 return ret; 1103 1104 st->clk_freq = clk_get_rate(clk); 1105 if (st->clk_freq < sync->min_rate || 1106 st->clk_freq > sync->max_rate) { 1107 dev_err(dev, 1108 "Clk rate:%u not in a valid range:[%u %u]\n", 1109 st->clk_freq, sync->min_rate, sync->max_rate); 1110 return -EINVAL; 1111 } 1112 1113 if (sync->sync_mode == ADIS16475_SYNC_SCALED) { 1114 u16 up_scale; 1115 u32 scaled_out_freq = 0; 1116 /* 1117 * If we are in scaled mode, we must have an up_scale. 1118 * In scaled mode the allowable input clock range is 1119 * 1 Hz to 128 Hz, and the allowable output range is 1120 * 1900 to 2100 Hz. Hence, a scale must be given to 1121 * get the allowable output. 1122 */ 1123 ret = device_property_read_u32(dev, 1124 "adi,scaled-output-hz", 1125 &scaled_out_freq); 1126 if (ret) { 1127 dev_err(dev, "adi,scaled-output-hz must be given when in scaled sync mode"); 1128 return -EINVAL; 1129 } else if (scaled_out_freq < 1900 || 1130 scaled_out_freq > 2100) { 1131 dev_err(dev, "Invalid value: %u for adi,scaled-output-hz", 1132 scaled_out_freq); 1133 return -EINVAL; 1134 } 1135 1136 up_scale = DIV_ROUND_CLOSEST(scaled_out_freq, 1137 st->clk_freq); 1138 1139 ret = __adis_write_reg_16(&st->adis, 1140 ADIS16475_REG_UP_SCALE, 1141 up_scale); 1142 if (ret) 1143 return ret; 1144 1145 st->clk_freq = scaled_out_freq; 1146 } 1147 1148 st->clk_freq *= 1000; 1149 } 1150 /* 1151 * Keep in mind that the mask for the clk modes in adis1650* 1152 * chips is different (1100 instead of 11100). However, we 1153 * are not configuring BIT(4) in these chips and the default 1154 * value is 0, so we are fine in doing the below operations. 1155 * I'm keeping this for simplicity and avoiding extra variables 1156 * in chip_info. 1157 */ 1158 ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL, 1159 ADIS16475_SYNC_MODE_MASK, sync->sync_mode); 1160 if (ret) 1161 return ret; 1162 1163 usleep_range(250, 260); 1164 1165 return 0; 1166} 1167 1168static int adis16475_config_irq_pin(struct adis16475 *st) 1169{ 1170 int ret; 1171 struct irq_data *desc; 1172 u32 irq_type; 1173 u16 val = 0; 1174 u8 polarity; 1175 struct spi_device *spi = st->adis.spi; 1176 1177 desc = irq_get_irq_data(spi->irq); 1178 if (!desc) { 1179 dev_err(&spi->dev, "Could not find IRQ %d\n", spi->irq); 1180 return -EINVAL; 1181 } 1182 /* 1183 * It is possible to configure the data ready polarity. Furthermore, we 1184 * need to update the adis struct if we want data ready as active low. 1185 */ 1186 irq_type = irqd_get_trigger_type(desc); 1187 if (irq_type == IRQ_TYPE_EDGE_RISING) { 1188 polarity = 1; 1189 st->adis.irq_flag = IRQF_TRIGGER_RISING; 1190 } else if (irq_type == IRQ_TYPE_EDGE_FALLING) { 1191 polarity = 0; 1192 st->adis.irq_flag = IRQF_TRIGGER_FALLING; 1193 } else { 1194 dev_err(&spi->dev, "Invalid interrupt type 0x%x specified\n", 1195 irq_type); 1196 return -EINVAL; 1197 } 1198 1199 /* We cannot mask the interrupt so ensure it's not enabled at request */ 1200 st->adis.irq_flag |= IRQF_NO_AUTOEN; 1201 1202 val = ADIS16475_MSG_CTRL_DR_POL(polarity); 1203 ret = __adis_update_bits(&st->adis, ADIS16475_REG_MSG_CTRL, 1204 ADIS16475_MSG_CTRL_DR_POL_MASK, val); 1205 if (ret) 1206 return ret; 1207 /* 1208 * There is a delay writing to any bits written to the MSC_CTRL 1209 * register. It should not be bigger than 200us, so 250 should be more 1210 * than enough! 1211 */ 1212 usleep_range(250, 260); 1213 1214 return 0; 1215} 1216 1217static const struct of_device_id adis16475_of_match[] = { 1218 { .compatible = "adi,adis16470", 1219 .data = &adis16475_chip_info[ADIS16470] }, 1220 { .compatible = "adi,adis16475-1", 1221 .data = &adis16475_chip_info[ADIS16475_1] }, 1222 { .compatible = "adi,adis16475-2", 1223 .data = &adis16475_chip_info[ADIS16475_2] }, 1224 { .compatible = "adi,adis16475-3", 1225 .data = &adis16475_chip_info[ADIS16475_3] }, 1226 { .compatible = "adi,adis16477-1", 1227 .data = &adis16475_chip_info[ADIS16477_1] }, 1228 { .compatible = "adi,adis16477-2", 1229 .data = &adis16475_chip_info[ADIS16477_2] }, 1230 { .compatible = "adi,adis16477-3", 1231 .data = &adis16475_chip_info[ADIS16477_3] }, 1232 { .compatible = "adi,adis16465-1", 1233 .data = &adis16475_chip_info[ADIS16465_1] }, 1234 { .compatible = "adi,adis16465-2", 1235 .data = &adis16475_chip_info[ADIS16465_2] }, 1236 { .compatible = "adi,adis16465-3", 1237 .data = &adis16475_chip_info[ADIS16465_3] }, 1238 { .compatible = "adi,adis16467-1", 1239 .data = &adis16475_chip_info[ADIS16467_1] }, 1240 { .compatible = "adi,adis16467-2", 1241 .data = &adis16475_chip_info[ADIS16467_2] }, 1242 { .compatible = "adi,adis16467-3", 1243 .data = &adis16475_chip_info[ADIS16467_3] }, 1244 { .compatible = "adi,adis16500", 1245 .data = &adis16475_chip_info[ADIS16500] }, 1246 { .compatible = "adi,adis16505-1", 1247 .data = &adis16475_chip_info[ADIS16505_1] }, 1248 { .compatible = "adi,adis16505-2", 1249 .data = &adis16475_chip_info[ADIS16505_2] }, 1250 { .compatible = "adi,adis16505-3", 1251 .data = &adis16475_chip_info[ADIS16505_3] }, 1252 { .compatible = "adi,adis16507-1", 1253 .data = &adis16475_chip_info[ADIS16507_1] }, 1254 { .compatible = "adi,adis16507-2", 1255 .data = &adis16475_chip_info[ADIS16507_2] }, 1256 { .compatible = "adi,adis16507-3", 1257 .data = &adis16475_chip_info[ADIS16507_3] }, 1258 { }, 1259}; 1260MODULE_DEVICE_TABLE(of, adis16475_of_match); 1261 1262static int adis16475_probe(struct spi_device *spi) 1263{ 1264 struct iio_dev *indio_dev; 1265 struct adis16475 *st; 1266 int ret; 1267 1268 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 1269 if (!indio_dev) 1270 return -ENOMEM; 1271 1272 st = iio_priv(indio_dev); 1273 spi_set_drvdata(spi, indio_dev); 1274 1275 st->info = device_get_match_data(&spi->dev); 1276 if (!st->info) 1277 return -EINVAL; 1278 1279 ret = adis_init(&st->adis, indio_dev, spi, &st->info->adis_data); 1280 if (ret) 1281 return ret; 1282 1283 indio_dev->name = st->info->name; 1284 indio_dev->channels = st->info->channels; 1285 indio_dev->num_channels = st->info->num_channels; 1286 indio_dev->info = &adis16475_info; 1287 indio_dev->modes = INDIO_DIRECT_MODE; 1288 1289 ret = __adis_initial_startup(&st->adis); 1290 if (ret) 1291 return ret; 1292 1293 ret = adis16475_config_irq_pin(st); 1294 if (ret) 1295 return ret; 1296 1297 ret = adis16475_config_sync_mode(st); 1298 if (ret) 1299 return ret; 1300 1301 ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, 1302 adis16475_trigger_handler); 1303 if (ret) 1304 return ret; 1305 1306 ret = devm_iio_device_register(&spi->dev, indio_dev); 1307 if (ret) 1308 return ret; 1309 1310 adis16475_debugfs_init(indio_dev); 1311 1312 return 0; 1313} 1314 1315static struct spi_driver adis16475_driver = { 1316 .driver = { 1317 .name = "adis16475", 1318 .of_match_table = adis16475_of_match, 1319 }, 1320 .probe = adis16475_probe, 1321}; 1322module_spi_driver(adis16475_driver); 1323 1324MODULE_AUTHOR("Nuno Sa <nuno.sa@analog.com>"); 1325MODULE_DESCRIPTION("Analog Devices ADIS16475 IMU driver"); 1326MODULE_LICENSE("GPL"); 1327MODULE_IMPORT_NS(IIO_ADISLIB); 1328