18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0+ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * max30100.c - Support for MAX30100 heart rate and pulse oximeter sensor 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2015, 2018 68c2ecf20Sopenharmony_ci * Author: Matt Ranostay <matt.ranostay@konsulko.com> 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * TODO: enable pulse length controls via device tree properties 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#include <linux/module.h> 128c2ecf20Sopenharmony_ci#include <linux/init.h> 138c2ecf20Sopenharmony_ci#include <linux/interrupt.h> 148c2ecf20Sopenharmony_ci#include <linux/delay.h> 158c2ecf20Sopenharmony_ci#include <linux/err.h> 168c2ecf20Sopenharmony_ci#include <linux/irq.h> 178c2ecf20Sopenharmony_ci#include <linux/i2c.h> 188c2ecf20Sopenharmony_ci#include <linux/mutex.h> 198c2ecf20Sopenharmony_ci#include <linux/property.h> 208c2ecf20Sopenharmony_ci#include <linux/regmap.h> 218c2ecf20Sopenharmony_ci#include <linux/iio/iio.h> 228c2ecf20Sopenharmony_ci#include <linux/iio/buffer.h> 238c2ecf20Sopenharmony_ci#include <linux/iio/kfifo_buf.h> 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci#define MAX30100_REGMAP_NAME "max30100_regmap" 268c2ecf20Sopenharmony_ci#define MAX30100_DRV_NAME "max30100" 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_STATUS 0x00 298c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_STATUS_PWR_RDY BIT(0) 308c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_STATUS_SPO2_RDY BIT(4) 318c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_STATUS_HR_RDY BIT(5) 328c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_STATUS_FIFO_RDY BIT(7) 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_ENABLE 0x01 358c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_ENABLE_SPO2_EN BIT(0) 368c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_ENABLE_HR_EN BIT(1) 378c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_ENABLE_FIFO_EN BIT(3) 388c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_ENABLE_MASK 0xf0 398c2ecf20Sopenharmony_ci#define MAX30100_REG_INT_ENABLE_MASK_SHIFT 4 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci#define MAX30100_REG_FIFO_WR_PTR 0x02 428c2ecf20Sopenharmony_ci#define MAX30100_REG_FIFO_OVR_CTR 0x03 438c2ecf20Sopenharmony_ci#define MAX30100_REG_FIFO_RD_PTR 0x04 448c2ecf20Sopenharmony_ci#define MAX30100_REG_FIFO_DATA 0x05 458c2ecf20Sopenharmony_ci#define MAX30100_REG_FIFO_DATA_ENTRY_COUNT 16 468c2ecf20Sopenharmony_ci#define MAX30100_REG_FIFO_DATA_ENTRY_LEN 4 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG 0x06 498c2ecf20Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN BIT(0) 508c2ecf20Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG_MODE_HR_EN BIT(1) 518c2ecf20Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG_MODE_MASK 0x03 528c2ecf20Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG_TEMP_EN BIT(3) 538c2ecf20Sopenharmony_ci#define MAX30100_REG_MODE_CONFIG_PWR BIT(7) 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci#define MAX30100_REG_SPO2_CONFIG 0x07 568c2ecf20Sopenharmony_ci#define MAX30100_REG_SPO2_CONFIG_100HZ BIT(2) 578c2ecf20Sopenharmony_ci#define MAX30100_REG_SPO2_CONFIG_HI_RES_EN BIT(6) 588c2ecf20Sopenharmony_ci#define MAX30100_REG_SPO2_CONFIG_1600US 0x3 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci#define MAX30100_REG_LED_CONFIG 0x09 618c2ecf20Sopenharmony_ci#define MAX30100_REG_LED_CONFIG_LED_MASK 0x0f 628c2ecf20Sopenharmony_ci#define MAX30100_REG_LED_CONFIG_RED_LED_SHIFT 4 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci#define MAX30100_REG_LED_CONFIG_24MA 0x07 658c2ecf20Sopenharmony_ci#define MAX30100_REG_LED_CONFIG_50MA 0x0f 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci#define MAX30100_REG_TEMP_INTEGER 0x16 688c2ecf20Sopenharmony_ci#define MAX30100_REG_TEMP_FRACTION 0x17 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_cistruct max30100_data { 718c2ecf20Sopenharmony_ci struct i2c_client *client; 728c2ecf20Sopenharmony_ci struct iio_dev *indio_dev; 738c2ecf20Sopenharmony_ci struct mutex lock; 748c2ecf20Sopenharmony_ci struct regmap *regmap; 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci __be16 buffer[2]; /* 2 16-bit channels */ 778c2ecf20Sopenharmony_ci}; 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_cistatic bool max30100_is_volatile_reg(struct device *dev, unsigned int reg) 808c2ecf20Sopenharmony_ci{ 818c2ecf20Sopenharmony_ci switch (reg) { 828c2ecf20Sopenharmony_ci case MAX30100_REG_INT_STATUS: 838c2ecf20Sopenharmony_ci case MAX30100_REG_MODE_CONFIG: 848c2ecf20Sopenharmony_ci case MAX30100_REG_FIFO_WR_PTR: 858c2ecf20Sopenharmony_ci case MAX30100_REG_FIFO_OVR_CTR: 868c2ecf20Sopenharmony_ci case MAX30100_REG_FIFO_RD_PTR: 878c2ecf20Sopenharmony_ci case MAX30100_REG_FIFO_DATA: 888c2ecf20Sopenharmony_ci case MAX30100_REG_TEMP_INTEGER: 898c2ecf20Sopenharmony_ci case MAX30100_REG_TEMP_FRACTION: 908c2ecf20Sopenharmony_ci return true; 918c2ecf20Sopenharmony_ci default: 928c2ecf20Sopenharmony_ci return false; 938c2ecf20Sopenharmony_ci } 948c2ecf20Sopenharmony_ci} 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_cistatic const struct regmap_config max30100_regmap_config = { 978c2ecf20Sopenharmony_ci .name = MAX30100_REGMAP_NAME, 988c2ecf20Sopenharmony_ci 998c2ecf20Sopenharmony_ci .reg_bits = 8, 1008c2ecf20Sopenharmony_ci .val_bits = 8, 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ci .max_register = MAX30100_REG_TEMP_FRACTION, 1038c2ecf20Sopenharmony_ci .cache_type = REGCACHE_FLAT, 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ci .volatile_reg = max30100_is_volatile_reg, 1068c2ecf20Sopenharmony_ci}; 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_cistatic const unsigned int max30100_led_current_mapping[] = { 1098c2ecf20Sopenharmony_ci 4400, 7600, 11000, 14200, 17400, 1108c2ecf20Sopenharmony_ci 20800, 24000, 27100, 30600, 33800, 1118c2ecf20Sopenharmony_ci 37000, 40200, 43600, 46800, 50000 1128c2ecf20Sopenharmony_ci}; 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_cistatic const unsigned long max30100_scan_masks[] = {0x3, 0}; 1158c2ecf20Sopenharmony_ci 1168c2ecf20Sopenharmony_cistatic const struct iio_chan_spec max30100_channels[] = { 1178c2ecf20Sopenharmony_ci { 1188c2ecf20Sopenharmony_ci .type = IIO_INTENSITY, 1198c2ecf20Sopenharmony_ci .channel2 = IIO_MOD_LIGHT_IR, 1208c2ecf20Sopenharmony_ci .modified = 1, 1218c2ecf20Sopenharmony_ci 1228c2ecf20Sopenharmony_ci .scan_index = 0, 1238c2ecf20Sopenharmony_ci .scan_type = { 1248c2ecf20Sopenharmony_ci .sign = 'u', 1258c2ecf20Sopenharmony_ci .realbits = 16, 1268c2ecf20Sopenharmony_ci .storagebits = 16, 1278c2ecf20Sopenharmony_ci .endianness = IIO_BE, 1288c2ecf20Sopenharmony_ci }, 1298c2ecf20Sopenharmony_ci }, 1308c2ecf20Sopenharmony_ci { 1318c2ecf20Sopenharmony_ci .type = IIO_INTENSITY, 1328c2ecf20Sopenharmony_ci .channel2 = IIO_MOD_LIGHT_RED, 1338c2ecf20Sopenharmony_ci .modified = 1, 1348c2ecf20Sopenharmony_ci 1358c2ecf20Sopenharmony_ci .scan_index = 1, 1368c2ecf20Sopenharmony_ci .scan_type = { 1378c2ecf20Sopenharmony_ci .sign = 'u', 1388c2ecf20Sopenharmony_ci .realbits = 16, 1398c2ecf20Sopenharmony_ci .storagebits = 16, 1408c2ecf20Sopenharmony_ci .endianness = IIO_BE, 1418c2ecf20Sopenharmony_ci }, 1428c2ecf20Sopenharmony_ci }, 1438c2ecf20Sopenharmony_ci { 1448c2ecf20Sopenharmony_ci .type = IIO_TEMP, 1458c2ecf20Sopenharmony_ci .info_mask_separate = 1468c2ecf20Sopenharmony_ci BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), 1478c2ecf20Sopenharmony_ci .scan_index = -1, 1488c2ecf20Sopenharmony_ci }, 1498c2ecf20Sopenharmony_ci}; 1508c2ecf20Sopenharmony_ci 1518c2ecf20Sopenharmony_cistatic int max30100_set_powermode(struct max30100_data *data, bool state) 1528c2ecf20Sopenharmony_ci{ 1538c2ecf20Sopenharmony_ci return regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG, 1548c2ecf20Sopenharmony_ci MAX30100_REG_MODE_CONFIG_PWR, 1558c2ecf20Sopenharmony_ci state ? 0 : MAX30100_REG_MODE_CONFIG_PWR); 1568c2ecf20Sopenharmony_ci} 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_cistatic int max30100_clear_fifo(struct max30100_data *data) 1598c2ecf20Sopenharmony_ci{ 1608c2ecf20Sopenharmony_ci int ret; 1618c2ecf20Sopenharmony_ci 1628c2ecf20Sopenharmony_ci ret = regmap_write(data->regmap, MAX30100_REG_FIFO_WR_PTR, 0); 1638c2ecf20Sopenharmony_ci if (ret) 1648c2ecf20Sopenharmony_ci return ret; 1658c2ecf20Sopenharmony_ci 1668c2ecf20Sopenharmony_ci ret = regmap_write(data->regmap, MAX30100_REG_FIFO_OVR_CTR, 0); 1678c2ecf20Sopenharmony_ci if (ret) 1688c2ecf20Sopenharmony_ci return ret; 1698c2ecf20Sopenharmony_ci 1708c2ecf20Sopenharmony_ci return regmap_write(data->regmap, MAX30100_REG_FIFO_RD_PTR, 0); 1718c2ecf20Sopenharmony_ci} 1728c2ecf20Sopenharmony_ci 1738c2ecf20Sopenharmony_cistatic int max30100_buffer_postenable(struct iio_dev *indio_dev) 1748c2ecf20Sopenharmony_ci{ 1758c2ecf20Sopenharmony_ci struct max30100_data *data = iio_priv(indio_dev); 1768c2ecf20Sopenharmony_ci int ret; 1778c2ecf20Sopenharmony_ci 1788c2ecf20Sopenharmony_ci ret = max30100_set_powermode(data, true); 1798c2ecf20Sopenharmony_ci if (ret) 1808c2ecf20Sopenharmony_ci return ret; 1818c2ecf20Sopenharmony_ci 1828c2ecf20Sopenharmony_ci return max30100_clear_fifo(data); 1838c2ecf20Sopenharmony_ci} 1848c2ecf20Sopenharmony_ci 1858c2ecf20Sopenharmony_cistatic int max30100_buffer_predisable(struct iio_dev *indio_dev) 1868c2ecf20Sopenharmony_ci{ 1878c2ecf20Sopenharmony_ci struct max30100_data *data = iio_priv(indio_dev); 1888c2ecf20Sopenharmony_ci 1898c2ecf20Sopenharmony_ci return max30100_set_powermode(data, false); 1908c2ecf20Sopenharmony_ci} 1918c2ecf20Sopenharmony_ci 1928c2ecf20Sopenharmony_cistatic const struct iio_buffer_setup_ops max30100_buffer_setup_ops = { 1938c2ecf20Sopenharmony_ci .postenable = max30100_buffer_postenable, 1948c2ecf20Sopenharmony_ci .predisable = max30100_buffer_predisable, 1958c2ecf20Sopenharmony_ci}; 1968c2ecf20Sopenharmony_ci 1978c2ecf20Sopenharmony_cistatic inline int max30100_fifo_count(struct max30100_data *data) 1988c2ecf20Sopenharmony_ci{ 1998c2ecf20Sopenharmony_ci unsigned int val; 2008c2ecf20Sopenharmony_ci int ret; 2018c2ecf20Sopenharmony_ci 2028c2ecf20Sopenharmony_ci ret = regmap_read(data->regmap, MAX30100_REG_INT_STATUS, &val); 2038c2ecf20Sopenharmony_ci if (ret) 2048c2ecf20Sopenharmony_ci return ret; 2058c2ecf20Sopenharmony_ci 2068c2ecf20Sopenharmony_ci /* FIFO is almost full */ 2078c2ecf20Sopenharmony_ci if (val & MAX30100_REG_INT_STATUS_FIFO_RDY) 2088c2ecf20Sopenharmony_ci return MAX30100_REG_FIFO_DATA_ENTRY_COUNT - 1; 2098c2ecf20Sopenharmony_ci 2108c2ecf20Sopenharmony_ci return 0; 2118c2ecf20Sopenharmony_ci} 2128c2ecf20Sopenharmony_ci 2138c2ecf20Sopenharmony_cistatic int max30100_read_measurement(struct max30100_data *data) 2148c2ecf20Sopenharmony_ci{ 2158c2ecf20Sopenharmony_ci int ret; 2168c2ecf20Sopenharmony_ci 2178c2ecf20Sopenharmony_ci ret = i2c_smbus_read_i2c_block_data(data->client, 2188c2ecf20Sopenharmony_ci MAX30100_REG_FIFO_DATA, 2198c2ecf20Sopenharmony_ci MAX30100_REG_FIFO_DATA_ENTRY_LEN, 2208c2ecf20Sopenharmony_ci (u8 *) &data->buffer); 2218c2ecf20Sopenharmony_ci 2228c2ecf20Sopenharmony_ci return (ret == MAX30100_REG_FIFO_DATA_ENTRY_LEN) ? 0 : ret; 2238c2ecf20Sopenharmony_ci} 2248c2ecf20Sopenharmony_ci 2258c2ecf20Sopenharmony_cistatic irqreturn_t max30100_interrupt_handler(int irq, void *private) 2268c2ecf20Sopenharmony_ci{ 2278c2ecf20Sopenharmony_ci struct iio_dev *indio_dev = private; 2288c2ecf20Sopenharmony_ci struct max30100_data *data = iio_priv(indio_dev); 2298c2ecf20Sopenharmony_ci int ret, cnt = 0; 2308c2ecf20Sopenharmony_ci 2318c2ecf20Sopenharmony_ci mutex_lock(&data->lock); 2328c2ecf20Sopenharmony_ci 2338c2ecf20Sopenharmony_ci while (cnt || (cnt = max30100_fifo_count(data)) > 0) { 2348c2ecf20Sopenharmony_ci ret = max30100_read_measurement(data); 2358c2ecf20Sopenharmony_ci if (ret) 2368c2ecf20Sopenharmony_ci break; 2378c2ecf20Sopenharmony_ci 2388c2ecf20Sopenharmony_ci iio_push_to_buffers(data->indio_dev, data->buffer); 2398c2ecf20Sopenharmony_ci cnt--; 2408c2ecf20Sopenharmony_ci } 2418c2ecf20Sopenharmony_ci 2428c2ecf20Sopenharmony_ci mutex_unlock(&data->lock); 2438c2ecf20Sopenharmony_ci 2448c2ecf20Sopenharmony_ci return IRQ_HANDLED; 2458c2ecf20Sopenharmony_ci} 2468c2ecf20Sopenharmony_ci 2478c2ecf20Sopenharmony_cistatic int max30100_get_current_idx(unsigned int val, int *reg) 2488c2ecf20Sopenharmony_ci{ 2498c2ecf20Sopenharmony_ci int idx; 2508c2ecf20Sopenharmony_ci 2518c2ecf20Sopenharmony_ci /* LED turned off */ 2528c2ecf20Sopenharmony_ci if (val == 0) { 2538c2ecf20Sopenharmony_ci *reg = 0; 2548c2ecf20Sopenharmony_ci return 0; 2558c2ecf20Sopenharmony_ci } 2568c2ecf20Sopenharmony_ci 2578c2ecf20Sopenharmony_ci for (idx = 0; idx < ARRAY_SIZE(max30100_led_current_mapping); idx++) { 2588c2ecf20Sopenharmony_ci if (max30100_led_current_mapping[idx] == val) { 2598c2ecf20Sopenharmony_ci *reg = idx + 1; 2608c2ecf20Sopenharmony_ci return 0; 2618c2ecf20Sopenharmony_ci } 2628c2ecf20Sopenharmony_ci } 2638c2ecf20Sopenharmony_ci 2648c2ecf20Sopenharmony_ci return -EINVAL; 2658c2ecf20Sopenharmony_ci} 2668c2ecf20Sopenharmony_ci 2678c2ecf20Sopenharmony_cistatic int max30100_led_init(struct max30100_data *data) 2688c2ecf20Sopenharmony_ci{ 2698c2ecf20Sopenharmony_ci struct device *dev = &data->client->dev; 2708c2ecf20Sopenharmony_ci unsigned int val[2]; 2718c2ecf20Sopenharmony_ci int reg, ret; 2728c2ecf20Sopenharmony_ci 2738c2ecf20Sopenharmony_ci ret = device_property_read_u32_array(dev, "maxim,led-current-microamp", 2748c2ecf20Sopenharmony_ci (unsigned int *) &val, 2); 2758c2ecf20Sopenharmony_ci if (ret) { 2768c2ecf20Sopenharmony_ci /* Default to 24 mA RED LED, 50 mA IR LED */ 2778c2ecf20Sopenharmony_ci reg = (MAX30100_REG_LED_CONFIG_24MA << 2788c2ecf20Sopenharmony_ci MAX30100_REG_LED_CONFIG_RED_LED_SHIFT) | 2798c2ecf20Sopenharmony_ci MAX30100_REG_LED_CONFIG_50MA; 2808c2ecf20Sopenharmony_ci dev_warn(dev, "no led-current-microamp set"); 2818c2ecf20Sopenharmony_ci 2828c2ecf20Sopenharmony_ci return regmap_write(data->regmap, MAX30100_REG_LED_CONFIG, reg); 2838c2ecf20Sopenharmony_ci } 2848c2ecf20Sopenharmony_ci 2858c2ecf20Sopenharmony_ci /* RED LED current */ 2868c2ecf20Sopenharmony_ci ret = max30100_get_current_idx(val[0], ®); 2878c2ecf20Sopenharmony_ci if (ret) { 2888c2ecf20Sopenharmony_ci dev_err(dev, "invalid RED current setting %d", val[0]); 2898c2ecf20Sopenharmony_ci return ret; 2908c2ecf20Sopenharmony_ci } 2918c2ecf20Sopenharmony_ci 2928c2ecf20Sopenharmony_ci ret = regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG, 2938c2ecf20Sopenharmony_ci MAX30100_REG_LED_CONFIG_LED_MASK << 2948c2ecf20Sopenharmony_ci MAX30100_REG_LED_CONFIG_RED_LED_SHIFT, 2958c2ecf20Sopenharmony_ci reg << MAX30100_REG_LED_CONFIG_RED_LED_SHIFT); 2968c2ecf20Sopenharmony_ci if (ret) 2978c2ecf20Sopenharmony_ci return ret; 2988c2ecf20Sopenharmony_ci 2998c2ecf20Sopenharmony_ci /* IR LED current */ 3008c2ecf20Sopenharmony_ci ret = max30100_get_current_idx(val[1], ®); 3018c2ecf20Sopenharmony_ci if (ret) { 3028c2ecf20Sopenharmony_ci dev_err(dev, "invalid IR current setting %d", val[1]); 3038c2ecf20Sopenharmony_ci return ret; 3048c2ecf20Sopenharmony_ci } 3058c2ecf20Sopenharmony_ci 3068c2ecf20Sopenharmony_ci return regmap_update_bits(data->regmap, MAX30100_REG_LED_CONFIG, 3078c2ecf20Sopenharmony_ci MAX30100_REG_LED_CONFIG_LED_MASK, reg); 3088c2ecf20Sopenharmony_ci} 3098c2ecf20Sopenharmony_ci 3108c2ecf20Sopenharmony_cistatic int max30100_chip_init(struct max30100_data *data) 3118c2ecf20Sopenharmony_ci{ 3128c2ecf20Sopenharmony_ci int ret; 3138c2ecf20Sopenharmony_ci 3148c2ecf20Sopenharmony_ci /* setup LED current settings */ 3158c2ecf20Sopenharmony_ci ret = max30100_led_init(data); 3168c2ecf20Sopenharmony_ci if (ret) 3178c2ecf20Sopenharmony_ci return ret; 3188c2ecf20Sopenharmony_ci 3198c2ecf20Sopenharmony_ci /* enable hi-res SPO2 readings at 100Hz */ 3208c2ecf20Sopenharmony_ci ret = regmap_write(data->regmap, MAX30100_REG_SPO2_CONFIG, 3218c2ecf20Sopenharmony_ci MAX30100_REG_SPO2_CONFIG_HI_RES_EN | 3228c2ecf20Sopenharmony_ci MAX30100_REG_SPO2_CONFIG_100HZ); 3238c2ecf20Sopenharmony_ci if (ret) 3248c2ecf20Sopenharmony_ci return ret; 3258c2ecf20Sopenharmony_ci 3268c2ecf20Sopenharmony_ci /* enable SPO2 mode */ 3278c2ecf20Sopenharmony_ci ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG, 3288c2ecf20Sopenharmony_ci MAX30100_REG_MODE_CONFIG_MODE_MASK, 3298c2ecf20Sopenharmony_ci MAX30100_REG_MODE_CONFIG_MODE_HR_EN | 3308c2ecf20Sopenharmony_ci MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN); 3318c2ecf20Sopenharmony_ci if (ret) 3328c2ecf20Sopenharmony_ci return ret; 3338c2ecf20Sopenharmony_ci 3348c2ecf20Sopenharmony_ci /* enable FIFO interrupt */ 3358c2ecf20Sopenharmony_ci return regmap_update_bits(data->regmap, MAX30100_REG_INT_ENABLE, 3368c2ecf20Sopenharmony_ci MAX30100_REG_INT_ENABLE_MASK, 3378c2ecf20Sopenharmony_ci MAX30100_REG_INT_ENABLE_FIFO_EN 3388c2ecf20Sopenharmony_ci << MAX30100_REG_INT_ENABLE_MASK_SHIFT); 3398c2ecf20Sopenharmony_ci} 3408c2ecf20Sopenharmony_ci 3418c2ecf20Sopenharmony_cistatic int max30100_read_temp(struct max30100_data *data, int *val) 3428c2ecf20Sopenharmony_ci{ 3438c2ecf20Sopenharmony_ci int ret; 3448c2ecf20Sopenharmony_ci unsigned int reg; 3458c2ecf20Sopenharmony_ci 3468c2ecf20Sopenharmony_ci ret = regmap_read(data->regmap, MAX30100_REG_TEMP_INTEGER, ®); 3478c2ecf20Sopenharmony_ci if (ret < 0) 3488c2ecf20Sopenharmony_ci return ret; 3498c2ecf20Sopenharmony_ci *val = reg << 4; 3508c2ecf20Sopenharmony_ci 3518c2ecf20Sopenharmony_ci ret = regmap_read(data->regmap, MAX30100_REG_TEMP_FRACTION, ®); 3528c2ecf20Sopenharmony_ci if (ret < 0) 3538c2ecf20Sopenharmony_ci return ret; 3548c2ecf20Sopenharmony_ci 3558c2ecf20Sopenharmony_ci *val |= reg & 0xf; 3568c2ecf20Sopenharmony_ci *val = sign_extend32(*val, 11); 3578c2ecf20Sopenharmony_ci 3588c2ecf20Sopenharmony_ci return 0; 3598c2ecf20Sopenharmony_ci} 3608c2ecf20Sopenharmony_ci 3618c2ecf20Sopenharmony_cistatic int max30100_get_temp(struct max30100_data *data, int *val) 3628c2ecf20Sopenharmony_ci{ 3638c2ecf20Sopenharmony_ci int ret; 3648c2ecf20Sopenharmony_ci 3658c2ecf20Sopenharmony_ci /* start acquisition */ 3668c2ecf20Sopenharmony_ci ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG, 3678c2ecf20Sopenharmony_ci MAX30100_REG_MODE_CONFIG_TEMP_EN, 3688c2ecf20Sopenharmony_ci MAX30100_REG_MODE_CONFIG_TEMP_EN); 3698c2ecf20Sopenharmony_ci if (ret) 3708c2ecf20Sopenharmony_ci return ret; 3718c2ecf20Sopenharmony_ci 3728c2ecf20Sopenharmony_ci msleep(35); 3738c2ecf20Sopenharmony_ci 3748c2ecf20Sopenharmony_ci return max30100_read_temp(data, val); 3758c2ecf20Sopenharmony_ci} 3768c2ecf20Sopenharmony_ci 3778c2ecf20Sopenharmony_cistatic int max30100_read_raw(struct iio_dev *indio_dev, 3788c2ecf20Sopenharmony_ci struct iio_chan_spec const *chan, 3798c2ecf20Sopenharmony_ci int *val, int *val2, long mask) 3808c2ecf20Sopenharmony_ci{ 3818c2ecf20Sopenharmony_ci struct max30100_data *data = iio_priv(indio_dev); 3828c2ecf20Sopenharmony_ci int ret = -EINVAL; 3838c2ecf20Sopenharmony_ci 3848c2ecf20Sopenharmony_ci switch (mask) { 3858c2ecf20Sopenharmony_ci case IIO_CHAN_INFO_RAW: 3868c2ecf20Sopenharmony_ci /* 3878c2ecf20Sopenharmony_ci * Temperature reading can only be acquired while engine 3888c2ecf20Sopenharmony_ci * is running 3898c2ecf20Sopenharmony_ci */ 3908c2ecf20Sopenharmony_ci mutex_lock(&indio_dev->mlock); 3918c2ecf20Sopenharmony_ci 3928c2ecf20Sopenharmony_ci if (!iio_buffer_enabled(indio_dev)) 3938c2ecf20Sopenharmony_ci ret = -EAGAIN; 3948c2ecf20Sopenharmony_ci else { 3958c2ecf20Sopenharmony_ci ret = max30100_get_temp(data, val); 3968c2ecf20Sopenharmony_ci if (!ret) 3978c2ecf20Sopenharmony_ci ret = IIO_VAL_INT; 3988c2ecf20Sopenharmony_ci 3998c2ecf20Sopenharmony_ci } 4008c2ecf20Sopenharmony_ci 4018c2ecf20Sopenharmony_ci mutex_unlock(&indio_dev->mlock); 4028c2ecf20Sopenharmony_ci break; 4038c2ecf20Sopenharmony_ci case IIO_CHAN_INFO_SCALE: 4048c2ecf20Sopenharmony_ci *val = 1; /* 0.0625 */ 4058c2ecf20Sopenharmony_ci *val2 = 16; 4068c2ecf20Sopenharmony_ci ret = IIO_VAL_FRACTIONAL; 4078c2ecf20Sopenharmony_ci break; 4088c2ecf20Sopenharmony_ci } 4098c2ecf20Sopenharmony_ci 4108c2ecf20Sopenharmony_ci return ret; 4118c2ecf20Sopenharmony_ci} 4128c2ecf20Sopenharmony_ci 4138c2ecf20Sopenharmony_cistatic const struct iio_info max30100_info = { 4148c2ecf20Sopenharmony_ci .read_raw = max30100_read_raw, 4158c2ecf20Sopenharmony_ci}; 4168c2ecf20Sopenharmony_ci 4178c2ecf20Sopenharmony_cistatic int max30100_probe(struct i2c_client *client, 4188c2ecf20Sopenharmony_ci const struct i2c_device_id *id) 4198c2ecf20Sopenharmony_ci{ 4208c2ecf20Sopenharmony_ci struct max30100_data *data; 4218c2ecf20Sopenharmony_ci struct iio_buffer *buffer; 4228c2ecf20Sopenharmony_ci struct iio_dev *indio_dev; 4238c2ecf20Sopenharmony_ci int ret; 4248c2ecf20Sopenharmony_ci 4258c2ecf20Sopenharmony_ci indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 4268c2ecf20Sopenharmony_ci if (!indio_dev) 4278c2ecf20Sopenharmony_ci return -ENOMEM; 4288c2ecf20Sopenharmony_ci 4298c2ecf20Sopenharmony_ci buffer = devm_iio_kfifo_allocate(&client->dev); 4308c2ecf20Sopenharmony_ci if (!buffer) 4318c2ecf20Sopenharmony_ci return -ENOMEM; 4328c2ecf20Sopenharmony_ci 4338c2ecf20Sopenharmony_ci iio_device_attach_buffer(indio_dev, buffer); 4348c2ecf20Sopenharmony_ci 4358c2ecf20Sopenharmony_ci indio_dev->name = MAX30100_DRV_NAME; 4368c2ecf20Sopenharmony_ci indio_dev->channels = max30100_channels; 4378c2ecf20Sopenharmony_ci indio_dev->info = &max30100_info; 4388c2ecf20Sopenharmony_ci indio_dev->num_channels = ARRAY_SIZE(max30100_channels); 4398c2ecf20Sopenharmony_ci indio_dev->available_scan_masks = max30100_scan_masks; 4408c2ecf20Sopenharmony_ci indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE); 4418c2ecf20Sopenharmony_ci indio_dev->setup_ops = &max30100_buffer_setup_ops; 4428c2ecf20Sopenharmony_ci 4438c2ecf20Sopenharmony_ci data = iio_priv(indio_dev); 4448c2ecf20Sopenharmony_ci data->indio_dev = indio_dev; 4458c2ecf20Sopenharmony_ci data->client = client; 4468c2ecf20Sopenharmony_ci 4478c2ecf20Sopenharmony_ci mutex_init(&data->lock); 4488c2ecf20Sopenharmony_ci i2c_set_clientdata(client, indio_dev); 4498c2ecf20Sopenharmony_ci 4508c2ecf20Sopenharmony_ci data->regmap = devm_regmap_init_i2c(client, &max30100_regmap_config); 4518c2ecf20Sopenharmony_ci if (IS_ERR(data->regmap)) { 4528c2ecf20Sopenharmony_ci dev_err(&client->dev, "regmap initialization failed.\n"); 4538c2ecf20Sopenharmony_ci return PTR_ERR(data->regmap); 4548c2ecf20Sopenharmony_ci } 4558c2ecf20Sopenharmony_ci max30100_set_powermode(data, false); 4568c2ecf20Sopenharmony_ci 4578c2ecf20Sopenharmony_ci ret = max30100_chip_init(data); 4588c2ecf20Sopenharmony_ci if (ret) 4598c2ecf20Sopenharmony_ci return ret; 4608c2ecf20Sopenharmony_ci 4618c2ecf20Sopenharmony_ci if (client->irq <= 0) { 4628c2ecf20Sopenharmony_ci dev_err(&client->dev, "no valid irq defined\n"); 4638c2ecf20Sopenharmony_ci return -EINVAL; 4648c2ecf20Sopenharmony_ci } 4658c2ecf20Sopenharmony_ci ret = devm_request_threaded_irq(&client->dev, client->irq, 4668c2ecf20Sopenharmony_ci NULL, max30100_interrupt_handler, 4678c2ecf20Sopenharmony_ci IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 4688c2ecf20Sopenharmony_ci "max30100_irq", indio_dev); 4698c2ecf20Sopenharmony_ci if (ret) { 4708c2ecf20Sopenharmony_ci dev_err(&client->dev, "request irq (%d) failed\n", client->irq); 4718c2ecf20Sopenharmony_ci return ret; 4728c2ecf20Sopenharmony_ci } 4738c2ecf20Sopenharmony_ci 4748c2ecf20Sopenharmony_ci return iio_device_register(indio_dev); 4758c2ecf20Sopenharmony_ci} 4768c2ecf20Sopenharmony_ci 4778c2ecf20Sopenharmony_cistatic int max30100_remove(struct i2c_client *client) 4788c2ecf20Sopenharmony_ci{ 4798c2ecf20Sopenharmony_ci struct iio_dev *indio_dev = i2c_get_clientdata(client); 4808c2ecf20Sopenharmony_ci struct max30100_data *data = iio_priv(indio_dev); 4818c2ecf20Sopenharmony_ci 4828c2ecf20Sopenharmony_ci iio_device_unregister(indio_dev); 4838c2ecf20Sopenharmony_ci max30100_set_powermode(data, false); 4848c2ecf20Sopenharmony_ci 4858c2ecf20Sopenharmony_ci return 0; 4868c2ecf20Sopenharmony_ci} 4878c2ecf20Sopenharmony_ci 4888c2ecf20Sopenharmony_cistatic const struct i2c_device_id max30100_id[] = { 4898c2ecf20Sopenharmony_ci { "max30100", 0 }, 4908c2ecf20Sopenharmony_ci {} 4918c2ecf20Sopenharmony_ci}; 4928c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(i2c, max30100_id); 4938c2ecf20Sopenharmony_ci 4948c2ecf20Sopenharmony_cistatic const struct of_device_id max30100_dt_ids[] = { 4958c2ecf20Sopenharmony_ci { .compatible = "maxim,max30100" }, 4968c2ecf20Sopenharmony_ci { } 4978c2ecf20Sopenharmony_ci}; 4988c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, max30100_dt_ids); 4998c2ecf20Sopenharmony_ci 5008c2ecf20Sopenharmony_cistatic struct i2c_driver max30100_driver = { 5018c2ecf20Sopenharmony_ci .driver = { 5028c2ecf20Sopenharmony_ci .name = MAX30100_DRV_NAME, 5038c2ecf20Sopenharmony_ci .of_match_table = max30100_dt_ids, 5048c2ecf20Sopenharmony_ci }, 5058c2ecf20Sopenharmony_ci .probe = max30100_probe, 5068c2ecf20Sopenharmony_ci .remove = max30100_remove, 5078c2ecf20Sopenharmony_ci .id_table = max30100_id, 5088c2ecf20Sopenharmony_ci}; 5098c2ecf20Sopenharmony_cimodule_i2c_driver(max30100_driver); 5108c2ecf20Sopenharmony_ci 5118c2ecf20Sopenharmony_ciMODULE_AUTHOR("Matt Ranostay <matt.ranostay@konsulko.com>"); 5128c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("MAX30100 heart rate and pulse oximeter sensor"); 5138c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 514