18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * This file is part of AD5686 DAC driver
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright 2018 Analog Devices Inc.
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#ifndef __DRIVERS_IIO_DAC_AD5686_H__
98c2ecf20Sopenharmony_ci#define __DRIVERS_IIO_DAC_AD5686_H__
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#include <linux/types.h>
128c2ecf20Sopenharmony_ci#include <linux/cache.h>
138c2ecf20Sopenharmony_ci#include <linux/mutex.h>
148c2ecf20Sopenharmony_ci#include <linux/kernel.h>
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci#define AD5310_CMD(x)				((x) << 12)
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci#define AD5683_DATA(x)				((x) << 4)
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci#define AD5686_ADDR(x)				((x) << 16)
218c2ecf20Sopenharmony_ci#define AD5686_CMD(x)				((x) << 20)
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci#define AD5686_ADDR_DAC(chan)			(0x1 << (chan))
248c2ecf20Sopenharmony_ci#define AD5686_ADDR_ALL_DAC			0xF
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci#define AD5686_CMD_NOOP				0x0
278c2ecf20Sopenharmony_ci#define AD5686_CMD_WRITE_INPUT_N		0x1
288c2ecf20Sopenharmony_ci#define AD5686_CMD_UPDATE_DAC_N			0x2
298c2ecf20Sopenharmony_ci#define AD5686_CMD_WRITE_INPUT_N_UPDATE_N	0x3
308c2ecf20Sopenharmony_ci#define AD5686_CMD_POWERDOWN_DAC		0x4
318c2ecf20Sopenharmony_ci#define AD5686_CMD_LDAC_MASK			0x5
328c2ecf20Sopenharmony_ci#define AD5686_CMD_RESET			0x6
338c2ecf20Sopenharmony_ci#define AD5686_CMD_INTERNAL_REFER_SETUP		0x7
348c2ecf20Sopenharmony_ci#define AD5686_CMD_DAISY_CHAIN_ENABLE		0x8
358c2ecf20Sopenharmony_ci#define AD5686_CMD_READBACK_ENABLE		0x9
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci#define AD5686_LDAC_PWRDN_NONE			0x0
388c2ecf20Sopenharmony_ci#define AD5686_LDAC_PWRDN_1K			0x1
398c2ecf20Sopenharmony_ci#define AD5686_LDAC_PWRDN_100K			0x2
408c2ecf20Sopenharmony_ci#define AD5686_LDAC_PWRDN_3STATE		0x3
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci#define AD5686_CMD_CONTROL_REG			0x4
438c2ecf20Sopenharmony_ci#define AD5686_CMD_READBACK_ENABLE_V2		0x5
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci#define AD5310_REF_BIT_MSK			BIT(8)
468c2ecf20Sopenharmony_ci#define AD5683_REF_BIT_MSK			BIT(12)
478c2ecf20Sopenharmony_ci#define AD5693_REF_BIT_MSK			BIT(12)
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci/**
508c2ecf20Sopenharmony_ci * ad5686_supported_device_ids:
518c2ecf20Sopenharmony_ci */
528c2ecf20Sopenharmony_cienum ad5686_supported_device_ids {
538c2ecf20Sopenharmony_ci	ID_AD5310R,
548c2ecf20Sopenharmony_ci	ID_AD5311R,
558c2ecf20Sopenharmony_ci	ID_AD5671R,
568c2ecf20Sopenharmony_ci	ID_AD5672R,
578c2ecf20Sopenharmony_ci	ID_AD5674R,
588c2ecf20Sopenharmony_ci	ID_AD5675R,
598c2ecf20Sopenharmony_ci	ID_AD5676,
608c2ecf20Sopenharmony_ci	ID_AD5676R,
618c2ecf20Sopenharmony_ci	ID_AD5679R,
628c2ecf20Sopenharmony_ci	ID_AD5681R,
638c2ecf20Sopenharmony_ci	ID_AD5682R,
648c2ecf20Sopenharmony_ci	ID_AD5683,
658c2ecf20Sopenharmony_ci	ID_AD5683R,
668c2ecf20Sopenharmony_ci	ID_AD5684,
678c2ecf20Sopenharmony_ci	ID_AD5684R,
688c2ecf20Sopenharmony_ci	ID_AD5685R,
698c2ecf20Sopenharmony_ci	ID_AD5686,
708c2ecf20Sopenharmony_ci	ID_AD5686R,
718c2ecf20Sopenharmony_ci	ID_AD5691R,
728c2ecf20Sopenharmony_ci	ID_AD5692R,
738c2ecf20Sopenharmony_ci	ID_AD5693,
748c2ecf20Sopenharmony_ci	ID_AD5693R,
758c2ecf20Sopenharmony_ci	ID_AD5694,
768c2ecf20Sopenharmony_ci	ID_AD5694R,
778c2ecf20Sopenharmony_ci	ID_AD5695R,
788c2ecf20Sopenharmony_ci	ID_AD5696,
798c2ecf20Sopenharmony_ci	ID_AD5696R,
808c2ecf20Sopenharmony_ci};
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_cienum ad5686_regmap_type {
838c2ecf20Sopenharmony_ci	AD5310_REGMAP,
848c2ecf20Sopenharmony_ci	AD5683_REGMAP,
858c2ecf20Sopenharmony_ci	AD5686_REGMAP,
868c2ecf20Sopenharmony_ci	AD5693_REGMAP
878c2ecf20Sopenharmony_ci};
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_cistruct ad5686_state;
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_citypedef int (*ad5686_write_func)(struct ad5686_state *st,
928c2ecf20Sopenharmony_ci				 u8 cmd, u8 addr, u16 val);
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_citypedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr);
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_ci/**
978c2ecf20Sopenharmony_ci * struct ad5686_chip_info - chip specific information
988c2ecf20Sopenharmony_ci * @int_vref_mv:	AD5620/40/60: the internal reference voltage
998c2ecf20Sopenharmony_ci * @num_channels:	number of channels
1008c2ecf20Sopenharmony_ci * @channel:		channel specification
1018c2ecf20Sopenharmony_ci * @regmap_type:	register map layout variant
1028c2ecf20Sopenharmony_ci */
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_cistruct ad5686_chip_info {
1058c2ecf20Sopenharmony_ci	u16				int_vref_mv;
1068c2ecf20Sopenharmony_ci	unsigned int			num_channels;
1078c2ecf20Sopenharmony_ci	const struct iio_chan_spec	*channels;
1088c2ecf20Sopenharmony_ci	enum ad5686_regmap_type		regmap_type;
1098c2ecf20Sopenharmony_ci};
1108c2ecf20Sopenharmony_ci
1118c2ecf20Sopenharmony_ci/**
1128c2ecf20Sopenharmony_ci * struct ad5446_state - driver instance specific data
1138c2ecf20Sopenharmony_ci * @spi:		spi_device
1148c2ecf20Sopenharmony_ci * @chip_info:		chip model specific constants, available modes etc
1158c2ecf20Sopenharmony_ci * @reg:		supply regulator
1168c2ecf20Sopenharmony_ci * @vref_mv:		actual reference voltage used
1178c2ecf20Sopenharmony_ci * @pwr_down_mask:	power down mask
1188c2ecf20Sopenharmony_ci * @pwr_down_mode:	current power down mode
1198c2ecf20Sopenharmony_ci * @use_internal_vref:	set to true if the internal reference voltage is used
1208c2ecf20Sopenharmony_ci * @lock		lock to protect the data buffer during regmap ops
1218c2ecf20Sopenharmony_ci * @data:		spi transfer buffers
1228c2ecf20Sopenharmony_ci */
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_cistruct ad5686_state {
1258c2ecf20Sopenharmony_ci	struct device			*dev;
1268c2ecf20Sopenharmony_ci	const struct ad5686_chip_info	*chip_info;
1278c2ecf20Sopenharmony_ci	struct regulator		*reg;
1288c2ecf20Sopenharmony_ci	unsigned short			vref_mv;
1298c2ecf20Sopenharmony_ci	unsigned int			pwr_down_mask;
1308c2ecf20Sopenharmony_ci	unsigned int			pwr_down_mode;
1318c2ecf20Sopenharmony_ci	ad5686_write_func		write;
1328c2ecf20Sopenharmony_ci	ad5686_read_func		read;
1338c2ecf20Sopenharmony_ci	bool				use_internal_vref;
1348c2ecf20Sopenharmony_ci	struct mutex			lock;
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_ci	/*
1378c2ecf20Sopenharmony_ci	 * DMA (thus cache coherency maintenance) requires the
1388c2ecf20Sopenharmony_ci	 * transfer buffers to live in their own cache lines.
1398c2ecf20Sopenharmony_ci	 */
1408c2ecf20Sopenharmony_ci
1418c2ecf20Sopenharmony_ci	union {
1428c2ecf20Sopenharmony_ci		__be32 d32;
1438c2ecf20Sopenharmony_ci		__be16 d16;
1448c2ecf20Sopenharmony_ci		u8 d8[4];
1458c2ecf20Sopenharmony_ci	} data[3] ____cacheline_aligned;
1468c2ecf20Sopenharmony_ci};
1478c2ecf20Sopenharmony_ci
1488c2ecf20Sopenharmony_ci
1498c2ecf20Sopenharmony_ciint ad5686_probe(struct device *dev,
1508c2ecf20Sopenharmony_ci		 enum ad5686_supported_device_ids chip_type,
1518c2ecf20Sopenharmony_ci		 const char *name, ad5686_write_func write,
1528c2ecf20Sopenharmony_ci		 ad5686_read_func read);
1538c2ecf20Sopenharmony_ci
1548c2ecf20Sopenharmony_ciint ad5686_remove(struct device *dev);
1558c2ecf20Sopenharmony_ci
1568c2ecf20Sopenharmony_ci
1578c2ecf20Sopenharmony_ci#endif /* __DRIVERS_IIO_DAC_AD5686_H__ */
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