18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * AD5592R / AD5593R Digital <-> Analog converters driver 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright 2015-2016 Analog Devices Inc. 68c2ecf20Sopenharmony_ci * Author: Paul Cercueil <paul.cercueil@analog.com> 78c2ecf20Sopenharmony_ci */ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#ifndef __DRIVERS_IIO_DAC_AD5592R_BASE_H__ 108c2ecf20Sopenharmony_ci#define __DRIVERS_IIO_DAC_AD5592R_BASE_H__ 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci#include <linux/types.h> 138c2ecf20Sopenharmony_ci#include <linux/cache.h> 148c2ecf20Sopenharmony_ci#include <linux/mutex.h> 158c2ecf20Sopenharmony_ci#include <linux/gpio/driver.h> 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_cistruct device; 188c2ecf20Sopenharmony_cistruct ad5592r_state; 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_cienum ad5592r_registers { 218c2ecf20Sopenharmony_ci AD5592R_REG_NOOP = 0x0, 228c2ecf20Sopenharmony_ci AD5592R_REG_DAC_READBACK = 0x1, 238c2ecf20Sopenharmony_ci AD5592R_REG_ADC_SEQ = 0x2, 248c2ecf20Sopenharmony_ci AD5592R_REG_CTRL = 0x3, 258c2ecf20Sopenharmony_ci AD5592R_REG_ADC_EN = 0x4, 268c2ecf20Sopenharmony_ci AD5592R_REG_DAC_EN = 0x5, 278c2ecf20Sopenharmony_ci AD5592R_REG_PULLDOWN = 0x6, 288c2ecf20Sopenharmony_ci AD5592R_REG_LDAC = 0x7, 298c2ecf20Sopenharmony_ci AD5592R_REG_GPIO_OUT_EN = 0x8, 308c2ecf20Sopenharmony_ci AD5592R_REG_GPIO_SET = 0x9, 318c2ecf20Sopenharmony_ci AD5592R_REG_GPIO_IN_EN = 0xA, 328c2ecf20Sopenharmony_ci AD5592R_REG_PD = 0xB, 338c2ecf20Sopenharmony_ci AD5592R_REG_OPEN_DRAIN = 0xC, 348c2ecf20Sopenharmony_ci AD5592R_REG_TRISTATE = 0xD, 358c2ecf20Sopenharmony_ci AD5592R_REG_RESET = 0xF, 368c2ecf20Sopenharmony_ci}; 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci#define AD5592R_REG_PD_EN_REF BIT(9) 398c2ecf20Sopenharmony_ci#define AD5592R_REG_CTRL_ADC_RANGE BIT(5) 408c2ecf20Sopenharmony_ci#define AD5592R_REG_CTRL_DAC_RANGE BIT(4) 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_cistruct ad5592r_rw_ops { 438c2ecf20Sopenharmony_ci int (*write_dac)(struct ad5592r_state *st, unsigned chan, u16 value); 448c2ecf20Sopenharmony_ci int (*read_adc)(struct ad5592r_state *st, unsigned chan, u16 *value); 458c2ecf20Sopenharmony_ci int (*reg_write)(struct ad5592r_state *st, u8 reg, u16 value); 468c2ecf20Sopenharmony_ci int (*reg_read)(struct ad5592r_state *st, u8 reg, u16 *value); 478c2ecf20Sopenharmony_ci int (*gpio_read)(struct ad5592r_state *st, u8 *value); 488c2ecf20Sopenharmony_ci}; 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_cistruct ad5592r_state { 518c2ecf20Sopenharmony_ci struct device *dev; 528c2ecf20Sopenharmony_ci struct regulator *reg; 538c2ecf20Sopenharmony_ci struct gpio_chip gpiochip; 548c2ecf20Sopenharmony_ci struct mutex gpio_lock; /* Protect cached gpio_out, gpio_val, etc. */ 558c2ecf20Sopenharmony_ci struct mutex lock; 568c2ecf20Sopenharmony_ci unsigned int num_channels; 578c2ecf20Sopenharmony_ci const struct ad5592r_rw_ops *ops; 588c2ecf20Sopenharmony_ci int scale_avail[2][2]; 598c2ecf20Sopenharmony_ci u16 cached_dac[8]; 608c2ecf20Sopenharmony_ci u16 cached_gp_ctrl; 618c2ecf20Sopenharmony_ci u8 channel_modes[8]; 628c2ecf20Sopenharmony_ci u8 channel_offstate[8]; 638c2ecf20Sopenharmony_ci u8 gpio_map; 648c2ecf20Sopenharmony_ci u8 gpio_out; 658c2ecf20Sopenharmony_ci u8 gpio_in; 668c2ecf20Sopenharmony_ci u8 gpio_val; 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci __be16 spi_msg ____cacheline_aligned; 698c2ecf20Sopenharmony_ci __be16 spi_msg_nop; 708c2ecf20Sopenharmony_ci}; 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ciint ad5592r_probe(struct device *dev, const char *name, 738c2ecf20Sopenharmony_ci const struct ad5592r_rw_ops *ops); 748c2ecf20Sopenharmony_ciint ad5592r_remove(struct device *dev); 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci#endif /* __DRIVERS_IIO_DAC_AD5592R_BASE_H__ */ 77