18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * AD7606 ADC driver 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright 2011 Analog Devices Inc. 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#ifndef IIO_ADC_AD7606_H_ 98c2ecf20Sopenharmony_ci#define IIO_ADC_AD7606_H_ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci#define AD760X_CHANNEL(num, mask_sep, mask_type, mask_all) { \ 128c2ecf20Sopenharmony_ci .type = IIO_VOLTAGE, \ 138c2ecf20Sopenharmony_ci .indexed = 1, \ 148c2ecf20Sopenharmony_ci .channel = num, \ 158c2ecf20Sopenharmony_ci .address = num, \ 168c2ecf20Sopenharmony_ci .info_mask_separate = mask_sep, \ 178c2ecf20Sopenharmony_ci .info_mask_shared_by_type = mask_type, \ 188c2ecf20Sopenharmony_ci .info_mask_shared_by_all = mask_all, \ 198c2ecf20Sopenharmony_ci .scan_index = num, \ 208c2ecf20Sopenharmony_ci .scan_type = { \ 218c2ecf20Sopenharmony_ci .sign = 's', \ 228c2ecf20Sopenharmony_ci .realbits = 16, \ 238c2ecf20Sopenharmony_ci .storagebits = 16, \ 248c2ecf20Sopenharmony_ci .endianness = IIO_CPU, \ 258c2ecf20Sopenharmony_ci }, \ 268c2ecf20Sopenharmony_ci} 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci#define AD7605_CHANNEL(num) \ 298c2ecf20Sopenharmony_ci AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \ 308c2ecf20Sopenharmony_ci BIT(IIO_CHAN_INFO_SCALE), 0) 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci#define AD7606_CHANNEL(num) \ 338c2ecf20Sopenharmony_ci AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW), \ 348c2ecf20Sopenharmony_ci BIT(IIO_CHAN_INFO_SCALE), \ 358c2ecf20Sopenharmony_ci BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci#define AD7616_CHANNEL(num) \ 388c2ecf20Sopenharmony_ci AD760X_CHANNEL(num, BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),\ 398c2ecf20Sopenharmony_ci 0, BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO)) 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ci/** 428c2ecf20Sopenharmony_ci * struct ad7606_chip_info - chip specific information 438c2ecf20Sopenharmony_ci * @channels: channel specification 448c2ecf20Sopenharmony_ci * @num_channels: number of channels 458c2ecf20Sopenharmony_ci * @oversampling_avail pointer to the array which stores the available 468c2ecf20Sopenharmony_ci * oversampling ratios. 478c2ecf20Sopenharmony_ci * @oversampling_num number of elements stored in oversampling_avail array 488c2ecf20Sopenharmony_ci * @os_req_reset some devices require a reset to update oversampling 498c2ecf20Sopenharmony_ci * @init_delay_ms required delay in miliseconds for initialization 508c2ecf20Sopenharmony_ci * after a restart 518c2ecf20Sopenharmony_ci */ 528c2ecf20Sopenharmony_cistruct ad7606_chip_info { 538c2ecf20Sopenharmony_ci const struct iio_chan_spec *channels; 548c2ecf20Sopenharmony_ci unsigned int num_channels; 558c2ecf20Sopenharmony_ci const unsigned int *oversampling_avail; 568c2ecf20Sopenharmony_ci unsigned int oversampling_num; 578c2ecf20Sopenharmony_ci bool os_req_reset; 588c2ecf20Sopenharmony_ci unsigned long init_delay_ms; 598c2ecf20Sopenharmony_ci}; 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci/** 628c2ecf20Sopenharmony_ci * struct ad7606_state - driver instance specific data 638c2ecf20Sopenharmony_ci * @dev pointer to kernel device 648c2ecf20Sopenharmony_ci * @chip_info entry in the table of chips that describes this device 658c2ecf20Sopenharmony_ci * @reg regulator info for the the power supply of the device 668c2ecf20Sopenharmony_ci * @bops bus operations (SPI or parallel) 678c2ecf20Sopenharmony_ci * @range voltage range selection, selects which scale to apply 688c2ecf20Sopenharmony_ci * @oversampling oversampling selection 698c2ecf20Sopenharmony_ci * @base_address address from where to read data in parallel operation 708c2ecf20Sopenharmony_ci * @sw_mode_en software mode enabled 718c2ecf20Sopenharmony_ci * @scale_avail pointer to the array which stores the available scales 728c2ecf20Sopenharmony_ci * @num_scales number of elements stored in the scale_avail array 738c2ecf20Sopenharmony_ci * @oversampling_avail pointer to the array which stores the available 748c2ecf20Sopenharmony_ci * oversampling ratios. 758c2ecf20Sopenharmony_ci * @num_os_ratios number of elements stored in oversampling_avail array 768c2ecf20Sopenharmony_ci * @write_scale pointer to the function which writes the scale 778c2ecf20Sopenharmony_ci * @write_os pointer to the function which writes the os 788c2ecf20Sopenharmony_ci * @lock protect sensor state from concurrent accesses to GPIOs 798c2ecf20Sopenharmony_ci * @gpio_convst GPIO descriptor for conversion start signal (CONVST) 808c2ecf20Sopenharmony_ci * @gpio_reset GPIO descriptor for device hard-reset 818c2ecf20Sopenharmony_ci * @gpio_range GPIO descriptor for range selection 828c2ecf20Sopenharmony_ci * @gpio_standby GPIO descriptor for stand-by signal (STBY), 838c2ecf20Sopenharmony_ci * controls power-down mode of device 848c2ecf20Sopenharmony_ci * @gpio_frstdata GPIO descriptor for reading from device when data 858c2ecf20Sopenharmony_ci * is being read on the first channel 868c2ecf20Sopenharmony_ci * @gpio_os GPIO descriptors to control oversampling on the device 878c2ecf20Sopenharmony_ci * @complete completion to indicate end of conversion 888c2ecf20Sopenharmony_ci * @trig The IIO trigger associated with the device. 898c2ecf20Sopenharmony_ci * @data buffer for reading data from the device 908c2ecf20Sopenharmony_ci * @d16 be16 buffer for reading data from the device 918c2ecf20Sopenharmony_ci */ 928c2ecf20Sopenharmony_cistruct ad7606_state { 938c2ecf20Sopenharmony_ci struct device *dev; 948c2ecf20Sopenharmony_ci const struct ad7606_chip_info *chip_info; 958c2ecf20Sopenharmony_ci struct regulator *reg; 968c2ecf20Sopenharmony_ci const struct ad7606_bus_ops *bops; 978c2ecf20Sopenharmony_ci unsigned int range[16]; 988c2ecf20Sopenharmony_ci unsigned int oversampling; 998c2ecf20Sopenharmony_ci void __iomem *base_address; 1008c2ecf20Sopenharmony_ci bool sw_mode_en; 1018c2ecf20Sopenharmony_ci const unsigned int *scale_avail; 1028c2ecf20Sopenharmony_ci unsigned int num_scales; 1038c2ecf20Sopenharmony_ci const unsigned int *oversampling_avail; 1048c2ecf20Sopenharmony_ci unsigned int num_os_ratios; 1058c2ecf20Sopenharmony_ci int (*write_scale)(struct iio_dev *indio_dev, int ch, int val); 1068c2ecf20Sopenharmony_ci int (*write_os)(struct iio_dev *indio_dev, int val); 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ci struct mutex lock; /* protect sensor state */ 1098c2ecf20Sopenharmony_ci struct gpio_desc *gpio_convst; 1108c2ecf20Sopenharmony_ci struct gpio_desc *gpio_reset; 1118c2ecf20Sopenharmony_ci struct gpio_desc *gpio_range; 1128c2ecf20Sopenharmony_ci struct gpio_desc *gpio_standby; 1138c2ecf20Sopenharmony_ci struct gpio_desc *gpio_frstdata; 1148c2ecf20Sopenharmony_ci struct gpio_descs *gpio_os; 1158c2ecf20Sopenharmony_ci struct iio_trigger *trig; 1168c2ecf20Sopenharmony_ci struct completion completion; 1178c2ecf20Sopenharmony_ci 1188c2ecf20Sopenharmony_ci /* 1198c2ecf20Sopenharmony_ci * DMA (thus cache coherency maintenance) requires the 1208c2ecf20Sopenharmony_ci * transfer buffers to live in their own cache lines. 1218c2ecf20Sopenharmony_ci * 16 * 16-bit samples + 64-bit timestamp 1228c2ecf20Sopenharmony_ci */ 1238c2ecf20Sopenharmony_ci unsigned short data[20] ____cacheline_aligned; 1248c2ecf20Sopenharmony_ci __be16 d16[2]; 1258c2ecf20Sopenharmony_ci}; 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_ci/** 1288c2ecf20Sopenharmony_ci * struct ad7606_bus_ops - driver bus operations 1298c2ecf20Sopenharmony_ci * @read_block function pointer for reading blocks of data 1308c2ecf20Sopenharmony_ci * @sw_mode_config: pointer to a function which configured the device 1318c2ecf20Sopenharmony_ci * for software mode 1328c2ecf20Sopenharmony_ci * @reg_read function pointer for reading spi register 1338c2ecf20Sopenharmony_ci * @reg_write function pointer for writing spi register 1348c2ecf20Sopenharmony_ci * @write_mask function pointer for write spi register with mask 1358c2ecf20Sopenharmony_ci * @rd_wr_cmd pointer to the function which calculates the spi address 1368c2ecf20Sopenharmony_ci */ 1378c2ecf20Sopenharmony_cistruct ad7606_bus_ops { 1388c2ecf20Sopenharmony_ci /* more methods added in future? */ 1398c2ecf20Sopenharmony_ci int (*read_block)(struct device *dev, int num, void *data); 1408c2ecf20Sopenharmony_ci int (*sw_mode_config)(struct iio_dev *indio_dev); 1418c2ecf20Sopenharmony_ci int (*reg_read)(struct ad7606_state *st, unsigned int addr); 1428c2ecf20Sopenharmony_ci int (*reg_write)(struct ad7606_state *st, 1438c2ecf20Sopenharmony_ci unsigned int addr, 1448c2ecf20Sopenharmony_ci unsigned int val); 1458c2ecf20Sopenharmony_ci int (*write_mask)(struct ad7606_state *st, 1468c2ecf20Sopenharmony_ci unsigned int addr, 1478c2ecf20Sopenharmony_ci unsigned long mask, 1488c2ecf20Sopenharmony_ci unsigned int val); 1498c2ecf20Sopenharmony_ci u16 (*rd_wr_cmd)(int addr, char isWriteOp); 1508c2ecf20Sopenharmony_ci}; 1518c2ecf20Sopenharmony_ci 1528c2ecf20Sopenharmony_ciint ad7606_probe(struct device *dev, int irq, void __iomem *base_address, 1538c2ecf20Sopenharmony_ci const char *name, unsigned int id, 1548c2ecf20Sopenharmony_ci const struct ad7606_bus_ops *bops); 1558c2ecf20Sopenharmony_ci 1568c2ecf20Sopenharmony_cienum ad7606_supported_device_ids { 1578c2ecf20Sopenharmony_ci ID_AD7605_4, 1588c2ecf20Sopenharmony_ci ID_AD7606_8, 1598c2ecf20Sopenharmony_ci ID_AD7606_6, 1608c2ecf20Sopenharmony_ci ID_AD7606_4, 1618c2ecf20Sopenharmony_ci ID_AD7606B, 1628c2ecf20Sopenharmony_ci ID_AD7616, 1638c2ecf20Sopenharmony_ci}; 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_ci#ifdef CONFIG_PM_SLEEP 1668c2ecf20Sopenharmony_ciextern const struct dev_pm_ops ad7606_pm_ops; 1678c2ecf20Sopenharmony_ci#define AD7606_PM_OPS (&ad7606_pm_ops) 1688c2ecf20Sopenharmony_ci#else 1698c2ecf20Sopenharmony_ci#define AD7606_PM_OPS NULL 1708c2ecf20Sopenharmony_ci#endif 1718c2ecf20Sopenharmony_ci 1728c2ecf20Sopenharmony_ci#endif /* IIO_ADC_AD7606_H_ */ 173