xref: /kernel/linux/linux-5.10/drivers/iio/adc/ad7298.c (revision 8c2ecf20)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * AD7298 SPI ADC driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 */
7
8#include <linux/device.h>
9#include <linux/kernel.h>
10#include <linux/slab.h>
11#include <linux/sysfs.h>
12#include <linux/spi/spi.h>
13#include <linux/regulator/consumer.h>
14#include <linux/err.h>
15#include <linux/delay.h>
16#include <linux/module.h>
17#include <linux/interrupt.h>
18#include <linux/bitops.h>
19
20#include <linux/iio/iio.h>
21#include <linux/iio/sysfs.h>
22#include <linux/iio/buffer.h>
23#include <linux/iio/trigger_consumer.h>
24#include <linux/iio/triggered_buffer.h>
25
26#include <linux/platform_data/ad7298.h>
27
28#define AD7298_WRITE	BIT(15) /* write to the control register */
29#define AD7298_REPEAT	BIT(14) /* repeated conversion enable */
30#define AD7298_CH(x)	BIT(13 - (x)) /* channel select */
31#define AD7298_TSENSE	BIT(5) /* temperature conversion enable */
32#define AD7298_EXTREF	BIT(2) /* external reference enable */
33#define AD7298_TAVG	BIT(1) /* temperature sensor averaging enable */
34#define AD7298_PDD	BIT(0) /* partial power down enable */
35
36#define AD7298_MAX_CHAN		8
37#define AD7298_INTREF_mV	2500
38
39#define AD7298_CH_TEMP		9
40
41struct ad7298_state {
42	struct spi_device		*spi;
43	struct regulator		*reg;
44	unsigned			ext_ref;
45	struct spi_transfer		ring_xfer[10];
46	struct spi_transfer		scan_single_xfer[3];
47	struct spi_message		ring_msg;
48	struct spi_message		scan_single_msg;
49	/*
50	 * DMA (thus cache coherency maintenance) requires the
51	 * transfer buffers to live in their own cache lines.
52	 */
53	__be16				rx_buf[12] ____cacheline_aligned;
54	__be16				tx_buf[2];
55};
56
57#define AD7298_V_CHAN(index)						\
58	{								\
59		.type = IIO_VOLTAGE,					\
60		.indexed = 1,						\
61		.channel = index,					\
62		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),		\
63		.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),	\
64		.address = index,					\
65		.scan_index = index,					\
66		.scan_type = {						\
67			.sign = 'u',					\
68			.realbits = 12,					\
69			.storagebits = 16,				\
70			.endianness = IIO_BE,				\
71		},							\
72	}
73
74static const struct iio_chan_spec ad7298_channels[] = {
75	{
76		.type = IIO_TEMP,
77		.indexed = 1,
78		.channel = 0,
79		.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
80			BIT(IIO_CHAN_INFO_SCALE) |
81			BIT(IIO_CHAN_INFO_OFFSET),
82		.address = AD7298_CH_TEMP,
83		.scan_index = -1,
84		.scan_type = {
85			.sign = 's',
86			.realbits = 32,
87			.storagebits = 32,
88		},
89	},
90	AD7298_V_CHAN(0),
91	AD7298_V_CHAN(1),
92	AD7298_V_CHAN(2),
93	AD7298_V_CHAN(3),
94	AD7298_V_CHAN(4),
95	AD7298_V_CHAN(5),
96	AD7298_V_CHAN(6),
97	AD7298_V_CHAN(7),
98	IIO_CHAN_SOFT_TIMESTAMP(8),
99};
100
101/*
102 * ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask
103 */
104static int ad7298_update_scan_mode(struct iio_dev *indio_dev,
105	const unsigned long *active_scan_mask)
106{
107	struct ad7298_state *st = iio_priv(indio_dev);
108	int i, m;
109	unsigned short command;
110	int scan_count;
111
112	/* Now compute overall size */
113	scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength);
114
115	command = AD7298_WRITE | st->ext_ref;
116
117	for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1)
118		if (test_bit(i, active_scan_mask))
119			command |= m;
120
121	st->tx_buf[0] = cpu_to_be16(command);
122
123	/* build spi ring message */
124	st->ring_xfer[0].tx_buf = &st->tx_buf[0];
125	st->ring_xfer[0].len = 2;
126	st->ring_xfer[0].cs_change = 1;
127	st->ring_xfer[1].tx_buf = &st->tx_buf[1];
128	st->ring_xfer[1].len = 2;
129	st->ring_xfer[1].cs_change = 1;
130
131	spi_message_init(&st->ring_msg);
132	spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
133	spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg);
134
135	for (i = 0; i < scan_count; i++) {
136		st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i];
137		st->ring_xfer[i + 2].len = 2;
138		st->ring_xfer[i + 2].cs_change = 1;
139		spi_message_add_tail(&st->ring_xfer[i + 2], &st->ring_msg);
140	}
141	/* make sure last transfer cs_change is not set */
142	st->ring_xfer[i + 1].cs_change = 0;
143
144	return 0;
145}
146
147/*
148 * ad7298_trigger_handler() bh of trigger launched polling to ring buffer
149 *
150 * Currently there is no option in this driver to disable the saving of
151 * timestamps within the ring.
152 */
153static irqreturn_t ad7298_trigger_handler(int irq, void *p)
154{
155	struct iio_poll_func *pf = p;
156	struct iio_dev *indio_dev = pf->indio_dev;
157	struct ad7298_state *st = iio_priv(indio_dev);
158	int b_sent;
159
160	b_sent = spi_sync(st->spi, &st->ring_msg);
161	if (b_sent)
162		goto done;
163
164	iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
165		iio_get_time_ns(indio_dev));
166
167done:
168	iio_trigger_notify_done(indio_dev->trig);
169
170	return IRQ_HANDLED;
171}
172
173static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch)
174{
175	int ret;
176	st->tx_buf[0] = cpu_to_be16(AD7298_WRITE | st->ext_ref |
177				   (AD7298_CH(0) >> ch));
178
179	ret = spi_sync(st->spi, &st->scan_single_msg);
180	if (ret)
181		return ret;
182
183	return be16_to_cpu(st->rx_buf[0]);
184}
185
186static int ad7298_scan_temp(struct ad7298_state *st, int *val)
187{
188	int ret;
189	__be16 buf;
190
191	buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE |
192			  AD7298_TAVG | st->ext_ref);
193
194	ret = spi_write(st->spi, (u8 *)&buf, 2);
195	if (ret)
196		return ret;
197
198	buf = cpu_to_be16(0);
199
200	ret = spi_write(st->spi, (u8 *)&buf, 2);
201	if (ret)
202		return ret;
203
204	usleep_range(101, 1000); /* sleep > 100us */
205
206	ret = spi_read(st->spi, (u8 *)&buf, 2);
207	if (ret)
208		return ret;
209
210	*val = sign_extend32(be16_to_cpu(buf), 11);
211
212	return 0;
213}
214
215static int ad7298_get_ref_voltage(struct ad7298_state *st)
216{
217	int vref;
218
219	if (st->ext_ref) {
220		vref = regulator_get_voltage(st->reg);
221		if (vref < 0)
222			return vref;
223
224		return vref / 1000;
225	} else {
226		return AD7298_INTREF_mV;
227	}
228}
229
230static int ad7298_read_raw(struct iio_dev *indio_dev,
231			   struct iio_chan_spec const *chan,
232			   int *val,
233			   int *val2,
234			   long m)
235{
236	int ret;
237	struct ad7298_state *st = iio_priv(indio_dev);
238
239	switch (m) {
240	case IIO_CHAN_INFO_RAW:
241		ret = iio_device_claim_direct_mode(indio_dev);
242		if (ret)
243			return ret;
244
245		if (chan->address == AD7298_CH_TEMP)
246			ret = ad7298_scan_temp(st, val);
247		else
248			ret = ad7298_scan_direct(st, chan->address);
249
250		iio_device_release_direct_mode(indio_dev);
251
252		if (ret < 0)
253			return ret;
254
255		if (chan->address != AD7298_CH_TEMP)
256			*val = ret & GENMASK(chan->scan_type.realbits - 1, 0);
257
258		return IIO_VAL_INT;
259	case IIO_CHAN_INFO_SCALE:
260		switch (chan->type) {
261		case IIO_VOLTAGE:
262			*val = ad7298_get_ref_voltage(st);
263			*val2 = chan->scan_type.realbits;
264			return IIO_VAL_FRACTIONAL_LOG2;
265		case IIO_TEMP:
266			*val = ad7298_get_ref_voltage(st);
267			*val2 = 10;
268			return IIO_VAL_FRACTIONAL;
269		default:
270			return -EINVAL;
271		}
272	case IIO_CHAN_INFO_OFFSET:
273		*val = 1093 - 2732500 / ad7298_get_ref_voltage(st);
274		return IIO_VAL_INT;
275	}
276	return -EINVAL;
277}
278
279static const struct iio_info ad7298_info = {
280	.read_raw = &ad7298_read_raw,
281	.update_scan_mode = ad7298_update_scan_mode,
282};
283
284static int ad7298_probe(struct spi_device *spi)
285{
286	struct ad7298_platform_data *pdata = spi->dev.platform_data;
287	struct ad7298_state *st;
288	struct iio_dev *indio_dev;
289	int ret;
290
291	indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
292	if (indio_dev == NULL)
293		return -ENOMEM;
294
295	st = iio_priv(indio_dev);
296
297	if (pdata && pdata->ext_ref)
298		st->ext_ref = AD7298_EXTREF;
299
300	if (st->ext_ref) {
301		st->reg = devm_regulator_get(&spi->dev, "vref");
302		if (IS_ERR(st->reg))
303			return PTR_ERR(st->reg);
304
305		ret = regulator_enable(st->reg);
306		if (ret)
307			return ret;
308	}
309
310	spi_set_drvdata(spi, indio_dev);
311
312	st->spi = spi;
313
314	indio_dev->name = spi_get_device_id(spi)->name;
315	indio_dev->modes = INDIO_DIRECT_MODE;
316	indio_dev->channels = ad7298_channels;
317	indio_dev->num_channels = ARRAY_SIZE(ad7298_channels);
318	indio_dev->info = &ad7298_info;
319
320	/* Setup default message */
321
322	st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
323	st->scan_single_xfer[0].len = 2;
324	st->scan_single_xfer[0].cs_change = 1;
325	st->scan_single_xfer[1].tx_buf = &st->tx_buf[1];
326	st->scan_single_xfer[1].len = 2;
327	st->scan_single_xfer[1].cs_change = 1;
328	st->scan_single_xfer[2].rx_buf = &st->rx_buf[0];
329	st->scan_single_xfer[2].len = 2;
330
331	spi_message_init(&st->scan_single_msg);
332	spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
333	spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
334	spi_message_add_tail(&st->scan_single_xfer[2], &st->scan_single_msg);
335
336	ret = iio_triggered_buffer_setup(indio_dev, NULL,
337			&ad7298_trigger_handler, NULL);
338	if (ret)
339		goto error_disable_reg;
340
341	ret = iio_device_register(indio_dev);
342	if (ret)
343		goto error_cleanup_ring;
344
345	return 0;
346
347error_cleanup_ring:
348	iio_triggered_buffer_cleanup(indio_dev);
349error_disable_reg:
350	if (st->ext_ref)
351		regulator_disable(st->reg);
352
353	return ret;
354}
355
356static int ad7298_remove(struct spi_device *spi)
357{
358	struct iio_dev *indio_dev = spi_get_drvdata(spi);
359	struct ad7298_state *st = iio_priv(indio_dev);
360
361	iio_device_unregister(indio_dev);
362	iio_triggered_buffer_cleanup(indio_dev);
363	if (st->ext_ref)
364		regulator_disable(st->reg);
365
366	return 0;
367}
368
369static const struct spi_device_id ad7298_id[] = {
370	{"ad7298", 0},
371	{}
372};
373MODULE_DEVICE_TABLE(spi, ad7298_id);
374
375static struct spi_driver ad7298_driver = {
376	.driver = {
377		.name	= "ad7298",
378	},
379	.probe		= ad7298_probe,
380	.remove		= ad7298_remove,
381	.id_table	= ad7298_id,
382};
383module_spi_driver(ad7298_driver);
384
385MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
386MODULE_DESCRIPTION("Analog Devices AD7298 ADC");
387MODULE_LICENSE("GPL v2");
388