1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Register constants and other forward declarations needed by the bma400
4 * sources.
5 *
6 * Copyright 2019 Dan Robertson <dan@dlrobertson.com>
7 */
8
9#ifndef _BMA400_H_
10#define _BMA400_H_
11
12#include <linux/bits.h>
13#include <linux/regmap.h>
14
15/*
16 * Read-Only Registers
17 */
18
19/* Status and ID registers */
20#define BMA400_CHIP_ID_REG          0x00
21#define BMA400_ERR_REG              0x02
22#define BMA400_STATUS_REG           0x03
23
24/* Acceleration registers */
25#define BMA400_X_AXIS_LSB_REG       0x04
26#define BMA400_X_AXIS_MSB_REG       0x05
27#define BMA400_Y_AXIS_LSB_REG       0x06
28#define BMA400_Y_AXIS_MSB_REG       0x07
29#define BMA400_Z_AXIS_LSB_REG       0x08
30#define BMA400_Z_AXIS_MSB_REG       0x09
31
32/* Sensor time registers */
33#define BMA400_SENSOR_TIME0         0x0a
34#define BMA400_SENSOR_TIME1         0x0b
35#define BMA400_SENSOR_TIME2         0x0c
36
37/* Event and interrupt registers */
38#define BMA400_EVENT_REG            0x0d
39#define BMA400_INT_STAT0_REG        0x0e
40#define BMA400_INT_STAT1_REG        0x0f
41#define BMA400_INT_STAT2_REG        0x10
42
43/* Temperature register */
44#define BMA400_TEMP_DATA_REG        0x11
45
46/* FIFO length and data registers */
47#define BMA400_FIFO_LENGTH0_REG     0x12
48#define BMA400_FIFO_LENGTH1_REG     0x13
49#define BMA400_FIFO_DATA_REG        0x14
50
51/* Step count registers */
52#define BMA400_STEP_CNT0_REG        0x15
53#define BMA400_STEP_CNT1_REG        0x16
54#define BMA400_STEP_CNT3_REG        0x17
55#define BMA400_STEP_STAT_REG        0x18
56
57/*
58 * Read-write configuration registers
59 */
60#define BMA400_ACC_CONFIG0_REG      0x19
61#define BMA400_ACC_CONFIG1_REG      0x1a
62#define BMA400_ACC_CONFIG2_REG      0x1b
63#define BMA400_CMD_REG              0x7e
64
65/* Chip ID of BMA 400 devices found in the chip ID register. */
66#define BMA400_ID_REG_VAL           0x90
67
68#define BMA400_LP_OSR_SHIFT         5
69#define BMA400_NP_OSR_SHIFT         4
70#define BMA400_SCALE_SHIFT          6
71
72#define BMA400_TWO_BITS_MASK        GENMASK(1, 0)
73#define BMA400_LP_OSR_MASK          GENMASK(6, 5)
74#define BMA400_NP_OSR_MASK          GENMASK(5, 4)
75#define BMA400_ACC_ODR_MASK         GENMASK(3, 0)
76#define BMA400_ACC_SCALE_MASK       GENMASK(7, 6)
77
78#define BMA400_ACC_ODR_MIN_RAW      0x05
79#define BMA400_ACC_ODR_LP_RAW       0x06
80#define BMA400_ACC_ODR_MAX_RAW      0x0b
81
82#define BMA400_ACC_ODR_MAX_HZ       800
83#define BMA400_ACC_ODR_MIN_WHOLE_HZ 25
84#define BMA400_ACC_ODR_MIN_HZ       12
85
86/*
87 * BMA400_SCALE_MIN macro value represents m/s^2 for 1 LSB before
88 * converting to micro values for +-2g range.
89 *
90 * For +-2g - 1 LSB = 0.976562 milli g = 0.009576 m/s^2
91 * For +-4g - 1 LSB = 1.953125 milli g = 0.019153 m/s^2
92 * For +-16g - 1 LSB = 7.8125 milli g = 0.076614 m/s^2
93 *
94 * The raw value which is used to select the different ranges is determined
95 * by the first bit set position from the scale value, so BMA400_SCALE_MIN
96 * should be odd.
97 *
98 * Scale values for +-2g, +-4g, +-8g and +-16g are populated into bma400_scales
99 * array by left shifting BMA400_SCALE_MIN.
100 * e.g.:
101 * To select +-2g = 9577 << 0 = raw value to write is 0.
102 * To select +-8g = 9577 << 2 = raw value to write is 2.
103 * To select +-16g = 9577 << 3 = raw value to write is 3.
104 */
105#define BMA400_SCALE_MIN            9577
106#define BMA400_SCALE_MAX            76617
107
108#define BMA400_NUM_REGULATORS       2
109#define BMA400_VDD_REGULATOR        0
110#define BMA400_VDDIO_REGULATOR      1
111
112extern const struct regmap_config bma400_regmap_config;
113
114int bma400_probe(struct device *dev, struct regmap *regmap, const char *name);
115
116int bma400_remove(struct device *dev);
117
118#endif
119