1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * bma180.c - IIO driver for Bosch BMA180 triaxial acceleration sensor 4 * 5 * Copyright 2013 Oleksandr Kravchenko <x0199363@ti.com> 6 * 7 * Support for BMA250 (c) Peter Meerwald <pmeerw@pmeerw.net> 8 * 9 * SPI is not supported by driver 10 * BMA023/BMA150/SMB380: 7-bit I2C slave address 0x38 11 * BMA180: 7-bit I2C slave address 0x40 or 0x41 12 * BMA250: 7-bit I2C slave address 0x18 or 0x19 13 * BMA254: 7-bit I2C slave address 0x18 or 0x19 14 */ 15 16#include <linux/module.h> 17#include <linux/i2c.h> 18#include <linux/interrupt.h> 19#include <linux/delay.h> 20#include <linux/of_device.h> 21#include <linux/of.h> 22#include <linux/bitops.h> 23#include <linux/regulator/consumer.h> 24#include <linux/slab.h> 25#include <linux/string.h> 26#include <linux/iio/iio.h> 27#include <linux/iio/sysfs.h> 28#include <linux/iio/buffer.h> 29#include <linux/iio/trigger.h> 30#include <linux/iio/trigger_consumer.h> 31#include <linux/iio/triggered_buffer.h> 32 33#define BMA180_DRV_NAME "bma180" 34#define BMA180_IRQ_NAME "bma180_event" 35 36enum chip_ids { 37 BMA023, 38 BMA150, 39 BMA180, 40 BMA250, 41 BMA254, 42}; 43 44struct bma180_data; 45 46struct bma180_part_info { 47 u8 chip_id; 48 const struct iio_chan_spec *channels; 49 unsigned int num_channels; 50 const int *scale_table; 51 unsigned int num_scales; 52 const int *bw_table; 53 unsigned int num_bw; 54 int temp_offset; 55 56 u8 int_reset_reg, int_reset_mask; 57 u8 sleep_reg, sleep_mask; 58 u8 bw_reg, bw_mask, bw_offset; 59 u8 scale_reg, scale_mask; 60 u8 power_reg, power_mask, lowpower_val; 61 u8 int_enable_reg, int_enable_mask; 62 u8 int_map_reg, int_enable_dataready_int1_mask; 63 u8 softreset_reg, softreset_val; 64 65 int (*chip_config)(struct bma180_data *data); 66 void (*chip_disable)(struct bma180_data *data); 67}; 68 69/* Register set */ 70#define BMA023_CTRL_REG0 0x0a 71#define BMA023_CTRL_REG1 0x0b 72#define BMA023_CTRL_REG2 0x14 73#define BMA023_CTRL_REG3 0x15 74 75#define BMA023_RANGE_MASK GENMASK(4, 3) /* Range of accel values */ 76#define BMA023_BW_MASK GENMASK(2, 0) /* Accel bandwidth */ 77#define BMA023_SLEEP BIT(0) 78#define BMA023_INT_RESET_MASK BIT(6) 79#define BMA023_NEW_DATA_INT BIT(5) /* Intr every new accel data is ready */ 80#define BMA023_RESET_VAL BIT(1) 81 82#define BMA180_CHIP_ID 0x00 /* Need to distinguish BMA180 from other */ 83#define BMA180_ACC_X_LSB 0x02 /* First of 6 registers of accel data */ 84#define BMA180_TEMP 0x08 85#define BMA180_CTRL_REG0 0x0d 86#define BMA180_RESET 0x10 87#define BMA180_BW_TCS 0x20 88#define BMA180_CTRL_REG3 0x21 89#define BMA180_TCO_Z 0x30 90#define BMA180_OFFSET_LSB1 0x35 91 92/* BMA180_CTRL_REG0 bits */ 93#define BMA180_DIS_WAKE_UP BIT(0) /* Disable wake up mode */ 94#define BMA180_SLEEP BIT(1) /* 1 - chip will sleep */ 95#define BMA180_EE_W BIT(4) /* Unlock writing to addr from 0x20 */ 96#define BMA180_RESET_INT BIT(6) /* Reset pending interrupts */ 97 98/* BMA180_CTRL_REG3 bits */ 99#define BMA180_NEW_DATA_INT BIT(1) /* Intr every new accel data is ready */ 100 101/* BMA180_OFFSET_LSB1 skipping mode bit */ 102#define BMA180_SMP_SKIP BIT(0) 103 104/* Bit masks for registers bit fields */ 105#define BMA180_RANGE 0x0e /* Range of measured accel values */ 106#define BMA180_BW 0xf0 /* Accel bandwidth */ 107#define BMA180_MODE_CONFIG 0x03 /* Config operation modes */ 108 109/* We have to write this value in reset register to do soft reset */ 110#define BMA180_RESET_VAL 0xb6 111 112#define BMA023_ID_REG_VAL 0x02 113#define BMA180_ID_REG_VAL 0x03 114#define BMA250_ID_REG_VAL 0x03 115#define BMA254_ID_REG_VAL 0xfa /* 250 decimal */ 116 117/* Chip power modes */ 118#define BMA180_LOW_POWER 0x03 119 120#define BMA250_RANGE_REG 0x0f 121#define BMA250_BW_REG 0x10 122#define BMA250_POWER_REG 0x11 123#define BMA250_RESET_REG 0x14 124#define BMA250_INT_ENABLE_REG 0x17 125#define BMA250_INT_MAP_REG 0x1a 126#define BMA250_INT_RESET_REG 0x21 127 128#define BMA250_RANGE_MASK GENMASK(3, 0) /* Range of accel values */ 129#define BMA250_BW_MASK GENMASK(4, 0) /* Accel bandwidth */ 130#define BMA250_BW_OFFSET 8 131#define BMA250_SUSPEND_MASK BIT(7) /* chip will sleep */ 132#define BMA250_LOWPOWER_MASK BIT(6) 133#define BMA250_DATA_INTEN_MASK BIT(4) 134#define BMA250_INT1_DATA_MASK BIT(0) 135#define BMA250_INT_RESET_MASK BIT(7) /* Reset pending interrupts */ 136 137#define BMA254_RANGE_REG 0x0f 138#define BMA254_BW_REG 0x10 139#define BMA254_POWER_REG 0x11 140#define BMA254_RESET_REG 0x14 141#define BMA254_INT_ENABLE_REG 0x17 142#define BMA254_INT_MAP_REG 0x1a 143#define BMA254_INT_RESET_REG 0x21 144 145#define BMA254_RANGE_MASK GENMASK(3, 0) /* Range of accel values */ 146#define BMA254_BW_MASK GENMASK(4, 0) /* Accel bandwidth */ 147#define BMA254_BW_OFFSET 8 148#define BMA254_SUSPEND_MASK BIT(7) /* chip will sleep */ 149#define BMA254_LOWPOWER_MASK BIT(6) 150#define BMA254_DATA_INTEN_MASK BIT(4) 151#define BMA254_INT2_DATA_MASK BIT(7) 152#define BMA254_INT1_DATA_MASK BIT(0) 153#define BMA254_INT_RESET_MASK BIT(7) /* Reset pending interrupts */ 154 155struct bma180_data { 156 struct regulator *vdd_supply; 157 struct regulator *vddio_supply; 158 struct i2c_client *client; 159 struct iio_trigger *trig; 160 const struct bma180_part_info *part_info; 161 struct iio_mount_matrix orientation; 162 struct mutex mutex; 163 bool sleep_state; 164 int scale; 165 int bw; 166 bool pmode; 167 /* Ensure timestamp is naturally aligned */ 168 struct { 169 s16 chan[4]; 170 s64 timestamp __aligned(8); 171 } scan; 172}; 173 174enum bma180_chan { 175 AXIS_X, 176 AXIS_Y, 177 AXIS_Z, 178 TEMP 179}; 180 181static int bma023_bw_table[] = { 25, 50, 100, 190, 375, 750, 1500 }; /* Hz */ 182static int bma023_scale_table[] = { 2452, 4903, 9709, }; 183 184static int bma180_bw_table[] = { 10, 20, 40, 75, 150, 300 }; /* Hz */ 185static int bma180_scale_table[] = { 1275, 1863, 2452, 3727, 4903, 9709, 19417 }; 186 187static int bma25x_bw_table[] = { 8, 16, 31, 63, 125, 250 }; /* Hz */ 188static int bma25x_scale_table[] = { 0, 0, 0, 38344, 0, 76590, 0, 0, 153180, 0, 189 0, 0, 306458 }; 190 191static int bma180_get_data_reg(struct bma180_data *data, enum bma180_chan chan) 192{ 193 int ret; 194 195 if (data->sleep_state) 196 return -EBUSY; 197 198 switch (chan) { 199 case TEMP: 200 ret = i2c_smbus_read_byte_data(data->client, BMA180_TEMP); 201 if (ret < 0) 202 dev_err(&data->client->dev, "failed to read temp register\n"); 203 break; 204 default: 205 ret = i2c_smbus_read_word_data(data->client, 206 BMA180_ACC_X_LSB + chan * 2); 207 if (ret < 0) 208 dev_err(&data->client->dev, 209 "failed to read accel_%c register\n", 210 'x' + chan); 211 } 212 213 return ret; 214} 215 216static int bma180_set_bits(struct bma180_data *data, u8 reg, u8 mask, u8 val) 217{ 218 int ret = i2c_smbus_read_byte_data(data->client, reg); 219 u8 reg_val = (ret & ~mask) | (val << (ffs(mask) - 1)); 220 221 if (ret < 0) 222 return ret; 223 224 return i2c_smbus_write_byte_data(data->client, reg, reg_val); 225} 226 227static int bma180_reset_intr(struct bma180_data *data) 228{ 229 int ret = bma180_set_bits(data, data->part_info->int_reset_reg, 230 data->part_info->int_reset_mask, 1); 231 232 if (ret) 233 dev_err(&data->client->dev, "failed to reset interrupt\n"); 234 235 return ret; 236} 237 238static int bma180_set_new_data_intr_state(struct bma180_data *data, bool state) 239{ 240 int ret = bma180_set_bits(data, data->part_info->int_enable_reg, 241 data->part_info->int_enable_mask, state); 242 if (ret) 243 goto err; 244 ret = bma180_reset_intr(data); 245 if (ret) 246 goto err; 247 248 return 0; 249 250err: 251 dev_err(&data->client->dev, 252 "failed to set new data interrupt state %d\n", state); 253 return ret; 254} 255 256static int bma180_set_sleep_state(struct bma180_data *data, bool state) 257{ 258 int ret = bma180_set_bits(data, data->part_info->sleep_reg, 259 data->part_info->sleep_mask, state); 260 261 if (ret) { 262 dev_err(&data->client->dev, 263 "failed to set sleep state %d\n", state); 264 return ret; 265 } 266 data->sleep_state = state; 267 268 return 0; 269} 270 271static int bma180_set_ee_writing_state(struct bma180_data *data, bool state) 272{ 273 int ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_EE_W, state); 274 275 if (ret) 276 dev_err(&data->client->dev, 277 "failed to set ee writing state %d\n", state); 278 279 return ret; 280} 281 282static int bma180_set_bw(struct bma180_data *data, int val) 283{ 284 int ret, i; 285 286 if (data->sleep_state) 287 return -EBUSY; 288 289 for (i = 0; i < data->part_info->num_bw; ++i) { 290 if (data->part_info->bw_table[i] == val) { 291 ret = bma180_set_bits(data, data->part_info->bw_reg, 292 data->part_info->bw_mask, 293 i + data->part_info->bw_offset); 294 if (ret) { 295 dev_err(&data->client->dev, 296 "failed to set bandwidth\n"); 297 return ret; 298 } 299 data->bw = val; 300 return 0; 301 } 302 } 303 304 return -EINVAL; 305} 306 307static int bma180_set_scale(struct bma180_data *data, int val) 308{ 309 int ret, i; 310 311 if (data->sleep_state) 312 return -EBUSY; 313 314 for (i = 0; i < data->part_info->num_scales; ++i) 315 if (data->part_info->scale_table[i] == val) { 316 ret = bma180_set_bits(data, data->part_info->scale_reg, 317 data->part_info->scale_mask, i); 318 if (ret) { 319 dev_err(&data->client->dev, 320 "failed to set scale\n"); 321 return ret; 322 } 323 data->scale = val; 324 return 0; 325 } 326 327 return -EINVAL; 328} 329 330static int bma180_set_pmode(struct bma180_data *data, bool mode) 331{ 332 u8 reg_val = mode ? data->part_info->lowpower_val : 0; 333 int ret = bma180_set_bits(data, data->part_info->power_reg, 334 data->part_info->power_mask, reg_val); 335 336 if (ret) { 337 dev_err(&data->client->dev, "failed to set power mode\n"); 338 return ret; 339 } 340 data->pmode = mode; 341 342 return 0; 343} 344 345static int bma180_soft_reset(struct bma180_data *data) 346{ 347 int ret = i2c_smbus_write_byte_data(data->client, 348 data->part_info->softreset_reg, 349 data->part_info->softreset_val); 350 351 if (ret) 352 dev_err(&data->client->dev, "failed to reset the chip\n"); 353 354 return ret; 355} 356 357static int bma180_chip_init(struct bma180_data *data) 358{ 359 /* Try to read chip_id register. It must return 0x03. */ 360 int ret = i2c_smbus_read_byte_data(data->client, BMA180_CHIP_ID); 361 362 if (ret < 0) 363 return ret; 364 if (ret != data->part_info->chip_id) { 365 dev_err(&data->client->dev, "wrong chip ID %d expected %d\n", 366 ret, data->part_info->chip_id); 367 return -ENODEV; 368 } 369 370 ret = bma180_soft_reset(data); 371 if (ret) 372 return ret; 373 /* 374 * No serial transaction should occur within minimum 10 us 375 * after soft_reset command 376 */ 377 msleep(20); 378 379 return bma180_set_new_data_intr_state(data, false); 380} 381 382static int bma023_chip_config(struct bma180_data *data) 383{ 384 int ret = bma180_chip_init(data); 385 386 if (ret) 387 goto err; 388 389 ret = bma180_set_bw(data, 50); /* 50 Hz */ 390 if (ret) 391 goto err; 392 ret = bma180_set_scale(data, 2452); /* 2 G */ 393 if (ret) 394 goto err; 395 396 return 0; 397 398err: 399 dev_err(&data->client->dev, "failed to config the chip\n"); 400 return ret; 401} 402 403static int bma180_chip_config(struct bma180_data *data) 404{ 405 int ret = bma180_chip_init(data); 406 407 if (ret) 408 goto err; 409 ret = bma180_set_pmode(data, false); 410 if (ret) 411 goto err; 412 ret = bma180_set_bits(data, BMA180_CTRL_REG0, BMA180_DIS_WAKE_UP, 1); 413 if (ret) 414 goto err; 415 ret = bma180_set_ee_writing_state(data, true); 416 if (ret) 417 goto err; 418 ret = bma180_set_bits(data, BMA180_OFFSET_LSB1, BMA180_SMP_SKIP, 1); 419 if (ret) 420 goto err; 421 ret = bma180_set_bw(data, 20); /* 20 Hz */ 422 if (ret) 423 goto err; 424 ret = bma180_set_scale(data, 2452); /* 2 G */ 425 if (ret) 426 goto err; 427 428 return 0; 429 430err: 431 dev_err(&data->client->dev, "failed to config the chip\n"); 432 return ret; 433} 434 435static int bma25x_chip_config(struct bma180_data *data) 436{ 437 int ret = bma180_chip_init(data); 438 439 if (ret) 440 goto err; 441 ret = bma180_set_pmode(data, false); 442 if (ret) 443 goto err; 444 ret = bma180_set_bw(data, 16); /* 16 Hz */ 445 if (ret) 446 goto err; 447 ret = bma180_set_scale(data, 38344); /* 2 G */ 448 if (ret) 449 goto err; 450 /* 451 * This enables dataready interrupt on the INT1 pin 452 * FIXME: support using the INT2 pin 453 */ 454 ret = bma180_set_bits(data, data->part_info->int_map_reg, 455 data->part_info->int_enable_dataready_int1_mask, 1); 456 if (ret) 457 goto err; 458 459 return 0; 460 461err: 462 dev_err(&data->client->dev, "failed to config the chip\n"); 463 return ret; 464} 465 466static void bma023_chip_disable(struct bma180_data *data) 467{ 468 if (bma180_set_sleep_state(data, true)) 469 goto err; 470 471 return; 472 473err: 474 dev_err(&data->client->dev, "failed to disable the chip\n"); 475} 476 477static void bma180_chip_disable(struct bma180_data *data) 478{ 479 if (bma180_set_new_data_intr_state(data, false)) 480 goto err; 481 if (bma180_set_ee_writing_state(data, false)) 482 goto err; 483 if (bma180_set_sleep_state(data, true)) 484 goto err; 485 486 return; 487 488err: 489 dev_err(&data->client->dev, "failed to disable the chip\n"); 490} 491 492static void bma25x_chip_disable(struct bma180_data *data) 493{ 494 if (bma180_set_new_data_intr_state(data, false)) 495 goto err; 496 if (bma180_set_sleep_state(data, true)) 497 goto err; 498 499 return; 500 501err: 502 dev_err(&data->client->dev, "failed to disable the chip\n"); 503} 504 505static ssize_t bma180_show_avail(char *buf, const int *vals, unsigned int n, 506 bool micros) 507{ 508 size_t len = 0; 509 int i; 510 511 for (i = 0; i < n; i++) { 512 if (!vals[i]) 513 continue; 514 len += scnprintf(buf + len, PAGE_SIZE - len, 515 micros ? "0.%06d " : "%d ", vals[i]); 516 } 517 buf[len - 1] = '\n'; 518 519 return len; 520} 521 522static ssize_t bma180_show_filter_freq_avail(struct device *dev, 523 struct device_attribute *attr, char *buf) 524{ 525 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev)); 526 527 return bma180_show_avail(buf, data->part_info->bw_table, 528 data->part_info->num_bw, false); 529} 530 531static ssize_t bma180_show_scale_avail(struct device *dev, 532 struct device_attribute *attr, char *buf) 533{ 534 struct bma180_data *data = iio_priv(dev_to_iio_dev(dev)); 535 536 return bma180_show_avail(buf, data->part_info->scale_table, 537 data->part_info->num_scales, true); 538} 539 540static IIO_DEVICE_ATTR(in_accel_filter_low_pass_3db_frequency_available, 541 S_IRUGO, bma180_show_filter_freq_avail, NULL, 0); 542 543static IIO_DEVICE_ATTR(in_accel_scale_available, 544 S_IRUGO, bma180_show_scale_avail, NULL, 0); 545 546static struct attribute *bma180_attributes[] = { 547 &iio_dev_attr_in_accel_filter_low_pass_3db_frequency_available. 548 dev_attr.attr, 549 &iio_dev_attr_in_accel_scale_available.dev_attr.attr, 550 NULL, 551}; 552 553static const struct attribute_group bma180_attrs_group = { 554 .attrs = bma180_attributes, 555}; 556 557static int bma180_read_raw(struct iio_dev *indio_dev, 558 struct iio_chan_spec const *chan, int *val, int *val2, 559 long mask) 560{ 561 struct bma180_data *data = iio_priv(indio_dev); 562 int ret; 563 564 switch (mask) { 565 case IIO_CHAN_INFO_RAW: 566 ret = iio_device_claim_direct_mode(indio_dev); 567 if (ret) 568 return ret; 569 570 mutex_lock(&data->mutex); 571 ret = bma180_get_data_reg(data, chan->scan_index); 572 mutex_unlock(&data->mutex); 573 iio_device_release_direct_mode(indio_dev); 574 if (ret < 0) 575 return ret; 576 if (chan->scan_type.sign == 's') { 577 *val = sign_extend32(ret >> chan->scan_type.shift, 578 chan->scan_type.realbits - 1); 579 } else { 580 *val = ret; 581 } 582 return IIO_VAL_INT; 583 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 584 *val = data->bw; 585 return IIO_VAL_INT; 586 case IIO_CHAN_INFO_SCALE: 587 switch (chan->type) { 588 case IIO_ACCEL: 589 *val = 0; 590 *val2 = data->scale; 591 return IIO_VAL_INT_PLUS_MICRO; 592 case IIO_TEMP: 593 *val = 500; 594 return IIO_VAL_INT; 595 default: 596 return -EINVAL; 597 } 598 case IIO_CHAN_INFO_OFFSET: 599 *val = data->part_info->temp_offset; 600 return IIO_VAL_INT; 601 default: 602 return -EINVAL; 603 } 604} 605 606static int bma180_write_raw(struct iio_dev *indio_dev, 607 struct iio_chan_spec const *chan, int val, int val2, long mask) 608{ 609 struct bma180_data *data = iio_priv(indio_dev); 610 int ret; 611 612 switch (mask) { 613 case IIO_CHAN_INFO_SCALE: 614 if (val) 615 return -EINVAL; 616 mutex_lock(&data->mutex); 617 ret = bma180_set_scale(data, val2); 618 mutex_unlock(&data->mutex); 619 return ret; 620 case IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY: 621 if (val2) 622 return -EINVAL; 623 mutex_lock(&data->mutex); 624 ret = bma180_set_bw(data, val); 625 mutex_unlock(&data->mutex); 626 return ret; 627 default: 628 return -EINVAL; 629 } 630} 631 632static const struct iio_info bma180_info = { 633 .attrs = &bma180_attrs_group, 634 .read_raw = bma180_read_raw, 635 .write_raw = bma180_write_raw, 636}; 637 638static const char * const bma180_power_modes[] = { "low_noise", "low_power" }; 639 640static int bma180_get_power_mode(struct iio_dev *indio_dev, 641 const struct iio_chan_spec *chan) 642{ 643 struct bma180_data *data = iio_priv(indio_dev); 644 645 return data->pmode; 646} 647 648static int bma180_set_power_mode(struct iio_dev *indio_dev, 649 const struct iio_chan_spec *chan, unsigned int mode) 650{ 651 struct bma180_data *data = iio_priv(indio_dev); 652 int ret; 653 654 mutex_lock(&data->mutex); 655 ret = bma180_set_pmode(data, mode); 656 mutex_unlock(&data->mutex); 657 658 return ret; 659} 660 661static const struct iio_mount_matrix * 662bma180_accel_get_mount_matrix(const struct iio_dev *indio_dev, 663 const struct iio_chan_spec *chan) 664{ 665 struct bma180_data *data = iio_priv(indio_dev); 666 667 return &data->orientation; 668} 669 670static const struct iio_enum bma180_power_mode_enum = { 671 .items = bma180_power_modes, 672 .num_items = ARRAY_SIZE(bma180_power_modes), 673 .get = bma180_get_power_mode, 674 .set = bma180_set_power_mode, 675}; 676 677static const struct iio_chan_spec_ext_info bma023_ext_info[] = { 678 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix), 679 { } 680}; 681 682static const struct iio_chan_spec_ext_info bma180_ext_info[] = { 683 IIO_ENUM("power_mode", IIO_SHARED_BY_TYPE, &bma180_power_mode_enum), 684 IIO_ENUM_AVAILABLE("power_mode", &bma180_power_mode_enum), 685 IIO_MOUNT_MATRIX(IIO_SHARED_BY_DIR, bma180_accel_get_mount_matrix), 686 { } 687}; 688 689#define BMA023_ACC_CHANNEL(_axis, _bits) { \ 690 .type = IIO_ACCEL, \ 691 .modified = 1, \ 692 .channel2 = IIO_MOD_##_axis, \ 693 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 694 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 695 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 696 .scan_index = AXIS_##_axis, \ 697 .scan_type = { \ 698 .sign = 's', \ 699 .realbits = _bits, \ 700 .storagebits = 16, \ 701 .shift = 16 - _bits, \ 702 }, \ 703 .ext_info = bma023_ext_info, \ 704} 705 706#define BMA150_TEMP_CHANNEL { \ 707 .type = IIO_TEMP, \ 708 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 709 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \ 710 .scan_index = TEMP, \ 711 .scan_type = { \ 712 .sign = 'u', \ 713 .realbits = 8, \ 714 .storagebits = 16, \ 715 }, \ 716} 717 718#define BMA180_ACC_CHANNEL(_axis, _bits) { \ 719 .type = IIO_ACCEL, \ 720 .modified = 1, \ 721 .channel2 = IIO_MOD_##_axis, \ 722 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 723 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 724 BIT(IIO_CHAN_INFO_LOW_PASS_FILTER_3DB_FREQUENCY), \ 725 .scan_index = AXIS_##_axis, \ 726 .scan_type = { \ 727 .sign = 's', \ 728 .realbits = _bits, \ 729 .storagebits = 16, \ 730 .shift = 16 - _bits, \ 731 }, \ 732 .ext_info = bma180_ext_info, \ 733} 734 735#define BMA180_TEMP_CHANNEL { \ 736 .type = IIO_TEMP, \ 737 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ 738 BIT(IIO_CHAN_INFO_SCALE) | BIT(IIO_CHAN_INFO_OFFSET), \ 739 .scan_index = TEMP, \ 740 .scan_type = { \ 741 .sign = 's', \ 742 .realbits = 8, \ 743 .storagebits = 16, \ 744 }, \ 745} 746 747static const struct iio_chan_spec bma023_channels[] = { 748 BMA023_ACC_CHANNEL(X, 10), 749 BMA023_ACC_CHANNEL(Y, 10), 750 BMA023_ACC_CHANNEL(Z, 10), 751 IIO_CHAN_SOFT_TIMESTAMP(4), 752}; 753 754static const struct iio_chan_spec bma150_channels[] = { 755 BMA023_ACC_CHANNEL(X, 10), 756 BMA023_ACC_CHANNEL(Y, 10), 757 BMA023_ACC_CHANNEL(Z, 10), 758 BMA150_TEMP_CHANNEL, 759 IIO_CHAN_SOFT_TIMESTAMP(4), 760}; 761 762static const struct iio_chan_spec bma180_channels[] = { 763 BMA180_ACC_CHANNEL(X, 14), 764 BMA180_ACC_CHANNEL(Y, 14), 765 BMA180_ACC_CHANNEL(Z, 14), 766 BMA180_TEMP_CHANNEL, 767 IIO_CHAN_SOFT_TIMESTAMP(4), 768}; 769 770static const struct iio_chan_spec bma250_channels[] = { 771 BMA180_ACC_CHANNEL(X, 10), 772 BMA180_ACC_CHANNEL(Y, 10), 773 BMA180_ACC_CHANNEL(Z, 10), 774 BMA180_TEMP_CHANNEL, 775 IIO_CHAN_SOFT_TIMESTAMP(4), 776}; 777 778static const struct iio_chan_spec bma254_channels[] = { 779 BMA180_ACC_CHANNEL(X, 12), 780 BMA180_ACC_CHANNEL(Y, 12), 781 BMA180_ACC_CHANNEL(Z, 12), 782 BMA180_TEMP_CHANNEL, 783 IIO_CHAN_SOFT_TIMESTAMP(4), 784}; 785 786static const struct bma180_part_info bma180_part_info[] = { 787 [BMA023] = { 788 .chip_id = BMA023_ID_REG_VAL, 789 .channels = bma023_channels, 790 .num_channels = ARRAY_SIZE(bma023_channels), 791 .scale_table = bma023_scale_table, 792 .num_scales = ARRAY_SIZE(bma023_scale_table), 793 .bw_table = bma023_bw_table, 794 .num_bw = ARRAY_SIZE(bma023_bw_table), 795 /* No temperature channel */ 796 .temp_offset = 0, 797 .int_reset_reg = BMA023_CTRL_REG0, 798 .int_reset_mask = BMA023_INT_RESET_MASK, 799 .sleep_reg = BMA023_CTRL_REG0, 800 .sleep_mask = BMA023_SLEEP, 801 .bw_reg = BMA023_CTRL_REG2, 802 .bw_mask = BMA023_BW_MASK, 803 .scale_reg = BMA023_CTRL_REG2, 804 .scale_mask = BMA023_RANGE_MASK, 805 /* No power mode on bma023 */ 806 .power_reg = 0, 807 .power_mask = 0, 808 .lowpower_val = 0, 809 .int_enable_reg = BMA023_CTRL_REG3, 810 .int_enable_mask = BMA023_NEW_DATA_INT, 811 .softreset_reg = BMA023_CTRL_REG0, 812 .softreset_val = BMA023_RESET_VAL, 813 .chip_config = bma023_chip_config, 814 .chip_disable = bma023_chip_disable, 815 }, 816 [BMA150] = { 817 .chip_id = BMA023_ID_REG_VAL, 818 .channels = bma150_channels, 819 .num_channels = ARRAY_SIZE(bma150_channels), 820 .scale_table = bma023_scale_table, 821 .num_scales = ARRAY_SIZE(bma023_scale_table), 822 .bw_table = bma023_bw_table, 823 .num_bw = ARRAY_SIZE(bma023_bw_table), 824 .temp_offset = -60, /* 0 LSB @ -30 degree C */ 825 .int_reset_reg = BMA023_CTRL_REG0, 826 .int_reset_mask = BMA023_INT_RESET_MASK, 827 .sleep_reg = BMA023_CTRL_REG0, 828 .sleep_mask = BMA023_SLEEP, 829 .bw_reg = BMA023_CTRL_REG2, 830 .bw_mask = BMA023_BW_MASK, 831 .scale_reg = BMA023_CTRL_REG2, 832 .scale_mask = BMA023_RANGE_MASK, 833 /* No power mode on bma150 */ 834 .power_reg = 0, 835 .power_mask = 0, 836 .lowpower_val = 0, 837 .int_enable_reg = BMA023_CTRL_REG3, 838 .int_enable_mask = BMA023_NEW_DATA_INT, 839 .softreset_reg = BMA023_CTRL_REG0, 840 .softreset_val = BMA023_RESET_VAL, 841 .chip_config = bma023_chip_config, 842 .chip_disable = bma023_chip_disable, 843 }, 844 [BMA180] = { 845 .chip_id = BMA180_ID_REG_VAL, 846 .channels = bma180_channels, 847 .num_channels = ARRAY_SIZE(bma180_channels), 848 .scale_table = bma180_scale_table, 849 .num_scales = ARRAY_SIZE(bma180_scale_table), 850 .bw_table = bma180_bw_table, 851 .num_bw = ARRAY_SIZE(bma180_bw_table), 852 .temp_offset = 48, /* 0 LSB @ 24 degree C */ 853 .int_reset_reg = BMA180_CTRL_REG0, 854 .int_reset_mask = BMA180_RESET_INT, 855 .sleep_reg = BMA180_CTRL_REG0, 856 .sleep_mask = BMA180_SLEEP, 857 .bw_reg = BMA180_BW_TCS, 858 .bw_mask = BMA180_BW, 859 .scale_reg = BMA180_OFFSET_LSB1, 860 .scale_mask = BMA180_RANGE, 861 .power_reg = BMA180_TCO_Z, 862 .power_mask = BMA180_MODE_CONFIG, 863 .lowpower_val = BMA180_LOW_POWER, 864 .int_enable_reg = BMA180_CTRL_REG3, 865 .int_enable_mask = BMA180_NEW_DATA_INT, 866 .softreset_reg = BMA180_RESET, 867 .softreset_val = BMA180_RESET_VAL, 868 .chip_config = bma180_chip_config, 869 .chip_disable = bma180_chip_disable, 870 }, 871 [BMA250] = { 872 .chip_id = BMA250_ID_REG_VAL, 873 .channels = bma250_channels, 874 .num_channels = ARRAY_SIZE(bma250_channels), 875 .scale_table = bma25x_scale_table, 876 .num_scales = ARRAY_SIZE(bma25x_scale_table), 877 .bw_table = bma25x_bw_table, 878 .num_bw = ARRAY_SIZE(bma25x_bw_table), 879 .temp_offset = 48, /* 0 LSB @ 24 degree C */ 880 .int_reset_reg = BMA250_INT_RESET_REG, 881 .int_reset_mask = BMA250_INT_RESET_MASK, 882 .sleep_reg = BMA250_POWER_REG, 883 .sleep_mask = BMA250_SUSPEND_MASK, 884 .bw_reg = BMA250_BW_REG, 885 .bw_mask = BMA250_BW_MASK, 886 .bw_offset = BMA250_BW_OFFSET, 887 .scale_reg = BMA250_RANGE_REG, 888 .scale_mask = BMA250_RANGE_MASK, 889 .power_reg = BMA250_POWER_REG, 890 .power_mask = BMA250_LOWPOWER_MASK, 891 .lowpower_val = 1, 892 .int_enable_reg = BMA250_INT_ENABLE_REG, 893 .int_enable_mask = BMA250_DATA_INTEN_MASK, 894 .int_map_reg = BMA250_INT_MAP_REG, 895 .int_enable_dataready_int1_mask = BMA250_INT1_DATA_MASK, 896 .softreset_reg = BMA250_RESET_REG, 897 .softreset_val = BMA180_RESET_VAL, 898 .chip_config = bma25x_chip_config, 899 .chip_disable = bma25x_chip_disable, 900 }, 901 [BMA254] = { 902 .chip_id = BMA254_ID_REG_VAL, 903 .channels = bma254_channels, 904 .num_channels = ARRAY_SIZE(bma254_channels), 905 .scale_table = bma25x_scale_table, 906 .num_scales = ARRAY_SIZE(bma25x_scale_table), 907 .bw_table = bma25x_bw_table, 908 .num_bw = ARRAY_SIZE(bma25x_bw_table), 909 .temp_offset = 46, /* 0 LSB @ 23 degree C */ 910 .int_reset_reg = BMA254_INT_RESET_REG, 911 .int_reset_mask = BMA254_INT_RESET_MASK, 912 .sleep_reg = BMA254_POWER_REG, 913 .sleep_mask = BMA254_SUSPEND_MASK, 914 .bw_reg = BMA254_BW_REG, 915 .bw_mask = BMA254_BW_MASK, 916 .bw_offset = BMA254_BW_OFFSET, 917 .scale_reg = BMA254_RANGE_REG, 918 .scale_mask = BMA254_RANGE_MASK, 919 .power_reg = BMA254_POWER_REG, 920 .power_mask = BMA254_LOWPOWER_MASK, 921 .lowpower_val = 1, 922 .int_enable_reg = BMA254_INT_ENABLE_REG, 923 .int_enable_mask = BMA254_DATA_INTEN_MASK, 924 .int_map_reg = BMA254_INT_MAP_REG, 925 .int_enable_dataready_int1_mask = BMA254_INT1_DATA_MASK, 926 .softreset_reg = BMA254_RESET_REG, 927 .softreset_val = BMA180_RESET_VAL, 928 .chip_config = bma25x_chip_config, 929 .chip_disable = bma25x_chip_disable, 930 }, 931}; 932 933static irqreturn_t bma180_trigger_handler(int irq, void *p) 934{ 935 struct iio_poll_func *pf = p; 936 struct iio_dev *indio_dev = pf->indio_dev; 937 struct bma180_data *data = iio_priv(indio_dev); 938 s64 time_ns = iio_get_time_ns(indio_dev); 939 int bit, ret, i = 0; 940 941 mutex_lock(&data->mutex); 942 943 for_each_set_bit(bit, indio_dev->active_scan_mask, 944 indio_dev->masklength) { 945 ret = bma180_get_data_reg(data, bit); 946 if (ret < 0) { 947 mutex_unlock(&data->mutex); 948 goto err; 949 } 950 data->scan.chan[i++] = ret; 951 } 952 953 mutex_unlock(&data->mutex); 954 955 iio_push_to_buffers_with_timestamp(indio_dev, &data->scan, time_ns); 956err: 957 iio_trigger_notify_done(indio_dev->trig); 958 959 return IRQ_HANDLED; 960} 961 962static int bma180_data_rdy_trigger_set_state(struct iio_trigger *trig, 963 bool state) 964{ 965 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 966 struct bma180_data *data = iio_priv(indio_dev); 967 968 return bma180_set_new_data_intr_state(data, state); 969} 970 971static int bma180_trig_try_reen(struct iio_trigger *trig) 972{ 973 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 974 struct bma180_data *data = iio_priv(indio_dev); 975 976 return bma180_reset_intr(data); 977} 978 979static const struct iio_trigger_ops bma180_trigger_ops = { 980 .set_trigger_state = bma180_data_rdy_trigger_set_state, 981 .try_reenable = bma180_trig_try_reen, 982}; 983 984static int bma180_probe(struct i2c_client *client, 985 const struct i2c_device_id *id) 986{ 987 struct device *dev = &client->dev; 988 struct bma180_data *data; 989 struct iio_dev *indio_dev; 990 enum chip_ids chip; 991 int ret; 992 993 indio_dev = devm_iio_device_alloc(dev, sizeof(*data)); 994 if (!indio_dev) 995 return -ENOMEM; 996 997 data = iio_priv(indio_dev); 998 i2c_set_clientdata(client, indio_dev); 999 data->client = client; 1000 if (client->dev.of_node) 1001 chip = (enum chip_ids)of_device_get_match_data(dev); 1002 else 1003 chip = id->driver_data; 1004 data->part_info = &bma180_part_info[chip]; 1005 1006 ret = iio_read_mount_matrix(dev, "mount-matrix", 1007 &data->orientation); 1008 if (ret) 1009 return ret; 1010 1011 data->vdd_supply = devm_regulator_get(dev, "vdd"); 1012 if (IS_ERR(data->vdd_supply)) 1013 return dev_err_probe(dev, PTR_ERR(data->vdd_supply), 1014 "Failed to get vdd regulator\n"); 1015 1016 data->vddio_supply = devm_regulator_get(dev, "vddio"); 1017 if (IS_ERR(data->vddio_supply)) 1018 return dev_err_probe(dev, PTR_ERR(data->vddio_supply), 1019 "Failed to get vddio regulator\n"); 1020 1021 /* Typical voltage 2.4V these are min and max */ 1022 ret = regulator_set_voltage(data->vdd_supply, 1620000, 3600000); 1023 if (ret) 1024 return ret; 1025 ret = regulator_set_voltage(data->vddio_supply, 1200000, 3600000); 1026 if (ret) 1027 return ret; 1028 ret = regulator_enable(data->vdd_supply); 1029 if (ret) { 1030 dev_err(dev, "Failed to enable vdd regulator: %d\n", ret); 1031 return ret; 1032 } 1033 ret = regulator_enable(data->vddio_supply); 1034 if (ret) { 1035 dev_err(dev, "Failed to enable vddio regulator: %d\n", ret); 1036 goto err_disable_vdd; 1037 } 1038 /* Wait to make sure we started up properly (3 ms at least) */ 1039 usleep_range(3000, 5000); 1040 1041 ret = data->part_info->chip_config(data); 1042 if (ret < 0) 1043 goto err_chip_disable; 1044 1045 mutex_init(&data->mutex); 1046 indio_dev->channels = data->part_info->channels; 1047 indio_dev->num_channels = data->part_info->num_channels; 1048 indio_dev->name = id->name; 1049 indio_dev->modes = INDIO_DIRECT_MODE; 1050 indio_dev->info = &bma180_info; 1051 1052 if (client->irq > 0) { 1053 data->trig = iio_trigger_alloc("%s-dev%d", indio_dev->name, 1054 indio_dev->id); 1055 if (!data->trig) { 1056 ret = -ENOMEM; 1057 goto err_chip_disable; 1058 } 1059 1060 ret = devm_request_irq(dev, client->irq, 1061 iio_trigger_generic_data_rdy_poll, IRQF_TRIGGER_RISING, 1062 "bma180_event", data->trig); 1063 if (ret) { 1064 dev_err(dev, "unable to request IRQ\n"); 1065 goto err_trigger_free; 1066 } 1067 1068 data->trig->dev.parent = dev; 1069 data->trig->ops = &bma180_trigger_ops; 1070 iio_trigger_set_drvdata(data->trig, indio_dev); 1071 1072 ret = iio_trigger_register(data->trig); 1073 if (ret) 1074 goto err_trigger_free; 1075 1076 indio_dev->trig = iio_trigger_get(data->trig); 1077 } 1078 1079 ret = iio_triggered_buffer_setup(indio_dev, NULL, 1080 bma180_trigger_handler, NULL); 1081 if (ret < 0) { 1082 dev_err(dev, "unable to setup iio triggered buffer\n"); 1083 goto err_trigger_unregister; 1084 } 1085 1086 ret = iio_device_register(indio_dev); 1087 if (ret < 0) { 1088 dev_err(dev, "unable to register iio device\n"); 1089 goto err_buffer_cleanup; 1090 } 1091 1092 return 0; 1093 1094err_buffer_cleanup: 1095 iio_triggered_buffer_cleanup(indio_dev); 1096err_trigger_unregister: 1097 if (data->trig) 1098 iio_trigger_unregister(data->trig); 1099err_trigger_free: 1100 iio_trigger_free(data->trig); 1101err_chip_disable: 1102 data->part_info->chip_disable(data); 1103 regulator_disable(data->vddio_supply); 1104err_disable_vdd: 1105 regulator_disable(data->vdd_supply); 1106 1107 return ret; 1108} 1109 1110static int bma180_remove(struct i2c_client *client) 1111{ 1112 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1113 struct bma180_data *data = iio_priv(indio_dev); 1114 1115 iio_device_unregister(indio_dev); 1116 iio_triggered_buffer_cleanup(indio_dev); 1117 if (data->trig) { 1118 iio_trigger_unregister(data->trig); 1119 iio_trigger_free(data->trig); 1120 } 1121 1122 mutex_lock(&data->mutex); 1123 data->part_info->chip_disable(data); 1124 mutex_unlock(&data->mutex); 1125 regulator_disable(data->vddio_supply); 1126 regulator_disable(data->vdd_supply); 1127 1128 return 0; 1129} 1130 1131#ifdef CONFIG_PM_SLEEP 1132static int bma180_suspend(struct device *dev) 1133{ 1134 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1135 struct bma180_data *data = iio_priv(indio_dev); 1136 int ret; 1137 1138 mutex_lock(&data->mutex); 1139 ret = bma180_set_sleep_state(data, true); 1140 mutex_unlock(&data->mutex); 1141 1142 return ret; 1143} 1144 1145static int bma180_resume(struct device *dev) 1146{ 1147 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1148 struct bma180_data *data = iio_priv(indio_dev); 1149 int ret; 1150 1151 mutex_lock(&data->mutex); 1152 ret = bma180_set_sleep_state(data, false); 1153 mutex_unlock(&data->mutex); 1154 1155 return ret; 1156} 1157 1158static SIMPLE_DEV_PM_OPS(bma180_pm_ops, bma180_suspend, bma180_resume); 1159#define BMA180_PM_OPS (&bma180_pm_ops) 1160#else 1161#define BMA180_PM_OPS NULL 1162#endif 1163 1164static const struct i2c_device_id bma180_ids[] = { 1165 { "bma023", BMA023 }, 1166 { "bma150", BMA150 }, 1167 { "bma180", BMA180 }, 1168 { "bma250", BMA250 }, 1169 { "bma254", BMA254 }, 1170 { "smb380", BMA150 }, 1171 { } 1172}; 1173 1174MODULE_DEVICE_TABLE(i2c, bma180_ids); 1175 1176static const struct of_device_id bma180_of_match[] = { 1177 { 1178 .compatible = "bosch,bma023", 1179 .data = (void *)BMA023 1180 }, 1181 { 1182 .compatible = "bosch,bma150", 1183 .data = (void *)BMA150 1184 }, 1185 { 1186 .compatible = "bosch,bma180", 1187 .data = (void *)BMA180 1188 }, 1189 { 1190 .compatible = "bosch,bma250", 1191 .data = (void *)BMA250 1192 }, 1193 { 1194 .compatible = "bosch,bma254", 1195 .data = (void *)BMA254 1196 }, 1197 { 1198 .compatible = "bosch,smb380", 1199 .data = (void *)BMA150 1200 }, 1201 { } 1202}; 1203MODULE_DEVICE_TABLE(of, bma180_of_match); 1204 1205static struct i2c_driver bma180_driver = { 1206 .driver = { 1207 .name = "bma180", 1208 .pm = BMA180_PM_OPS, 1209 .of_match_table = bma180_of_match, 1210 }, 1211 .probe = bma180_probe, 1212 .remove = bma180_remove, 1213 .id_table = bma180_ids, 1214}; 1215 1216module_i2c_driver(bma180_driver); 1217 1218MODULE_AUTHOR("Kravchenko Oleksandr <x0199363@ti.com>"); 1219MODULE_AUTHOR("Texas Instruments, Inc."); 1220MODULE_DESCRIPTION("Bosch BMA023/BMA1x0/BMA25x triaxial acceleration sensor"); 1221MODULE_LICENSE("GPL"); 1222