18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci *  Copyright (C) 1996  Linus Torvalds & author (see below)
48c2ecf20Sopenharmony_ci */
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci#include <linux/module.h>
78c2ecf20Sopenharmony_ci#include <linux/types.h>
88c2ecf20Sopenharmony_ci#include <linux/kernel.h>
98c2ecf20Sopenharmony_ci#include <linux/delay.h>
108c2ecf20Sopenharmony_ci#include <linux/timer.h>
118c2ecf20Sopenharmony_ci#include <linux/mm.h>
128c2ecf20Sopenharmony_ci#include <linux/ioport.h>
138c2ecf20Sopenharmony_ci#include <linux/blkdev.h>
148c2ecf20Sopenharmony_ci#include <linux/ide.h>
158c2ecf20Sopenharmony_ci#include <linux/init.h>
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci#include <asm/io.h>
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci#define DRV_NAME "dtc2278"
208c2ecf20Sopenharmony_ci
218c2ecf20Sopenharmony_ci/*
228c2ecf20Sopenharmony_ci * Changing this #undef to #define may solve start up problems in some systems.
238c2ecf20Sopenharmony_ci */
248c2ecf20Sopenharmony_ci#undef ALWAYS_SET_DTC2278_PIO_MODE
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci/*
278c2ecf20Sopenharmony_ci * From: andy@cercle.cts.com (Dyan Wile)
288c2ecf20Sopenharmony_ci *
298c2ecf20Sopenharmony_ci * Below is a patch for DTC-2278 - alike software-programmable controllers
308c2ecf20Sopenharmony_ci * The code enables the secondary IDE controller and the PIO4 (3?) timings on
318c2ecf20Sopenharmony_ci * the primary (EIDE). You may probably have to enable the 32-bit support to
328c2ecf20Sopenharmony_ci * get the full speed. You better get the disk interrupts disabled ( hdparm -u0
338c2ecf20Sopenharmony_ci * /dev/hd.. ) for the drives connected to the EIDE interface. (I get my
348c2ecf20Sopenharmony_ci * filesystem  corrupted with -u1, but under heavy disk load only :-)
358c2ecf20Sopenharmony_ci *
368c2ecf20Sopenharmony_ci * This card is now forced to use the "serialize" feature,
378c2ecf20Sopenharmony_ci * and irq-unmasking is disallowed.  If io_32bit is enabled,
388c2ecf20Sopenharmony_ci * it must be done for BOTH drives on each interface.
398c2ecf20Sopenharmony_ci *
408c2ecf20Sopenharmony_ci * This code was written for the DTC2278E, but might work with any of these:
418c2ecf20Sopenharmony_ci *
428c2ecf20Sopenharmony_ci * DTC2278S has only a single IDE interface.
438c2ecf20Sopenharmony_ci * DTC2278D has two IDE interfaces and is otherwise identical to the S version.
448c2ecf20Sopenharmony_ci * DTC2278E also has serial ports and a printer port
458c2ecf20Sopenharmony_ci * DTC2278EB: has onboard BIOS, and "works like a charm" -- Kent Bradford <kent@theory.caltech.edu>
468c2ecf20Sopenharmony_ci *
478c2ecf20Sopenharmony_ci * There may be a fourth controller type. The S and D versions use the
488c2ecf20Sopenharmony_ci * Winbond chip, and I think the E version does also.
498c2ecf20Sopenharmony_ci *
508c2ecf20Sopenharmony_ci */
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_cistatic void sub22 (char b, char c)
538c2ecf20Sopenharmony_ci{
548c2ecf20Sopenharmony_ci	int i;
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci	for(i = 0; i < 3; ++i) {
578c2ecf20Sopenharmony_ci		inb(0x3f6);
588c2ecf20Sopenharmony_ci		outb_p(b,0xb0);
598c2ecf20Sopenharmony_ci		inb(0x3f6);
608c2ecf20Sopenharmony_ci		outb_p(c,0xb4);
618c2ecf20Sopenharmony_ci		inb(0x3f6);
628c2ecf20Sopenharmony_ci		if(inb(0xb4) == c) {
638c2ecf20Sopenharmony_ci			outb_p(7,0xb0);
648c2ecf20Sopenharmony_ci			inb(0x3f6);
658c2ecf20Sopenharmony_ci			return;	/* success */
668c2ecf20Sopenharmony_ci		}
678c2ecf20Sopenharmony_ci	}
688c2ecf20Sopenharmony_ci}
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_cistatic DEFINE_SPINLOCK(dtc2278_lock);
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_cistatic void dtc2278_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
738c2ecf20Sopenharmony_ci{
748c2ecf20Sopenharmony_ci	unsigned long flags;
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_ci	if (drive->pio_mode >= XFER_PIO_3) {
778c2ecf20Sopenharmony_ci		spin_lock_irqsave(&dtc2278_lock, flags);
788c2ecf20Sopenharmony_ci		/*
798c2ecf20Sopenharmony_ci		 * This enables PIO mode4 (3?) on the first interface
808c2ecf20Sopenharmony_ci		 */
818c2ecf20Sopenharmony_ci		sub22(1,0xc3);
828c2ecf20Sopenharmony_ci		sub22(0,0xa0);
838c2ecf20Sopenharmony_ci		spin_unlock_irqrestore(&dtc2278_lock, flags);
848c2ecf20Sopenharmony_ci	} else {
858c2ecf20Sopenharmony_ci		/* we don't know how to set it back again.. */
868c2ecf20Sopenharmony_ci		/* Actually we do - there is a data sheet available for the
878c2ecf20Sopenharmony_ci		   Winbond but does anyone actually care */
888c2ecf20Sopenharmony_ci	}
898c2ecf20Sopenharmony_ci}
908c2ecf20Sopenharmony_ci
918c2ecf20Sopenharmony_cistatic const struct ide_port_ops dtc2278_port_ops = {
928c2ecf20Sopenharmony_ci	.set_pio_mode		= dtc2278_set_pio_mode,
938c2ecf20Sopenharmony_ci};
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_cistatic const struct ide_port_info dtc2278_port_info __initconst = {
968c2ecf20Sopenharmony_ci	.name			= DRV_NAME,
978c2ecf20Sopenharmony_ci	.chipset		= ide_dtc2278,
988c2ecf20Sopenharmony_ci	.port_ops		= &dtc2278_port_ops,
998c2ecf20Sopenharmony_ci	.host_flags		= IDE_HFLAG_SERIALIZE |
1008c2ecf20Sopenharmony_ci				  IDE_HFLAG_NO_UNMASK_IRQS |
1018c2ecf20Sopenharmony_ci				  IDE_HFLAG_IO_32BIT |
1028c2ecf20Sopenharmony_ci				  /* disallow ->io_32bit changes */
1038c2ecf20Sopenharmony_ci				  IDE_HFLAG_NO_IO_32BIT |
1048c2ecf20Sopenharmony_ci				  IDE_HFLAG_NO_DMA |
1058c2ecf20Sopenharmony_ci				  IDE_HFLAG_DTC2278,
1068c2ecf20Sopenharmony_ci	.pio_mask		= ATA_PIO4,
1078c2ecf20Sopenharmony_ci};
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_cistatic int __init dtc2278_probe(void)
1108c2ecf20Sopenharmony_ci{
1118c2ecf20Sopenharmony_ci	unsigned long flags;
1128c2ecf20Sopenharmony_ci
1138c2ecf20Sopenharmony_ci	local_irq_save(flags);
1148c2ecf20Sopenharmony_ci	/*
1158c2ecf20Sopenharmony_ci	 * This enables the second interface
1168c2ecf20Sopenharmony_ci	 */
1178c2ecf20Sopenharmony_ci	outb_p(4,0xb0);
1188c2ecf20Sopenharmony_ci	inb(0x3f6);
1198c2ecf20Sopenharmony_ci	outb_p(0x20,0xb4);
1208c2ecf20Sopenharmony_ci	inb(0x3f6);
1218c2ecf20Sopenharmony_ci#ifdef ALWAYS_SET_DTC2278_PIO_MODE
1228c2ecf20Sopenharmony_ci	/*
1238c2ecf20Sopenharmony_ci	 * This enables PIO mode4 (3?) on the first interface
1248c2ecf20Sopenharmony_ci	 * and may solve start-up problems for some people.
1258c2ecf20Sopenharmony_ci	 */
1268c2ecf20Sopenharmony_ci	sub22(1,0xc3);
1278c2ecf20Sopenharmony_ci	sub22(0,0xa0);
1288c2ecf20Sopenharmony_ci#endif
1298c2ecf20Sopenharmony_ci	local_irq_restore(flags);
1308c2ecf20Sopenharmony_ci
1318c2ecf20Sopenharmony_ci	return ide_legacy_device_add(&dtc2278_port_info, 0);
1328c2ecf20Sopenharmony_ci}
1338c2ecf20Sopenharmony_ci
1348c2ecf20Sopenharmony_cistatic bool probe_dtc2278;
1358c2ecf20Sopenharmony_ci
1368c2ecf20Sopenharmony_cimodule_param_named(probe, probe_dtc2278, bool, 0);
1378c2ecf20Sopenharmony_ciMODULE_PARM_DESC(probe, "probe for DTC2278xx chipsets");
1388c2ecf20Sopenharmony_ci
1398c2ecf20Sopenharmony_cistatic int __init dtc2278_init(void)
1408c2ecf20Sopenharmony_ci{
1418c2ecf20Sopenharmony_ci	if (probe_dtc2278 == 0)
1428c2ecf20Sopenharmony_ci		return -ENODEV;
1438c2ecf20Sopenharmony_ci
1448c2ecf20Sopenharmony_ci	if (dtc2278_probe()) {
1458c2ecf20Sopenharmony_ci		printk(KERN_ERR "dtc2278: ide interfaces already in use!\n");
1468c2ecf20Sopenharmony_ci		return -EBUSY;
1478c2ecf20Sopenharmony_ci	}
1488c2ecf20Sopenharmony_ci	return 0;
1498c2ecf20Sopenharmony_ci}
1508c2ecf20Sopenharmony_ci
1518c2ecf20Sopenharmony_cimodule_init(dtc2278_init);
1528c2ecf20Sopenharmony_ci
1538c2ecf20Sopenharmony_ciMODULE_AUTHOR("See Local File");
1548c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("support of DTC-2278 VLB IDE chipsets");
1558c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL");
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