1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2018 Cadence Design Systems Inc. 4 * 5 * Author: Boris Brezillon <boris.brezillon@bootlin.com> 6 */ 7 8#include <linux/atomic.h> 9#include <linux/bug.h> 10#include <linux/device.h> 11#include <linux/err.h> 12#include <linux/export.h> 13#include <linux/kernel.h> 14#include <linux/list.h> 15#include <linux/of.h> 16#include <linux/slab.h> 17#include <linux/spinlock.h> 18#include <linux/workqueue.h> 19 20#include "internals.h" 21 22static DEFINE_IDR(i3c_bus_idr); 23static DEFINE_MUTEX(i3c_core_lock); 24 25/** 26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation 27 * @bus: I3C bus to take the lock on 28 * 29 * This function takes the bus lock so that no other operations can occur on 30 * the bus. This is needed for all kind of bus maintenance operation, like 31 * - enabling/disabling slave events 32 * - re-triggering DAA 33 * - changing the dynamic address of a device 34 * - relinquishing mastership 35 * - ... 36 * 37 * The reason for this kind of locking is that we don't want drivers and core 38 * logic to rely on I3C device information that could be changed behind their 39 * back. 40 */ 41static void i3c_bus_maintenance_lock(struct i3c_bus *bus) 42{ 43 down_write(&bus->lock); 44} 45 46/** 47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance 48 * operation 49 * @bus: I3C bus to release the lock on 50 * 51 * Should be called when the bus maintenance operation is done. See 52 * i3c_bus_maintenance_lock() for more details on what these maintenance 53 * operations are. 54 */ 55static void i3c_bus_maintenance_unlock(struct i3c_bus *bus) 56{ 57 up_write(&bus->lock); 58} 59 60/** 61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation 62 * @bus: I3C bus to take the lock on 63 * 64 * This function takes the bus lock for any operation that is not a maintenance 65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of 66 * maintenance operations). Basically all communications with I3C devices are 67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus 68 * state or I3C dynamic address). 69 * 70 * Note that this lock is not guaranteeing serialization of normal operations. 71 * In other words, transfer requests passed to the I3C master can be submitted 72 * in parallel and I3C master drivers have to use their own locking to make 73 * sure two different communications are not inter-mixed, or access to the 74 * output/input queue is not done while the engine is busy. 75 */ 76void i3c_bus_normaluse_lock(struct i3c_bus *bus) 77{ 78 down_read(&bus->lock); 79} 80 81/** 82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation 83 * @bus: I3C bus to release the lock on 84 * 85 * Should be called when a normal operation is done. See 86 * i3c_bus_normaluse_lock() for more details on what these normal operations 87 * are. 88 */ 89void i3c_bus_normaluse_unlock(struct i3c_bus *bus) 90{ 91 up_read(&bus->lock); 92} 93 94static struct i3c_master_controller * 95i3c_bus_to_i3c_master(struct i3c_bus *i3cbus) 96{ 97 return container_of(i3cbus, struct i3c_master_controller, bus); 98} 99 100static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev) 101{ 102 return container_of(dev, struct i3c_master_controller, dev); 103} 104 105static const struct device_type i3c_device_type; 106 107static struct i3c_bus *dev_to_i3cbus(struct device *dev) 108{ 109 struct i3c_master_controller *master; 110 111 if (dev->type == &i3c_device_type) 112 return dev_to_i3cdev(dev)->bus; 113 114 master = dev_to_i3cmaster(dev); 115 116 return &master->bus; 117} 118 119static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev) 120{ 121 struct i3c_master_controller *master; 122 123 if (dev->type == &i3c_device_type) 124 return dev_to_i3cdev(dev)->desc; 125 126 master = dev_to_i3cmaster(dev); 127 128 return master->this; 129} 130 131static ssize_t bcr_show(struct device *dev, 132 struct device_attribute *da, 133 char *buf) 134{ 135 struct i3c_bus *bus = dev_to_i3cbus(dev); 136 struct i3c_dev_desc *desc; 137 ssize_t ret; 138 139 i3c_bus_normaluse_lock(bus); 140 desc = dev_to_i3cdesc(dev); 141 ret = sprintf(buf, "%x\n", desc->info.bcr); 142 i3c_bus_normaluse_unlock(bus); 143 144 return ret; 145} 146static DEVICE_ATTR_RO(bcr); 147 148static ssize_t dcr_show(struct device *dev, 149 struct device_attribute *da, 150 char *buf) 151{ 152 struct i3c_bus *bus = dev_to_i3cbus(dev); 153 struct i3c_dev_desc *desc; 154 ssize_t ret; 155 156 i3c_bus_normaluse_lock(bus); 157 desc = dev_to_i3cdesc(dev); 158 ret = sprintf(buf, "%x\n", desc->info.dcr); 159 i3c_bus_normaluse_unlock(bus); 160 161 return ret; 162} 163static DEVICE_ATTR_RO(dcr); 164 165static ssize_t pid_show(struct device *dev, 166 struct device_attribute *da, 167 char *buf) 168{ 169 struct i3c_bus *bus = dev_to_i3cbus(dev); 170 struct i3c_dev_desc *desc; 171 ssize_t ret; 172 173 i3c_bus_normaluse_lock(bus); 174 desc = dev_to_i3cdesc(dev); 175 ret = sprintf(buf, "%llx\n", desc->info.pid); 176 i3c_bus_normaluse_unlock(bus); 177 178 return ret; 179} 180static DEVICE_ATTR_RO(pid); 181 182static ssize_t dynamic_address_show(struct device *dev, 183 struct device_attribute *da, 184 char *buf) 185{ 186 struct i3c_bus *bus = dev_to_i3cbus(dev); 187 struct i3c_dev_desc *desc; 188 ssize_t ret; 189 190 i3c_bus_normaluse_lock(bus); 191 desc = dev_to_i3cdesc(dev); 192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr); 193 i3c_bus_normaluse_unlock(bus); 194 195 return ret; 196} 197static DEVICE_ATTR_RO(dynamic_address); 198 199static const char * const hdrcap_strings[] = { 200 "hdr-ddr", "hdr-tsp", "hdr-tsl", 201}; 202 203static ssize_t hdrcap_show(struct device *dev, 204 struct device_attribute *da, 205 char *buf) 206{ 207 struct i3c_bus *bus = dev_to_i3cbus(dev); 208 struct i3c_dev_desc *desc; 209 ssize_t offset = 0, ret; 210 unsigned long caps; 211 int mode; 212 213 i3c_bus_normaluse_lock(bus); 214 desc = dev_to_i3cdesc(dev); 215 caps = desc->info.hdr_cap; 216 for_each_set_bit(mode, &caps, 8) { 217 if (mode >= ARRAY_SIZE(hdrcap_strings)) 218 break; 219 220 if (!hdrcap_strings[mode]) 221 continue; 222 223 ret = sprintf(buf + offset, offset ? " %s" : "%s", 224 hdrcap_strings[mode]); 225 if (ret < 0) 226 goto out; 227 228 offset += ret; 229 } 230 231 ret = sprintf(buf + offset, "\n"); 232 if (ret < 0) 233 goto out; 234 235 ret = offset + ret; 236 237out: 238 i3c_bus_normaluse_unlock(bus); 239 240 return ret; 241} 242static DEVICE_ATTR_RO(hdrcap); 243 244static ssize_t modalias_show(struct device *dev, 245 struct device_attribute *da, char *buf) 246{ 247 struct i3c_device *i3c = dev_to_i3cdev(dev); 248 struct i3c_device_info devinfo; 249 u16 manuf, part, ext; 250 251 i3c_device_get_info(i3c, &devinfo); 252 manuf = I3C_PID_MANUF_ID(devinfo.pid); 253 part = I3C_PID_PART_ID(devinfo.pid); 254 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 255 256 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 257 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr, 258 manuf); 259 260 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 261 devinfo.dcr, manuf, part, ext); 262} 263static DEVICE_ATTR_RO(modalias); 264 265static struct attribute *i3c_device_attrs[] = { 266 &dev_attr_bcr.attr, 267 &dev_attr_dcr.attr, 268 &dev_attr_pid.attr, 269 &dev_attr_dynamic_address.attr, 270 &dev_attr_hdrcap.attr, 271 &dev_attr_modalias.attr, 272 NULL, 273}; 274ATTRIBUTE_GROUPS(i3c_device); 275 276static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env) 277{ 278 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 279 struct i3c_device_info devinfo; 280 u16 manuf, part, ext; 281 282 i3c_device_get_info(i3cdev, &devinfo); 283 manuf = I3C_PID_MANUF_ID(devinfo.pid); 284 part = I3C_PID_PART_ID(devinfo.pid); 285 ext = I3C_PID_EXTRA_INFO(devinfo.pid); 286 287 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid)) 288 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X", 289 devinfo.dcr, manuf); 290 291 return add_uevent_var(env, 292 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X", 293 devinfo.dcr, manuf, part, ext); 294} 295 296static const struct device_type i3c_device_type = { 297 .groups = i3c_device_groups, 298 .uevent = i3c_device_uevent, 299}; 300 301static int i3c_device_match(struct device *dev, struct device_driver *drv) 302{ 303 struct i3c_device *i3cdev; 304 struct i3c_driver *i3cdrv; 305 306 if (dev->type != &i3c_device_type) 307 return 0; 308 309 i3cdev = dev_to_i3cdev(dev); 310 i3cdrv = drv_to_i3cdrv(drv); 311 if (i3c_device_match_id(i3cdev, i3cdrv->id_table)) 312 return 1; 313 314 return 0; 315} 316 317static int i3c_device_probe(struct device *dev) 318{ 319 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 320 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 321 322 return driver->probe(i3cdev); 323} 324 325static int i3c_device_remove(struct device *dev) 326{ 327 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 328 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver); 329 int ret; 330 331 ret = driver->remove(i3cdev); 332 if (ret) 333 return ret; 334 335 i3c_device_free_ibi(i3cdev); 336 337 return ret; 338} 339 340struct bus_type i3c_bus_type = { 341 .name = "i3c", 342 .match = i3c_device_match, 343 .probe = i3c_device_probe, 344 .remove = i3c_device_remove, 345}; 346 347static enum i3c_addr_slot_status 348i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr) 349{ 350 int status, bitpos = addr * 2; 351 352 if (addr > I2C_MAX_ADDR) 353 return I3C_ADDR_SLOT_RSVD; 354 355 status = bus->addrslots[bitpos / BITS_PER_LONG]; 356 status >>= bitpos % BITS_PER_LONG; 357 358 return status & I3C_ADDR_SLOT_STATUS_MASK; 359} 360 361static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr, 362 enum i3c_addr_slot_status status) 363{ 364 int bitpos = addr * 2; 365 unsigned long *ptr; 366 367 if (addr > I2C_MAX_ADDR) 368 return; 369 370 ptr = bus->addrslots + (bitpos / BITS_PER_LONG); 371 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK << 372 (bitpos % BITS_PER_LONG)); 373 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG); 374} 375 376static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr) 377{ 378 enum i3c_addr_slot_status status; 379 380 status = i3c_bus_get_addr_slot_status(bus, addr); 381 382 return status == I3C_ADDR_SLOT_FREE; 383} 384 385static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr) 386{ 387 enum i3c_addr_slot_status status; 388 u8 addr; 389 390 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) { 391 status = i3c_bus_get_addr_slot_status(bus, addr); 392 if (status == I3C_ADDR_SLOT_FREE) 393 return addr; 394 } 395 396 return -ENOMEM; 397} 398 399static void i3c_bus_init_addrslots(struct i3c_bus *bus) 400{ 401 int i; 402 403 /* Addresses 0 to 7 are reserved. */ 404 for (i = 0; i < 8; i++) 405 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD); 406 407 /* 408 * Reserve broadcast address and all addresses that might collide 409 * with the broadcast address when facing a single bit error. 410 */ 411 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR, 412 I3C_ADDR_SLOT_RSVD); 413 for (i = 0; i < 7; i++) 414 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i), 415 I3C_ADDR_SLOT_RSVD); 416} 417 418static void i3c_bus_cleanup(struct i3c_bus *i3cbus) 419{ 420 mutex_lock(&i3c_core_lock); 421 idr_remove(&i3c_bus_idr, i3cbus->id); 422 mutex_unlock(&i3c_core_lock); 423} 424 425static int i3c_bus_init(struct i3c_bus *i3cbus) 426{ 427 int ret; 428 429 init_rwsem(&i3cbus->lock); 430 INIT_LIST_HEAD(&i3cbus->devs.i2c); 431 INIT_LIST_HEAD(&i3cbus->devs.i3c); 432 i3c_bus_init_addrslots(i3cbus); 433 i3cbus->mode = I3C_BUS_MODE_PURE; 434 435 mutex_lock(&i3c_core_lock); 436 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL); 437 mutex_unlock(&i3c_core_lock); 438 439 if (ret < 0) 440 return ret; 441 442 i3cbus->id = ret; 443 444 return 0; 445} 446 447static const char * const i3c_bus_mode_strings[] = { 448 [I3C_BUS_MODE_PURE] = "pure", 449 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast", 450 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited", 451 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow", 452}; 453 454static ssize_t mode_show(struct device *dev, 455 struct device_attribute *da, 456 char *buf) 457{ 458 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 459 ssize_t ret; 460 461 i3c_bus_normaluse_lock(i3cbus); 462 if (i3cbus->mode < 0 || 463 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) || 464 !i3c_bus_mode_strings[i3cbus->mode]) 465 ret = sprintf(buf, "unknown\n"); 466 else 467 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]); 468 i3c_bus_normaluse_unlock(i3cbus); 469 470 return ret; 471} 472static DEVICE_ATTR_RO(mode); 473 474static ssize_t current_master_show(struct device *dev, 475 struct device_attribute *da, 476 char *buf) 477{ 478 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 479 ssize_t ret; 480 481 i3c_bus_normaluse_lock(i3cbus); 482 ret = sprintf(buf, "%d-%llx\n", i3cbus->id, 483 i3cbus->cur_master->info.pid); 484 i3c_bus_normaluse_unlock(i3cbus); 485 486 return ret; 487} 488static DEVICE_ATTR_RO(current_master); 489 490static ssize_t i3c_scl_frequency_show(struct device *dev, 491 struct device_attribute *da, 492 char *buf) 493{ 494 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 495 ssize_t ret; 496 497 i3c_bus_normaluse_lock(i3cbus); 498 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c); 499 i3c_bus_normaluse_unlock(i3cbus); 500 501 return ret; 502} 503static DEVICE_ATTR_RO(i3c_scl_frequency); 504 505static ssize_t i2c_scl_frequency_show(struct device *dev, 506 struct device_attribute *da, 507 char *buf) 508{ 509 struct i3c_bus *i3cbus = dev_to_i3cbus(dev); 510 ssize_t ret; 511 512 i3c_bus_normaluse_lock(i3cbus); 513 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c); 514 i3c_bus_normaluse_unlock(i3cbus); 515 516 return ret; 517} 518static DEVICE_ATTR_RO(i2c_scl_frequency); 519 520static struct attribute *i3c_masterdev_attrs[] = { 521 &dev_attr_mode.attr, 522 &dev_attr_current_master.attr, 523 &dev_attr_i3c_scl_frequency.attr, 524 &dev_attr_i2c_scl_frequency.attr, 525 &dev_attr_bcr.attr, 526 &dev_attr_dcr.attr, 527 &dev_attr_pid.attr, 528 &dev_attr_dynamic_address.attr, 529 &dev_attr_hdrcap.attr, 530 NULL, 531}; 532ATTRIBUTE_GROUPS(i3c_masterdev); 533 534static void i3c_masterdev_release(struct device *dev) 535{ 536 struct i3c_master_controller *master = dev_to_i3cmaster(dev); 537 struct i3c_bus *bus = dev_to_i3cbus(dev); 538 539 if (master->wq) 540 destroy_workqueue(master->wq); 541 542 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c)); 543 i3c_bus_cleanup(bus); 544 545 of_node_put(dev->of_node); 546} 547 548static const struct device_type i3c_masterdev_type = { 549 .groups = i3c_masterdev_groups, 550}; 551 552static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode, 553 unsigned long max_i2c_scl_rate) 554{ 555 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus); 556 557 i3cbus->mode = mode; 558 559 switch (i3cbus->mode) { 560 case I3C_BUS_MODE_PURE: 561 if (!i3cbus->scl_rate.i3c) 562 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 563 break; 564 case I3C_BUS_MODE_MIXED_FAST: 565 case I3C_BUS_MODE_MIXED_LIMITED: 566 if (!i3cbus->scl_rate.i3c) 567 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE; 568 if (!i3cbus->scl_rate.i2c) 569 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 570 break; 571 case I3C_BUS_MODE_MIXED_SLOW: 572 if (!i3cbus->scl_rate.i2c) 573 i3cbus->scl_rate.i2c = max_i2c_scl_rate; 574 if (!i3cbus->scl_rate.i3c || 575 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c) 576 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c; 577 break; 578 default: 579 return -EINVAL; 580 } 581 582 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n", 583 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c); 584 585 /* 586 * I3C/I2C frequency may have been overridden, check that user-provided 587 * values are not exceeding max possible frequency. 588 */ 589 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE || 590 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) 591 return -EINVAL; 592 593 return 0; 594} 595 596static struct i3c_master_controller * 597i2c_adapter_to_i3c_master(struct i2c_adapter *adap) 598{ 599 return container_of(adap, struct i3c_master_controller, i2c); 600} 601 602static struct i2c_adapter * 603i3c_master_to_i2c_adapter(struct i3c_master_controller *master) 604{ 605 return &master->i2c; 606} 607 608static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev) 609{ 610 kfree(dev); 611} 612 613static struct i2c_dev_desc * 614i3c_master_alloc_i2c_dev(struct i3c_master_controller *master, 615 const struct i2c_dev_boardinfo *boardinfo) 616{ 617 struct i2c_dev_desc *dev; 618 619 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 620 if (!dev) 621 return ERR_PTR(-ENOMEM); 622 623 dev->common.master = master; 624 dev->boardinfo = boardinfo; 625 dev->addr = boardinfo->base.addr; 626 dev->lvr = boardinfo->lvr; 627 628 return dev; 629} 630 631static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr, 632 u16 payloadlen) 633{ 634 dest->addr = addr; 635 dest->payload.len = payloadlen; 636 if (payloadlen) 637 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL); 638 else 639 dest->payload.data = NULL; 640 641 return dest->payload.data; 642} 643 644static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest) 645{ 646 kfree(dest->payload.data); 647} 648 649static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id, 650 struct i3c_ccc_cmd_dest *dests, 651 unsigned int ndests) 652{ 653 cmd->rnw = rnw ? 1 : 0; 654 cmd->id = id; 655 cmd->dests = dests; 656 cmd->ndests = ndests; 657 cmd->err = I3C_ERROR_UNKNOWN; 658} 659 660static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master, 661 struct i3c_ccc_cmd *cmd) 662{ 663 int ret; 664 665 if (!cmd || !master) 666 return -EINVAL; 667 668 if (WARN_ON(master->init_done && 669 !rwsem_is_locked(&master->bus.lock))) 670 return -EINVAL; 671 672 if (!master->ops->send_ccc_cmd) 673 return -ENOTSUPP; 674 675 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests)) 676 return -EINVAL; 677 678 if (master->ops->supports_ccc_cmd && 679 !master->ops->supports_ccc_cmd(master, cmd)) 680 return -ENOTSUPP; 681 682 ret = master->ops->send_ccc_cmd(master, cmd); 683 if (ret) { 684 if (cmd->err != I3C_ERROR_UNKNOWN) 685 return cmd->err; 686 687 return ret; 688 } 689 690 return 0; 691} 692 693static struct i2c_dev_desc * 694i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master, 695 u16 addr) 696{ 697 struct i2c_dev_desc *dev; 698 699 i3c_bus_for_each_i2cdev(&master->bus, dev) { 700 if (dev->boardinfo->base.addr == addr) 701 return dev; 702 } 703 704 return NULL; 705} 706 707/** 708 * i3c_master_get_free_addr() - get a free address on the bus 709 * @master: I3C master object 710 * @start_addr: where to start searching 711 * 712 * This function must be called with the bus lock held in write mode. 713 * 714 * Return: the first free address starting at @start_addr (included) or -ENOMEM 715 * if there's no more address available. 716 */ 717int i3c_master_get_free_addr(struct i3c_master_controller *master, 718 u8 start_addr) 719{ 720 return i3c_bus_get_free_addr(&master->bus, start_addr); 721} 722EXPORT_SYMBOL_GPL(i3c_master_get_free_addr); 723 724static void i3c_device_release(struct device *dev) 725{ 726 struct i3c_device *i3cdev = dev_to_i3cdev(dev); 727 728 WARN_ON(i3cdev->desc); 729 730 of_node_put(i3cdev->dev.of_node); 731 kfree(i3cdev); 732} 733 734static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev) 735{ 736 kfree(dev); 737} 738 739static struct i3c_dev_desc * 740i3c_master_alloc_i3c_dev(struct i3c_master_controller *master, 741 const struct i3c_device_info *info) 742{ 743 struct i3c_dev_desc *dev; 744 745 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 746 if (!dev) 747 return ERR_PTR(-ENOMEM); 748 749 dev->common.master = master; 750 dev->info = *info; 751 mutex_init(&dev->ibi_lock); 752 753 return dev; 754} 755 756static int i3c_master_rstdaa_locked(struct i3c_master_controller *master, 757 u8 addr) 758{ 759 enum i3c_addr_slot_status addrstat; 760 struct i3c_ccc_cmd_dest dest; 761 struct i3c_ccc_cmd cmd; 762 int ret; 763 764 if (!master) 765 return -EINVAL; 766 767 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr); 768 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV) 769 return -EINVAL; 770 771 i3c_ccc_cmd_dest_init(&dest, addr, 0); 772 i3c_ccc_cmd_init(&cmd, false, 773 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR), 774 &dest, 1); 775 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 776 i3c_ccc_cmd_dest_cleanup(&dest); 777 778 return ret; 779} 780 781/** 782 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment) 783 * procedure 784 * @master: master used to send frames on the bus 785 * 786 * Send a ENTDAA CCC command to start a DAA procedure. 787 * 788 * Note that this function only sends the ENTDAA CCC command, all the logic 789 * behind dynamic address assignment has to be handled in the I3C master 790 * driver. 791 * 792 * This function must be called with the bus lock held in write mode. 793 * 794 * Return: 0 in case of success, a positive I3C error code if the error is 795 * one of the official Mx error codes, and a negative error code otherwise. 796 */ 797int i3c_master_entdaa_locked(struct i3c_master_controller *master) 798{ 799 struct i3c_ccc_cmd_dest dest; 800 struct i3c_ccc_cmd cmd; 801 int ret; 802 803 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0); 804 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1); 805 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 806 i3c_ccc_cmd_dest_cleanup(&dest); 807 808 return ret; 809} 810EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked); 811 812static int i3c_master_enec_disec_locked(struct i3c_master_controller *master, 813 u8 addr, bool enable, u8 evts) 814{ 815 struct i3c_ccc_events *events; 816 struct i3c_ccc_cmd_dest dest; 817 struct i3c_ccc_cmd cmd; 818 int ret; 819 820 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events)); 821 if (!events) 822 return -ENOMEM; 823 824 events->events = evts; 825 i3c_ccc_cmd_init(&cmd, false, 826 enable ? 827 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) : 828 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR), 829 &dest, 1); 830 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 831 i3c_ccc_cmd_dest_cleanup(&dest); 832 833 return ret; 834} 835 836/** 837 * i3c_master_disec_locked() - send a DISEC CCC command 838 * @master: master used to send frames on the bus 839 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 840 * @evts: events to disable 841 * 842 * Send a DISEC CCC command to disable some or all events coming from a 843 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 844 * 845 * This function must be called with the bus lock held in write mode. 846 * 847 * Return: 0 in case of success, a positive I3C error code if the error is 848 * one of the official Mx error codes, and a negative error code otherwise. 849 */ 850int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr, 851 u8 evts) 852{ 853 return i3c_master_enec_disec_locked(master, addr, false, evts); 854} 855EXPORT_SYMBOL_GPL(i3c_master_disec_locked); 856 857/** 858 * i3c_master_enec_locked() - send an ENEC CCC command 859 * @master: master used to send frames on the bus 860 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR 861 * @evts: events to disable 862 * 863 * Sends an ENEC CCC command to enable some or all events coming from a 864 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR. 865 * 866 * This function must be called with the bus lock held in write mode. 867 * 868 * Return: 0 in case of success, a positive I3C error code if the error is 869 * one of the official Mx error codes, and a negative error code otherwise. 870 */ 871int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr, 872 u8 evts) 873{ 874 return i3c_master_enec_disec_locked(master, addr, true, evts); 875} 876EXPORT_SYMBOL_GPL(i3c_master_enec_locked); 877 878/** 879 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command 880 * @master: master used to send frames on the bus 881 * 882 * Send a DEFSLVS CCC command containing all the devices known to the @master. 883 * This is useful when you have secondary masters on the bus to propagate 884 * device information. 885 * 886 * This should be called after all I3C devices have been discovered (in other 887 * words, after the DAA procedure has finished) and instantiated in 888 * &i3c_master_controller_ops->bus_init(). 889 * It should also be called if a master ACKed an Hot-Join request and assigned 890 * a dynamic address to the device joining the bus. 891 * 892 * This function must be called with the bus lock held in write mode. 893 * 894 * Return: 0 in case of success, a positive I3C error code if the error is 895 * one of the official Mx error codes, and a negative error code otherwise. 896 */ 897int i3c_master_defslvs_locked(struct i3c_master_controller *master) 898{ 899 struct i3c_ccc_defslvs *defslvs; 900 struct i3c_ccc_dev_desc *desc; 901 struct i3c_ccc_cmd_dest dest; 902 struct i3c_dev_desc *i3cdev; 903 struct i2c_dev_desc *i2cdev; 904 struct i3c_ccc_cmd cmd; 905 struct i3c_bus *bus; 906 bool send = false; 907 int ndevs = 0, ret; 908 909 if (!master) 910 return -EINVAL; 911 912 bus = i3c_master_get_bus(master); 913 i3c_bus_for_each_i3cdev(bus, i3cdev) { 914 ndevs++; 915 916 if (i3cdev == master->this) 917 continue; 918 919 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) == 920 I3C_BCR_I3C_MASTER) 921 send = true; 922 } 923 924 /* No other master on the bus, skip DEFSLVS. */ 925 if (!send) 926 return 0; 927 928 i3c_bus_for_each_i2cdev(bus, i2cdev) 929 ndevs++; 930 931 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 932 struct_size(defslvs, slaves, 933 ndevs - 1)); 934 if (!defslvs) 935 return -ENOMEM; 936 937 defslvs->count = ndevs; 938 defslvs->master.bcr = master->this->info.bcr; 939 defslvs->master.dcr = master->this->info.dcr; 940 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1; 941 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1; 942 943 desc = defslvs->slaves; 944 i3c_bus_for_each_i2cdev(bus, i2cdev) { 945 desc->lvr = i2cdev->lvr; 946 desc->static_addr = i2cdev->addr << 1; 947 desc++; 948 } 949 950 i3c_bus_for_each_i3cdev(bus, i3cdev) { 951 /* Skip the I3C dev representing this master. */ 952 if (i3cdev == master->this) 953 continue; 954 955 desc->bcr = i3cdev->info.bcr; 956 desc->dcr = i3cdev->info.dcr; 957 desc->dyn_addr = i3cdev->info.dyn_addr << 1; 958 desc->static_addr = i3cdev->info.static_addr << 1; 959 desc++; 960 } 961 962 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1); 963 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 964 i3c_ccc_cmd_dest_cleanup(&dest); 965 966 return ret; 967} 968EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked); 969 970static int i3c_master_setda_locked(struct i3c_master_controller *master, 971 u8 oldaddr, u8 newaddr, bool setdasa) 972{ 973 struct i3c_ccc_cmd_dest dest; 974 struct i3c_ccc_setda *setda; 975 struct i3c_ccc_cmd cmd; 976 int ret; 977 978 if (!oldaddr || !newaddr) 979 return -EINVAL; 980 981 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda)); 982 if (!setda) 983 return -ENOMEM; 984 985 setda->addr = newaddr << 1; 986 i3c_ccc_cmd_init(&cmd, false, 987 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA, 988 &dest, 1); 989 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 990 i3c_ccc_cmd_dest_cleanup(&dest); 991 992 return ret; 993} 994 995static int i3c_master_setdasa_locked(struct i3c_master_controller *master, 996 u8 static_addr, u8 dyn_addr) 997{ 998 return i3c_master_setda_locked(master, static_addr, dyn_addr, true); 999} 1000 1001static int i3c_master_setnewda_locked(struct i3c_master_controller *master, 1002 u8 oldaddr, u8 newaddr) 1003{ 1004 return i3c_master_setda_locked(master, oldaddr, newaddr, false); 1005} 1006 1007static int i3c_master_getmrl_locked(struct i3c_master_controller *master, 1008 struct i3c_device_info *info) 1009{ 1010 struct i3c_ccc_cmd_dest dest; 1011 struct i3c_ccc_mrl *mrl; 1012 struct i3c_ccc_cmd cmd; 1013 int ret; 1014 1015 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl)); 1016 if (!mrl) 1017 return -ENOMEM; 1018 1019 /* 1020 * When the device does not have IBI payload GETMRL only returns 2 1021 * bytes of data. 1022 */ 1023 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD)) 1024 dest.payload.len -= 1; 1025 1026 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1); 1027 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1028 if (ret) 1029 goto out; 1030 1031 switch (dest.payload.len) { 1032 case 3: 1033 info->max_ibi_len = mrl->ibi_len; 1034 fallthrough; 1035 case 2: 1036 info->max_read_len = be16_to_cpu(mrl->read_len); 1037 break; 1038 default: 1039 ret = -EIO; 1040 goto out; 1041 } 1042 1043out: 1044 i3c_ccc_cmd_dest_cleanup(&dest); 1045 1046 return ret; 1047} 1048 1049static int i3c_master_getmwl_locked(struct i3c_master_controller *master, 1050 struct i3c_device_info *info) 1051{ 1052 struct i3c_ccc_cmd_dest dest; 1053 struct i3c_ccc_mwl *mwl; 1054 struct i3c_ccc_cmd cmd; 1055 int ret; 1056 1057 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl)); 1058 if (!mwl) 1059 return -ENOMEM; 1060 1061 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1); 1062 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1063 if (ret) 1064 goto out; 1065 1066 if (dest.payload.len != sizeof(*mwl)) { 1067 ret = -EIO; 1068 goto out; 1069 } 1070 1071 info->max_write_len = be16_to_cpu(mwl->len); 1072 1073out: 1074 i3c_ccc_cmd_dest_cleanup(&dest); 1075 1076 return ret; 1077} 1078 1079static int i3c_master_getmxds_locked(struct i3c_master_controller *master, 1080 struct i3c_device_info *info) 1081{ 1082 struct i3c_ccc_getmxds *getmaxds; 1083 struct i3c_ccc_cmd_dest dest; 1084 struct i3c_ccc_cmd cmd; 1085 int ret; 1086 1087 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1088 sizeof(*getmaxds)); 1089 if (!getmaxds) 1090 return -ENOMEM; 1091 1092 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1); 1093 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1094 if (ret) 1095 goto out; 1096 1097 if (dest.payload.len != 2 && dest.payload.len != 5) { 1098 ret = -EIO; 1099 goto out; 1100 } 1101 1102 info->max_read_ds = getmaxds->maxrd; 1103 info->max_write_ds = getmaxds->maxwr; 1104 if (dest.payload.len == 5) 1105 info->max_read_turnaround = getmaxds->maxrdturn[0] | 1106 ((u32)getmaxds->maxrdturn[1] << 8) | 1107 ((u32)getmaxds->maxrdturn[2] << 16); 1108 1109out: 1110 i3c_ccc_cmd_dest_cleanup(&dest); 1111 1112 return ret; 1113} 1114 1115static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master, 1116 struct i3c_device_info *info) 1117{ 1118 struct i3c_ccc_gethdrcap *gethdrcap; 1119 struct i3c_ccc_cmd_dest dest; 1120 struct i3c_ccc_cmd cmd; 1121 int ret; 1122 1123 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, 1124 sizeof(*gethdrcap)); 1125 if (!gethdrcap) 1126 return -ENOMEM; 1127 1128 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1); 1129 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1130 if (ret) 1131 goto out; 1132 1133 if (dest.payload.len != 1) { 1134 ret = -EIO; 1135 goto out; 1136 } 1137 1138 info->hdr_cap = gethdrcap->modes; 1139 1140out: 1141 i3c_ccc_cmd_dest_cleanup(&dest); 1142 1143 return ret; 1144} 1145 1146static int i3c_master_getpid_locked(struct i3c_master_controller *master, 1147 struct i3c_device_info *info) 1148{ 1149 struct i3c_ccc_getpid *getpid; 1150 struct i3c_ccc_cmd_dest dest; 1151 struct i3c_ccc_cmd cmd; 1152 int ret, i; 1153 1154 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid)); 1155 if (!getpid) 1156 return -ENOMEM; 1157 1158 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1); 1159 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1160 if (ret) 1161 goto out; 1162 1163 info->pid = 0; 1164 for (i = 0; i < sizeof(getpid->pid); i++) { 1165 int sft = (sizeof(getpid->pid) - i - 1) * 8; 1166 1167 info->pid |= (u64)getpid->pid[i] << sft; 1168 } 1169 1170out: 1171 i3c_ccc_cmd_dest_cleanup(&dest); 1172 1173 return ret; 1174} 1175 1176static int i3c_master_getbcr_locked(struct i3c_master_controller *master, 1177 struct i3c_device_info *info) 1178{ 1179 struct i3c_ccc_getbcr *getbcr; 1180 struct i3c_ccc_cmd_dest dest; 1181 struct i3c_ccc_cmd cmd; 1182 int ret; 1183 1184 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr)); 1185 if (!getbcr) 1186 return -ENOMEM; 1187 1188 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1); 1189 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1190 if (ret) 1191 goto out; 1192 1193 info->bcr = getbcr->bcr; 1194 1195out: 1196 i3c_ccc_cmd_dest_cleanup(&dest); 1197 1198 return ret; 1199} 1200 1201static int i3c_master_getdcr_locked(struct i3c_master_controller *master, 1202 struct i3c_device_info *info) 1203{ 1204 struct i3c_ccc_getdcr *getdcr; 1205 struct i3c_ccc_cmd_dest dest; 1206 struct i3c_ccc_cmd cmd; 1207 int ret; 1208 1209 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr)); 1210 if (!getdcr) 1211 return -ENOMEM; 1212 1213 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1); 1214 ret = i3c_master_send_ccc_cmd_locked(master, &cmd); 1215 if (ret) 1216 goto out; 1217 1218 info->dcr = getdcr->dcr; 1219 1220out: 1221 i3c_ccc_cmd_dest_cleanup(&dest); 1222 1223 return ret; 1224} 1225 1226static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev) 1227{ 1228 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1229 enum i3c_addr_slot_status slot_status; 1230 int ret; 1231 1232 if (!dev->info.dyn_addr) 1233 return -EINVAL; 1234 1235 slot_status = i3c_bus_get_addr_slot_status(&master->bus, 1236 dev->info.dyn_addr); 1237 if (slot_status == I3C_ADDR_SLOT_RSVD || 1238 slot_status == I3C_ADDR_SLOT_I2C_DEV) 1239 return -EINVAL; 1240 1241 ret = i3c_master_getpid_locked(master, &dev->info); 1242 if (ret) 1243 return ret; 1244 1245 ret = i3c_master_getbcr_locked(master, &dev->info); 1246 if (ret) 1247 return ret; 1248 1249 ret = i3c_master_getdcr_locked(master, &dev->info); 1250 if (ret) 1251 return ret; 1252 1253 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) { 1254 ret = i3c_master_getmxds_locked(master, &dev->info); 1255 if (ret) 1256 return ret; 1257 } 1258 1259 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) 1260 dev->info.max_ibi_len = 1; 1261 1262 i3c_master_getmrl_locked(master, &dev->info); 1263 i3c_master_getmwl_locked(master, &dev->info); 1264 1265 if (dev->info.bcr & I3C_BCR_HDR_CAP) { 1266 ret = i3c_master_gethdrcap_locked(master, &dev->info); 1267 if (ret) 1268 return ret; 1269 } 1270 1271 return 0; 1272} 1273 1274static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev) 1275{ 1276 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1277 1278 if (dev->info.static_addr) 1279 i3c_bus_set_addr_slot_status(&master->bus, 1280 dev->info.static_addr, 1281 I3C_ADDR_SLOT_FREE); 1282 1283 if (dev->info.dyn_addr) 1284 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1285 I3C_ADDR_SLOT_FREE); 1286 1287 if (dev->boardinfo && dev->boardinfo->init_dyn_addr) 1288 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1289 I3C_ADDR_SLOT_FREE); 1290} 1291 1292static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev) 1293{ 1294 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1295 enum i3c_addr_slot_status status; 1296 1297 if (!dev->info.static_addr && !dev->info.dyn_addr) 1298 return 0; 1299 1300 if (dev->info.static_addr) { 1301 status = i3c_bus_get_addr_slot_status(&master->bus, 1302 dev->info.static_addr); 1303 if (status != I3C_ADDR_SLOT_FREE) 1304 return -EBUSY; 1305 1306 i3c_bus_set_addr_slot_status(&master->bus, 1307 dev->info.static_addr, 1308 I3C_ADDR_SLOT_I3C_DEV); 1309 } 1310 1311 /* 1312 * ->init_dyn_addr should have been reserved before that, so, if we're 1313 * trying to apply a pre-reserved dynamic address, we should not try 1314 * to reserve the address slot a second time. 1315 */ 1316 if (dev->info.dyn_addr && 1317 (!dev->boardinfo || 1318 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) { 1319 status = i3c_bus_get_addr_slot_status(&master->bus, 1320 dev->info.dyn_addr); 1321 if (status != I3C_ADDR_SLOT_FREE) 1322 goto err_release_static_addr; 1323 1324 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr, 1325 I3C_ADDR_SLOT_I3C_DEV); 1326 } 1327 1328 return 0; 1329 1330err_release_static_addr: 1331 if (dev->info.static_addr) 1332 i3c_bus_set_addr_slot_status(&master->bus, 1333 dev->info.static_addr, 1334 I3C_ADDR_SLOT_FREE); 1335 1336 return -EBUSY; 1337} 1338 1339static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master, 1340 struct i3c_dev_desc *dev) 1341{ 1342 int ret; 1343 1344 /* 1345 * We don't attach devices to the controller until they are 1346 * addressable on the bus. 1347 */ 1348 if (!dev->info.static_addr && !dev->info.dyn_addr) 1349 return 0; 1350 1351 ret = i3c_master_get_i3c_addrs(dev); 1352 if (ret) 1353 return ret; 1354 1355 /* Do not attach the master device itself. */ 1356 if (master->this != dev && master->ops->attach_i3c_dev) { 1357 ret = master->ops->attach_i3c_dev(dev); 1358 if (ret) { 1359 i3c_master_put_i3c_addrs(dev); 1360 return ret; 1361 } 1362 } 1363 1364 list_add_tail(&dev->common.node, &master->bus.devs.i3c); 1365 1366 return 0; 1367} 1368 1369static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev, 1370 u8 old_dyn_addr) 1371{ 1372 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1373 enum i3c_addr_slot_status status; 1374 int ret; 1375 1376 if (dev->info.dyn_addr != old_dyn_addr && 1377 (!dev->boardinfo || 1378 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) { 1379 status = i3c_bus_get_addr_slot_status(&master->bus, 1380 dev->info.dyn_addr); 1381 if (status != I3C_ADDR_SLOT_FREE) 1382 return -EBUSY; 1383 i3c_bus_set_addr_slot_status(&master->bus, 1384 dev->info.dyn_addr, 1385 I3C_ADDR_SLOT_I3C_DEV); 1386 } 1387 1388 if (master->ops->reattach_i3c_dev) { 1389 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr); 1390 if (ret) { 1391 i3c_master_put_i3c_addrs(dev); 1392 return ret; 1393 } 1394 } 1395 1396 return 0; 1397} 1398 1399static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev) 1400{ 1401 struct i3c_master_controller *master = i3c_dev_get_master(dev); 1402 1403 /* Do not detach the master device itself. */ 1404 if (master->this != dev && master->ops->detach_i3c_dev) 1405 master->ops->detach_i3c_dev(dev); 1406 1407 i3c_master_put_i3c_addrs(dev); 1408 list_del(&dev->common.node); 1409} 1410 1411static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master, 1412 struct i2c_dev_desc *dev) 1413{ 1414 int ret; 1415 1416 if (master->ops->attach_i2c_dev) { 1417 ret = master->ops->attach_i2c_dev(dev); 1418 if (ret) 1419 return ret; 1420 } 1421 1422 list_add_tail(&dev->common.node, &master->bus.devs.i2c); 1423 1424 return 0; 1425} 1426 1427static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev) 1428{ 1429 struct i3c_master_controller *master = i2c_dev_get_master(dev); 1430 1431 list_del(&dev->common.node); 1432 1433 if (master->ops->detach_i2c_dev) 1434 master->ops->detach_i2c_dev(dev); 1435} 1436 1437static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master, 1438 struct i3c_dev_boardinfo *boardinfo) 1439{ 1440 struct i3c_device_info info = { 1441 .static_addr = boardinfo->static_addr, 1442 }; 1443 struct i3c_dev_desc *i3cdev; 1444 int ret; 1445 1446 i3cdev = i3c_master_alloc_i3c_dev(master, &info); 1447 if (IS_ERR(i3cdev)) 1448 return -ENOMEM; 1449 1450 i3cdev->boardinfo = boardinfo; 1451 1452 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1453 if (ret) 1454 goto err_free_dev; 1455 1456 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr, 1457 i3cdev->boardinfo->init_dyn_addr); 1458 if (ret) 1459 goto err_detach_dev; 1460 1461 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr; 1462 ret = i3c_master_reattach_i3c_dev(i3cdev, 0); 1463 if (ret) 1464 goto err_rstdaa; 1465 1466 ret = i3c_master_retrieve_dev_info(i3cdev); 1467 if (ret) 1468 goto err_rstdaa; 1469 1470 return 0; 1471 1472err_rstdaa: 1473 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr); 1474err_detach_dev: 1475 i3c_master_detach_i3c_dev(i3cdev); 1476err_free_dev: 1477 i3c_master_free_i3c_dev(i3cdev); 1478 1479 return ret; 1480} 1481 1482static void 1483i3c_master_register_new_i3c_devs(struct i3c_master_controller *master) 1484{ 1485 struct i3c_dev_desc *desc; 1486 int ret; 1487 1488 if (!master->init_done) 1489 return; 1490 1491 i3c_bus_for_each_i3cdev(&master->bus, desc) { 1492 if (desc->dev || !desc->info.dyn_addr || desc == master->this) 1493 continue; 1494 1495 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL); 1496 if (!desc->dev) 1497 continue; 1498 1499 desc->dev->bus = &master->bus; 1500 desc->dev->desc = desc; 1501 desc->dev->dev.parent = &master->dev; 1502 desc->dev->dev.type = &i3c_device_type; 1503 desc->dev->dev.bus = &i3c_bus_type; 1504 desc->dev->dev.release = i3c_device_release; 1505 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id, 1506 desc->info.pid); 1507 1508 if (desc->boardinfo) 1509 desc->dev->dev.of_node = desc->boardinfo->of_node; 1510 1511 ret = device_register(&desc->dev->dev); 1512 if (ret) { 1513 dev_err(&master->dev, 1514 "Failed to add I3C device (err = %d)\n", ret); 1515 put_device(&desc->dev->dev); 1516 } 1517 } 1518} 1519 1520/** 1521 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment) 1522 * @master: master doing the DAA 1523 * 1524 * This function is instantiating an I3C device object and adding it to the 1525 * I3C device list. All device information are automatically retrieved using 1526 * standard CCC commands. 1527 * 1528 * The I3C device object is returned in case the master wants to attach 1529 * private data to it using i3c_dev_set_master_data(). 1530 * 1531 * This function must be called with the bus lock held in write mode. 1532 * 1533 * Return: a 0 in case of success, an negative error code otherwise. 1534 */ 1535int i3c_master_do_daa(struct i3c_master_controller *master) 1536{ 1537 int ret; 1538 1539 i3c_bus_maintenance_lock(&master->bus); 1540 ret = master->ops->do_daa(master); 1541 i3c_bus_maintenance_unlock(&master->bus); 1542 1543 if (ret) 1544 return ret; 1545 1546 i3c_bus_normaluse_lock(&master->bus); 1547 i3c_master_register_new_i3c_devs(master); 1548 i3c_bus_normaluse_unlock(&master->bus); 1549 1550 return 0; 1551} 1552EXPORT_SYMBOL_GPL(i3c_master_do_daa); 1553 1554/** 1555 * i3c_master_set_info() - set master device information 1556 * @master: master used to send frames on the bus 1557 * @info: I3C device information 1558 * 1559 * Set master device info. This should be called from 1560 * &i3c_master_controller_ops->bus_init(). 1561 * 1562 * Not all &i3c_device_info fields are meaningful for a master device. 1563 * Here is a list of fields that should be properly filled: 1564 * 1565 * - &i3c_device_info->dyn_addr 1566 * - &i3c_device_info->bcr 1567 * - &i3c_device_info->dcr 1568 * - &i3c_device_info->pid 1569 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in 1570 * &i3c_device_info->bcr 1571 * 1572 * This function must be called with the bus lock held in maintenance mode. 1573 * 1574 * Return: 0 if @info contains valid information (not every piece of 1575 * information can be checked, but we can at least make sure @info->dyn_addr 1576 * and @info->bcr are correct), -EINVAL otherwise. 1577 */ 1578int i3c_master_set_info(struct i3c_master_controller *master, 1579 const struct i3c_device_info *info) 1580{ 1581 struct i3c_dev_desc *i3cdev; 1582 int ret; 1583 1584 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr)) 1585 return -EINVAL; 1586 1587 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER && 1588 master->secondary) 1589 return -EINVAL; 1590 1591 if (master->this) 1592 return -EINVAL; 1593 1594 i3cdev = i3c_master_alloc_i3c_dev(master, info); 1595 if (IS_ERR(i3cdev)) 1596 return PTR_ERR(i3cdev); 1597 1598 master->this = i3cdev; 1599 master->bus.cur_master = master->this; 1600 1601 ret = i3c_master_attach_i3c_dev(master, i3cdev); 1602 if (ret) 1603 goto err_free_dev; 1604 1605 return 0; 1606 1607err_free_dev: 1608 i3c_master_free_i3c_dev(i3cdev); 1609 1610 return ret; 1611} 1612EXPORT_SYMBOL_GPL(i3c_master_set_info); 1613 1614static void i3c_master_detach_free_devs(struct i3c_master_controller *master) 1615{ 1616 struct i3c_dev_desc *i3cdev, *i3ctmp; 1617 struct i2c_dev_desc *i2cdev, *i2ctmp; 1618 1619 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c, 1620 common.node) { 1621 i3c_master_detach_i3c_dev(i3cdev); 1622 1623 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr) 1624 i3c_bus_set_addr_slot_status(&master->bus, 1625 i3cdev->boardinfo->init_dyn_addr, 1626 I3C_ADDR_SLOT_FREE); 1627 1628 i3c_master_free_i3c_dev(i3cdev); 1629 } 1630 1631 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c, 1632 common.node) { 1633 i3c_master_detach_i2c_dev(i2cdev); 1634 i3c_bus_set_addr_slot_status(&master->bus, 1635 i2cdev->addr, 1636 I3C_ADDR_SLOT_FREE); 1637 i3c_master_free_i2c_dev(i2cdev); 1638 } 1639} 1640 1641/** 1642 * i3c_master_bus_init() - initialize an I3C bus 1643 * @master: main master initializing the bus 1644 * 1645 * This function is following all initialisation steps described in the I3C 1646 * specification: 1647 * 1648 * 1. Attach I2C devs to the master so that the master can fill its internal 1649 * device table appropriately 1650 * 1651 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize 1652 * the master controller. That's usually where the bus mode is selected 1653 * (pure bus or mixed fast/slow bus) 1654 * 1655 * 3. Instruct all devices on the bus to drop their dynamic address. This is 1656 * particularly important when the bus was previously configured by someone 1657 * else (for example the bootloader) 1658 * 1659 * 4. Disable all slave events. 1660 * 1661 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices 1662 * also have static_addr, try to pre-assign dynamic addresses requested by 1663 * the FW with SETDASA and attach corresponding statically defined I3C 1664 * devices to the master. 1665 * 1666 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all 1667 * remaining I3C devices 1668 * 1669 * Once this is done, all I3C and I2C devices should be usable. 1670 * 1671 * Return: a 0 in case of success, an negative error code otherwise. 1672 */ 1673static int i3c_master_bus_init(struct i3c_master_controller *master) 1674{ 1675 enum i3c_addr_slot_status status; 1676 struct i2c_dev_boardinfo *i2cboardinfo; 1677 struct i3c_dev_boardinfo *i3cboardinfo; 1678 struct i2c_dev_desc *i2cdev; 1679 int ret; 1680 1681 /* 1682 * First attach all devices with static definitions provided by the 1683 * FW. 1684 */ 1685 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) { 1686 status = i3c_bus_get_addr_slot_status(&master->bus, 1687 i2cboardinfo->base.addr); 1688 if (status != I3C_ADDR_SLOT_FREE) { 1689 ret = -EBUSY; 1690 goto err_detach_devs; 1691 } 1692 1693 i3c_bus_set_addr_slot_status(&master->bus, 1694 i2cboardinfo->base.addr, 1695 I3C_ADDR_SLOT_I2C_DEV); 1696 1697 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo); 1698 if (IS_ERR(i2cdev)) { 1699 ret = PTR_ERR(i2cdev); 1700 goto err_detach_devs; 1701 } 1702 1703 ret = i3c_master_attach_i2c_dev(master, i2cdev); 1704 if (ret) { 1705 i3c_master_free_i2c_dev(i2cdev); 1706 goto err_detach_devs; 1707 } 1708 } 1709 1710 /* 1711 * Now execute the controller specific ->bus_init() routine, which 1712 * might configure its internal logic to match the bus limitations. 1713 */ 1714 ret = master->ops->bus_init(master); 1715 if (ret) 1716 goto err_detach_devs; 1717 1718 /* 1719 * The master device should have been instantiated in ->bus_init(), 1720 * complain if this was not the case. 1721 */ 1722 if (!master->this) { 1723 dev_err(&master->dev, 1724 "master_set_info() was not called in ->bus_init()\n"); 1725 ret = -EINVAL; 1726 goto err_bus_cleanup; 1727 } 1728 1729 /* 1730 * Reset all dynamic address that may have been assigned before 1731 * (assigned by the bootloader for example). 1732 */ 1733 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1734 if (ret && ret != I3C_ERROR_M2) 1735 goto err_bus_cleanup; 1736 1737 /* Disable all slave events before starting DAA. */ 1738 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, 1739 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | 1740 I3C_CCC_EVENT_HJ); 1741 if (ret && ret != I3C_ERROR_M2) 1742 goto err_bus_cleanup; 1743 1744 /* 1745 * Reserve init_dyn_addr first, and then try to pre-assign dynamic 1746 * address and retrieve device information if needed. 1747 * In case pre-assign dynamic address fails, setting dynamic address to 1748 * the requested init_dyn_addr is retried after DAA is done in 1749 * i3c_master_add_i3c_dev_locked(). 1750 */ 1751 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1752 1753 /* 1754 * We don't reserve a dynamic address for devices that 1755 * don't explicitly request one. 1756 */ 1757 if (!i3cboardinfo->init_dyn_addr) 1758 continue; 1759 1760 ret = i3c_bus_get_addr_slot_status(&master->bus, 1761 i3cboardinfo->init_dyn_addr); 1762 if (ret != I3C_ADDR_SLOT_FREE) { 1763 ret = -EBUSY; 1764 goto err_rstdaa; 1765 } 1766 1767 i3c_bus_set_addr_slot_status(&master->bus, 1768 i3cboardinfo->init_dyn_addr, 1769 I3C_ADDR_SLOT_I3C_DEV); 1770 1771 /* 1772 * Only try to create/attach devices that have a static 1773 * address. Other devices will be created/attached when 1774 * DAA happens, and the requested dynamic address will 1775 * be set using SETNEWDA once those devices become 1776 * addressable. 1777 */ 1778 1779 if (i3cboardinfo->static_addr) 1780 i3c_master_early_i3c_dev_add(master, i3cboardinfo); 1781 } 1782 1783 ret = i3c_master_do_daa(master); 1784 if (ret) 1785 goto err_rstdaa; 1786 1787 return 0; 1788 1789err_rstdaa: 1790 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR); 1791 1792err_bus_cleanup: 1793 if (master->ops->bus_cleanup) 1794 master->ops->bus_cleanup(master); 1795 1796err_detach_devs: 1797 i3c_master_detach_free_devs(master); 1798 1799 return ret; 1800} 1801 1802static void i3c_master_bus_cleanup(struct i3c_master_controller *master) 1803{ 1804 if (master->ops->bus_cleanup) 1805 master->ops->bus_cleanup(master); 1806 1807 i3c_master_detach_free_devs(master); 1808} 1809 1810static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev) 1811{ 1812 struct i3c_master_controller *master = i3cdev->common.master; 1813 struct i3c_dev_boardinfo *i3cboardinfo; 1814 1815 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) { 1816 if (i3cdev->info.pid != i3cboardinfo->pid) 1817 continue; 1818 1819 i3cdev->boardinfo = i3cboardinfo; 1820 i3cdev->info.static_addr = i3cboardinfo->static_addr; 1821 return; 1822 } 1823} 1824 1825static struct i3c_dev_desc * 1826i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev) 1827{ 1828 struct i3c_master_controller *master = i3c_dev_get_master(refdev); 1829 struct i3c_dev_desc *i3cdev; 1830 1831 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 1832 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid) 1833 return i3cdev; 1834 } 1835 1836 return NULL; 1837} 1838 1839/** 1840 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus 1841 * @master: master used to send frames on the bus 1842 * @addr: I3C slave dynamic address assigned to the device 1843 * 1844 * This function is instantiating an I3C device object and adding it to the 1845 * I3C device list. All device information are automatically retrieved using 1846 * standard CCC commands. 1847 * 1848 * The I3C device object is returned in case the master wants to attach 1849 * private data to it using i3c_dev_set_master_data(). 1850 * 1851 * This function must be called with the bus lock held in write mode. 1852 * 1853 * Return: a 0 in case of success, an negative error code otherwise. 1854 */ 1855int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master, 1856 u8 addr) 1857{ 1858 struct i3c_device_info info = { .dyn_addr = addr }; 1859 struct i3c_dev_desc *newdev, *olddev; 1860 u8 old_dyn_addr = addr, expected_dyn_addr; 1861 struct i3c_ibi_setup ibireq = { }; 1862 bool enable_ibi = false; 1863 int ret; 1864 1865 if (!master) 1866 return -EINVAL; 1867 1868 newdev = i3c_master_alloc_i3c_dev(master, &info); 1869 if (IS_ERR(newdev)) 1870 return PTR_ERR(newdev); 1871 1872 ret = i3c_master_attach_i3c_dev(master, newdev); 1873 if (ret) 1874 goto err_free_dev; 1875 1876 ret = i3c_master_retrieve_dev_info(newdev); 1877 if (ret) 1878 goto err_detach_dev; 1879 1880 i3c_master_attach_boardinfo(newdev); 1881 1882 olddev = i3c_master_search_i3c_dev_duplicate(newdev); 1883 if (olddev) { 1884 newdev->dev = olddev->dev; 1885 if (newdev->dev) 1886 newdev->dev->desc = newdev; 1887 1888 /* 1889 * We need to restore the IBI state too, so let's save the 1890 * IBI information and try to restore them after olddev has 1891 * been detached+released and its IBI has been stopped and 1892 * the associated resources have been freed. 1893 */ 1894 mutex_lock(&olddev->ibi_lock); 1895 if (olddev->ibi) { 1896 ibireq.handler = olddev->ibi->handler; 1897 ibireq.max_payload_len = olddev->ibi->max_payload_len; 1898 ibireq.num_slots = olddev->ibi->num_slots; 1899 1900 if (olddev->ibi->enabled) { 1901 enable_ibi = true; 1902 i3c_dev_disable_ibi_locked(olddev); 1903 } 1904 1905 i3c_dev_free_ibi_locked(olddev); 1906 } 1907 mutex_unlock(&olddev->ibi_lock); 1908 1909 old_dyn_addr = olddev->info.dyn_addr; 1910 1911 i3c_master_detach_i3c_dev(olddev); 1912 i3c_master_free_i3c_dev(olddev); 1913 } 1914 1915 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 1916 if (ret) 1917 goto err_detach_dev; 1918 1919 /* 1920 * Depending on our previous state, the expected dynamic address might 1921 * differ: 1922 * - if the device already had a dynamic address assigned, let's try to 1923 * re-apply this one 1924 * - if the device did not have a dynamic address and the firmware 1925 * requested a specific address, pick this one 1926 * - in any other case, keep the address automatically assigned by the 1927 * master 1928 */ 1929 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr) 1930 expected_dyn_addr = old_dyn_addr; 1931 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr) 1932 expected_dyn_addr = newdev->boardinfo->init_dyn_addr; 1933 else 1934 expected_dyn_addr = newdev->info.dyn_addr; 1935 1936 if (newdev->info.dyn_addr != expected_dyn_addr) { 1937 /* 1938 * Try to apply the expected dynamic address. If it fails, keep 1939 * the address assigned by the master. 1940 */ 1941 ret = i3c_master_setnewda_locked(master, 1942 newdev->info.dyn_addr, 1943 expected_dyn_addr); 1944 if (!ret) { 1945 old_dyn_addr = newdev->info.dyn_addr; 1946 newdev->info.dyn_addr = expected_dyn_addr; 1947 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr); 1948 } else { 1949 dev_err(&master->dev, 1950 "Failed to assign reserved/old address to device %d%llx", 1951 master->bus.id, newdev->info.pid); 1952 } 1953 } 1954 1955 /* 1956 * Now is time to try to restore the IBI setup. If we're lucky, 1957 * everything works as before, otherwise, all we can do is complain. 1958 * FIXME: maybe we should add callback to inform the driver that it 1959 * should request the IBI again instead of trying to hide that from 1960 * him. 1961 */ 1962 if (ibireq.handler) { 1963 mutex_lock(&newdev->ibi_lock); 1964 ret = i3c_dev_request_ibi_locked(newdev, &ibireq); 1965 if (ret) { 1966 dev_err(&master->dev, 1967 "Failed to request IBI on device %d-%llx", 1968 master->bus.id, newdev->info.pid); 1969 } else if (enable_ibi) { 1970 ret = i3c_dev_enable_ibi_locked(newdev); 1971 if (ret) 1972 dev_err(&master->dev, 1973 "Failed to re-enable IBI on device %d-%llx", 1974 master->bus.id, newdev->info.pid); 1975 } 1976 mutex_unlock(&newdev->ibi_lock); 1977 } 1978 1979 return 0; 1980 1981err_detach_dev: 1982 if (newdev->dev && newdev->dev->desc) 1983 newdev->dev->desc = NULL; 1984 1985 i3c_master_detach_i3c_dev(newdev); 1986 1987err_free_dev: 1988 i3c_master_free_i3c_dev(newdev); 1989 1990 return ret; 1991} 1992EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked); 1993 1994#define OF_I3C_REG1_IS_I2C_DEV BIT(31) 1995 1996static int 1997of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master, 1998 struct device_node *node, u32 *reg) 1999{ 2000 struct i2c_dev_boardinfo *boardinfo; 2001 struct device *dev = &master->dev; 2002 int ret; 2003 2004 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2005 if (!boardinfo) 2006 return -ENOMEM; 2007 2008 ret = of_i2c_get_board_info(dev, node, &boardinfo->base); 2009 if (ret) 2010 return ret; 2011 2012 /* 2013 * The I3C Specification does not clearly say I2C devices with 10-bit 2014 * address are supported. These devices can't be passed properly through 2015 * DEFSLVS command. 2016 */ 2017 if (boardinfo->base.flags & I2C_CLIENT_TEN) { 2018 dev_err(dev, "I2C device with 10 bit address not supported."); 2019 return -ENOTSUPP; 2020 } 2021 2022 /* LVR is encoded in reg[2]. */ 2023 boardinfo->lvr = reg[2]; 2024 2025 list_add_tail(&boardinfo->node, &master->boardinfo.i2c); 2026 of_node_get(node); 2027 2028 return 0; 2029} 2030 2031static int 2032of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master, 2033 struct device_node *node, u32 *reg) 2034{ 2035 struct i3c_dev_boardinfo *boardinfo; 2036 struct device *dev = &master->dev; 2037 enum i3c_addr_slot_status addrstatus; 2038 u32 init_dyn_addr = 0; 2039 2040 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL); 2041 if (!boardinfo) 2042 return -ENOMEM; 2043 2044 if (reg[0]) { 2045 if (reg[0] > I3C_MAX_ADDR) 2046 return -EINVAL; 2047 2048 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2049 reg[0]); 2050 if (addrstatus != I3C_ADDR_SLOT_FREE) 2051 return -EINVAL; 2052 } 2053 2054 boardinfo->static_addr = reg[0]; 2055 2056 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) { 2057 if (init_dyn_addr > I3C_MAX_ADDR) 2058 return -EINVAL; 2059 2060 addrstatus = i3c_bus_get_addr_slot_status(&master->bus, 2061 init_dyn_addr); 2062 if (addrstatus != I3C_ADDR_SLOT_FREE) 2063 return -EINVAL; 2064 } 2065 2066 boardinfo->pid = ((u64)reg[1] << 32) | reg[2]; 2067 2068 if ((boardinfo->pid & GENMASK_ULL(63, 48)) || 2069 I3C_PID_RND_LOWER_32BITS(boardinfo->pid)) 2070 return -EINVAL; 2071 2072 boardinfo->init_dyn_addr = init_dyn_addr; 2073 boardinfo->of_node = of_node_get(node); 2074 list_add_tail(&boardinfo->node, &master->boardinfo.i3c); 2075 2076 return 0; 2077} 2078 2079static int of_i3c_master_add_dev(struct i3c_master_controller *master, 2080 struct device_node *node) 2081{ 2082 u32 reg[3]; 2083 int ret; 2084 2085 if (!master || !node) 2086 return -EINVAL; 2087 2088 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg)); 2089 if (ret) 2090 return ret; 2091 2092 /* 2093 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're 2094 * dealing with an I2C device. 2095 */ 2096 if (!reg[1]) 2097 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg); 2098 else 2099 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg); 2100 2101 return ret; 2102} 2103 2104static int of_populate_i3c_bus(struct i3c_master_controller *master) 2105{ 2106 struct device *dev = &master->dev; 2107 struct device_node *i3cbus_np = dev->of_node; 2108 struct device_node *node; 2109 int ret; 2110 u32 val; 2111 2112 if (!i3cbus_np) 2113 return 0; 2114 2115 for_each_available_child_of_node(i3cbus_np, node) { 2116 ret = of_i3c_master_add_dev(master, node); 2117 if (ret) { 2118 of_node_put(node); 2119 return ret; 2120 } 2121 } 2122 2123 /* 2124 * The user might want to limit I2C and I3C speed in case some devices 2125 * on the bus are not supporting typical rates, or if the bus topology 2126 * prevents it from using max possible rate. 2127 */ 2128 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val)) 2129 master->bus.scl_rate.i2c = val; 2130 2131 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val)) 2132 master->bus.scl_rate.i3c = val; 2133 2134 return 0; 2135} 2136 2137static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap, 2138 struct i2c_msg *xfers, int nxfers) 2139{ 2140 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap); 2141 struct i2c_dev_desc *dev; 2142 int i, ret; 2143 u16 addr; 2144 2145 if (!xfers || !master || nxfers <= 0) 2146 return -EINVAL; 2147 2148 if (!master->ops->i2c_xfers) 2149 return -ENOTSUPP; 2150 2151 /* Doing transfers to different devices is not supported. */ 2152 addr = xfers[0].addr; 2153 for (i = 1; i < nxfers; i++) { 2154 if (addr != xfers[i].addr) 2155 return -ENOTSUPP; 2156 } 2157 2158 i3c_bus_normaluse_lock(&master->bus); 2159 dev = i3c_master_find_i2c_dev_by_addr(master, addr); 2160 if (!dev) 2161 ret = -ENOENT; 2162 else 2163 ret = master->ops->i2c_xfers(dev, xfers, nxfers); 2164 i3c_bus_normaluse_unlock(&master->bus); 2165 2166 return ret ? ret : nxfers; 2167} 2168 2169static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter) 2170{ 2171 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C; 2172} 2173 2174static const struct i2c_algorithm i3c_master_i2c_algo = { 2175 .master_xfer = i3c_master_i2c_adapter_xfer, 2176 .functionality = i3c_master_i2c_funcs, 2177}; 2178 2179static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master) 2180{ 2181 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master); 2182 struct i2c_dev_desc *i2cdev; 2183 int ret; 2184 2185 adap->dev.parent = master->dev.parent; 2186 adap->owner = master->dev.parent->driver->owner; 2187 adap->algo = &i3c_master_i2c_algo; 2188 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name)); 2189 2190 /* FIXME: Should we allow i3c masters to override these values? */ 2191 adap->timeout = 1000; 2192 adap->retries = 3; 2193 2194 ret = i2c_add_adapter(adap); 2195 if (ret) 2196 return ret; 2197 2198 /* 2199 * We silently ignore failures here. The bus should keep working 2200 * correctly even if one or more i2c devices are not registered. 2201 */ 2202 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2203 i2cdev->dev = i2c_new_client_device(adap, &i2cdev->boardinfo->base); 2204 2205 return 0; 2206} 2207 2208static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master) 2209{ 2210 struct i2c_dev_desc *i2cdev; 2211 2212 i2c_del_adapter(&master->i2c); 2213 2214 i3c_bus_for_each_i2cdev(&master->bus, i2cdev) 2215 i2cdev->dev = NULL; 2216} 2217 2218static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master) 2219{ 2220 struct i3c_dev_desc *i3cdev; 2221 2222 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) { 2223 if (!i3cdev->dev) 2224 continue; 2225 2226 i3cdev->dev->desc = NULL; 2227 if (device_is_registered(&i3cdev->dev->dev)) 2228 device_unregister(&i3cdev->dev->dev); 2229 else 2230 put_device(&i3cdev->dev->dev); 2231 i3cdev->dev = NULL; 2232 } 2233} 2234 2235/** 2236 * i3c_master_queue_ibi() - Queue an IBI 2237 * @dev: the device this IBI is coming from 2238 * @slot: the IBI slot used to store the payload 2239 * 2240 * Queue an IBI to the controller workqueue. The IBI handler attached to 2241 * the dev will be called from a workqueue context. 2242 */ 2243void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot) 2244{ 2245 atomic_inc(&dev->ibi->pending_ibis); 2246 queue_work(dev->common.master->wq, &slot->work); 2247} 2248EXPORT_SYMBOL_GPL(i3c_master_queue_ibi); 2249 2250static void i3c_master_handle_ibi(struct work_struct *work) 2251{ 2252 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot, 2253 work); 2254 struct i3c_dev_desc *dev = slot->dev; 2255 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2256 struct i3c_ibi_payload payload; 2257 2258 payload.data = slot->data; 2259 payload.len = slot->len; 2260 2261 if (dev->dev) 2262 dev->ibi->handler(dev->dev, &payload); 2263 2264 master->ops->recycle_ibi_slot(dev, slot); 2265 if (atomic_dec_and_test(&dev->ibi->pending_ibis)) 2266 complete(&dev->ibi->all_ibis_handled); 2267} 2268 2269static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev, 2270 struct i3c_ibi_slot *slot) 2271{ 2272 slot->dev = dev; 2273 INIT_WORK(&slot->work, i3c_master_handle_ibi); 2274} 2275 2276struct i3c_generic_ibi_slot { 2277 struct list_head node; 2278 struct i3c_ibi_slot base; 2279}; 2280 2281struct i3c_generic_ibi_pool { 2282 spinlock_t lock; 2283 unsigned int num_slots; 2284 struct i3c_generic_ibi_slot *slots; 2285 void *payload_buf; 2286 struct list_head free_slots; 2287 struct list_head pending; 2288}; 2289 2290/** 2291 * i3c_generic_ibi_free_pool() - Free a generic IBI pool 2292 * @pool: the IBI pool to free 2293 * 2294 * Free all IBI slots allated by a generic IBI pool. 2295 */ 2296void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool) 2297{ 2298 struct i3c_generic_ibi_slot *slot; 2299 unsigned int nslots = 0; 2300 2301 while (!list_empty(&pool->free_slots)) { 2302 slot = list_first_entry(&pool->free_slots, 2303 struct i3c_generic_ibi_slot, node); 2304 list_del(&slot->node); 2305 nslots++; 2306 } 2307 2308 /* 2309 * If the number of freed slots is not equal to the number of allocated 2310 * slots we have a leak somewhere. 2311 */ 2312 WARN_ON(nslots != pool->num_slots); 2313 2314 kfree(pool->payload_buf); 2315 kfree(pool->slots); 2316 kfree(pool); 2317} 2318EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool); 2319 2320/** 2321 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool 2322 * @dev: the device this pool will be used for 2323 * @req: IBI setup request describing what the device driver expects 2324 * 2325 * Create a generic IBI pool based on the information provided in @req. 2326 * 2327 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise. 2328 */ 2329struct i3c_generic_ibi_pool * 2330i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev, 2331 const struct i3c_ibi_setup *req) 2332{ 2333 struct i3c_generic_ibi_pool *pool; 2334 struct i3c_generic_ibi_slot *slot; 2335 unsigned int i; 2336 int ret; 2337 2338 pool = kzalloc(sizeof(*pool), GFP_KERNEL); 2339 if (!pool) 2340 return ERR_PTR(-ENOMEM); 2341 2342 spin_lock_init(&pool->lock); 2343 INIT_LIST_HEAD(&pool->free_slots); 2344 INIT_LIST_HEAD(&pool->pending); 2345 2346 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL); 2347 if (!pool->slots) { 2348 ret = -ENOMEM; 2349 goto err_free_pool; 2350 } 2351 2352 if (req->max_payload_len) { 2353 pool->payload_buf = kcalloc(req->num_slots, 2354 req->max_payload_len, GFP_KERNEL); 2355 if (!pool->payload_buf) { 2356 ret = -ENOMEM; 2357 goto err_free_pool; 2358 } 2359 } 2360 2361 for (i = 0; i < req->num_slots; i++) { 2362 slot = &pool->slots[i]; 2363 i3c_master_init_ibi_slot(dev, &slot->base); 2364 2365 if (req->max_payload_len) 2366 slot->base.data = pool->payload_buf + 2367 (i * req->max_payload_len); 2368 2369 list_add_tail(&slot->node, &pool->free_slots); 2370 pool->num_slots++; 2371 } 2372 2373 return pool; 2374 2375err_free_pool: 2376 i3c_generic_ibi_free_pool(pool); 2377 return ERR_PTR(ret); 2378} 2379EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool); 2380 2381/** 2382 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool 2383 * @pool: the pool to query an IBI slot on 2384 * 2385 * Search for a free slot in a generic IBI pool. 2386 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot() 2387 * when it's no longer needed. 2388 * 2389 * Return: a pointer to a free slot, or NULL if there's no free slot available. 2390 */ 2391struct i3c_ibi_slot * 2392i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool) 2393{ 2394 struct i3c_generic_ibi_slot *slot; 2395 unsigned long flags; 2396 2397 spin_lock_irqsave(&pool->lock, flags); 2398 slot = list_first_entry_or_null(&pool->free_slots, 2399 struct i3c_generic_ibi_slot, node); 2400 if (slot) 2401 list_del(&slot->node); 2402 spin_unlock_irqrestore(&pool->lock, flags); 2403 2404 return slot ? &slot->base : NULL; 2405} 2406EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot); 2407 2408/** 2409 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool 2410 * @pool: the pool to return the IBI slot to 2411 * @s: IBI slot to recycle 2412 * 2413 * Add an IBI slot back to its generic IBI pool. Should be called from the 2414 * master driver struct_master_controller_ops->recycle_ibi() method. 2415 */ 2416void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool, 2417 struct i3c_ibi_slot *s) 2418{ 2419 struct i3c_generic_ibi_slot *slot; 2420 unsigned long flags; 2421 2422 if (!s) 2423 return; 2424 2425 slot = container_of(s, struct i3c_generic_ibi_slot, base); 2426 spin_lock_irqsave(&pool->lock, flags); 2427 list_add_tail(&slot->node, &pool->free_slots); 2428 spin_unlock_irqrestore(&pool->lock, flags); 2429} 2430EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); 2431 2432static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops) 2433{ 2434 if (!ops || !ops->bus_init || !ops->priv_xfers || 2435 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) 2436 return -EINVAL; 2437 2438 if (ops->request_ibi && 2439 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || 2440 !ops->recycle_ibi_slot)) 2441 return -EINVAL; 2442 2443 return 0; 2444} 2445 2446/** 2447 * i3c_master_register() - register an I3C master 2448 * @master: master used to send frames on the bus 2449 * @parent: the parent device (the one that provides this I3C master 2450 * controller) 2451 * @ops: the master controller operations 2452 * @secondary: true if you are registering a secondary master. Will return 2453 * -ENOTSUPP if set to true since secondary masters are not yet 2454 * supported 2455 * 2456 * This function takes care of everything for you: 2457 * 2458 * - creates and initializes the I3C bus 2459 * - populates the bus with static I2C devs if @parent->of_node is not 2460 * NULL 2461 * - registers all I3C devices added by the controller during bus 2462 * initialization 2463 * - registers the I2C adapter and all I2C devices 2464 * 2465 * Return: 0 in case of success, a negative error code otherwise. 2466 */ 2467int i3c_master_register(struct i3c_master_controller *master, 2468 struct device *parent, 2469 const struct i3c_master_controller_ops *ops, 2470 bool secondary) 2471{ 2472 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE; 2473 struct i3c_bus *i3cbus = i3c_master_get_bus(master); 2474 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE; 2475 struct i2c_dev_boardinfo *i2cbi; 2476 int ret; 2477 2478 /* We do not support secondary masters yet. */ 2479 if (secondary) 2480 return -ENOTSUPP; 2481 2482 ret = i3c_master_check_ops(ops); 2483 if (ret) 2484 return ret; 2485 2486 master->dev.parent = parent; 2487 master->dev.of_node = of_node_get(parent->of_node); 2488 master->dev.bus = &i3c_bus_type; 2489 master->dev.type = &i3c_masterdev_type; 2490 master->dev.release = i3c_masterdev_release; 2491 master->ops = ops; 2492 master->secondary = secondary; 2493 INIT_LIST_HEAD(&master->boardinfo.i2c); 2494 INIT_LIST_HEAD(&master->boardinfo.i3c); 2495 2496 ret = i3c_bus_init(i3cbus); 2497 if (ret) 2498 return ret; 2499 2500 device_initialize(&master->dev); 2501 dev_set_name(&master->dev, "i3c-%d", i3cbus->id); 2502 2503 ret = of_populate_i3c_bus(master); 2504 if (ret) 2505 goto err_put_dev; 2506 2507 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) { 2508 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) { 2509 case I3C_LVR_I2C_INDEX(0): 2510 if (mode < I3C_BUS_MODE_MIXED_FAST) 2511 mode = I3C_BUS_MODE_MIXED_FAST; 2512 break; 2513 case I3C_LVR_I2C_INDEX(1): 2514 if (mode < I3C_BUS_MODE_MIXED_LIMITED) 2515 mode = I3C_BUS_MODE_MIXED_LIMITED; 2516 break; 2517 case I3C_LVR_I2C_INDEX(2): 2518 if (mode < I3C_BUS_MODE_MIXED_SLOW) 2519 mode = I3C_BUS_MODE_MIXED_SLOW; 2520 break; 2521 default: 2522 ret = -EINVAL; 2523 goto err_put_dev; 2524 } 2525 2526 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE) 2527 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE; 2528 } 2529 2530 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate); 2531 if (ret) 2532 goto err_put_dev; 2533 2534 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent)); 2535 if (!master->wq) { 2536 ret = -ENOMEM; 2537 goto err_put_dev; 2538 } 2539 2540 ret = i3c_master_bus_init(master); 2541 if (ret) 2542 goto err_put_dev; 2543 2544 ret = device_add(&master->dev); 2545 if (ret) 2546 goto err_cleanup_bus; 2547 2548 /* 2549 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed 2550 * through the I2C subsystem. 2551 */ 2552 ret = i3c_master_i2c_adapter_init(master); 2553 if (ret) 2554 goto err_del_dev; 2555 2556 /* 2557 * We're done initializing the bus and the controller, we can now 2558 * register I3C devices discovered during the initial DAA. 2559 */ 2560 master->init_done = true; 2561 i3c_bus_normaluse_lock(&master->bus); 2562 i3c_master_register_new_i3c_devs(master); 2563 i3c_bus_normaluse_unlock(&master->bus); 2564 2565 return 0; 2566 2567err_del_dev: 2568 device_del(&master->dev); 2569 2570err_cleanup_bus: 2571 i3c_master_bus_cleanup(master); 2572 2573err_put_dev: 2574 put_device(&master->dev); 2575 2576 return ret; 2577} 2578EXPORT_SYMBOL_GPL(i3c_master_register); 2579 2580/** 2581 * i3c_master_unregister() - unregister an I3C master 2582 * @master: master used to send frames on the bus 2583 * 2584 * Basically undo everything done in i3c_master_register(). 2585 * 2586 * Return: 0 in case of success, a negative error code otherwise. 2587 */ 2588int i3c_master_unregister(struct i3c_master_controller *master) 2589{ 2590 i3c_master_i2c_adapter_cleanup(master); 2591 i3c_master_unregister_i3c_devs(master); 2592 i3c_master_bus_cleanup(master); 2593 device_unregister(&master->dev); 2594 2595 return 0; 2596} 2597EXPORT_SYMBOL_GPL(i3c_master_unregister); 2598 2599int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, 2600 struct i3c_priv_xfer *xfers, 2601 int nxfers) 2602{ 2603 struct i3c_master_controller *master; 2604 2605 if (!dev) 2606 return -ENOENT; 2607 2608 master = i3c_dev_get_master(dev); 2609 if (!master || !xfers) 2610 return -EINVAL; 2611 2612 if (!master->ops->priv_xfers) 2613 return -ENOTSUPP; 2614 2615 return master->ops->priv_xfers(dev, xfers, nxfers); 2616} 2617 2618int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev) 2619{ 2620 struct i3c_master_controller *master; 2621 int ret; 2622 2623 if (!dev->ibi) 2624 return -EINVAL; 2625 2626 master = i3c_dev_get_master(dev); 2627 ret = master->ops->disable_ibi(dev); 2628 if (ret) 2629 return ret; 2630 2631 reinit_completion(&dev->ibi->all_ibis_handled); 2632 if (atomic_read(&dev->ibi->pending_ibis)) 2633 wait_for_completion(&dev->ibi->all_ibis_handled); 2634 2635 dev->ibi->enabled = false; 2636 2637 return 0; 2638} 2639 2640int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev) 2641{ 2642 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2643 int ret; 2644 2645 if (!dev->ibi) 2646 return -EINVAL; 2647 2648 ret = master->ops->enable_ibi(dev); 2649 if (!ret) 2650 dev->ibi->enabled = true; 2651 2652 return ret; 2653} 2654 2655int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, 2656 const struct i3c_ibi_setup *req) 2657{ 2658 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2659 struct i3c_device_ibi_info *ibi; 2660 int ret; 2661 2662 if (!master->ops->request_ibi) 2663 return -ENOTSUPP; 2664 2665 if (dev->ibi) 2666 return -EBUSY; 2667 2668 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL); 2669 if (!ibi) 2670 return -ENOMEM; 2671 2672 atomic_set(&ibi->pending_ibis, 0); 2673 init_completion(&ibi->all_ibis_handled); 2674 ibi->handler = req->handler; 2675 ibi->max_payload_len = req->max_payload_len; 2676 ibi->num_slots = req->num_slots; 2677 2678 dev->ibi = ibi; 2679 ret = master->ops->request_ibi(dev, req); 2680 if (ret) { 2681 kfree(ibi); 2682 dev->ibi = NULL; 2683 } 2684 2685 return ret; 2686} 2687 2688void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev) 2689{ 2690 struct i3c_master_controller *master = i3c_dev_get_master(dev); 2691 2692 if (!dev->ibi) 2693 return; 2694 2695 if (WARN_ON(dev->ibi->enabled)) 2696 WARN_ON(i3c_dev_disable_ibi_locked(dev)); 2697 2698 master->ops->free_ibi(dev); 2699 kfree(dev->ibi); 2700 dev->ibi = NULL; 2701} 2702 2703static int __init i3c_init(void) 2704{ 2705 return bus_register(&i3c_bus_type); 2706} 2707subsys_initcall(i3c_init); 2708 2709static void __exit i3c_exit(void) 2710{ 2711 idr_destroy(&i3c_bus_idr); 2712 bus_unregister(&i3c_bus_type); 2713} 2714module_exit(i3c_exit); 2715 2716MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>"); 2717MODULE_DESCRIPTION("I3C core"); 2718MODULE_LICENSE("GPL v2"); 2719