18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci i2c-stub.c - I2C/SMBus chip emulator 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci Copyright (c) 2004 Mark M. Hoffman <mhoffman@lightlink.com> 68c2ecf20Sopenharmony_ci Copyright (C) 2007-2014 Jean Delvare <jdelvare@suse.de> 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci*/ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#define DEBUG 1 118c2ecf20Sopenharmony_ci#define pr_fmt(fmt) "i2c-stub: " fmt 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci#include <linux/errno.h> 148c2ecf20Sopenharmony_ci#include <linux/i2c.h> 158c2ecf20Sopenharmony_ci#include <linux/init.h> 168c2ecf20Sopenharmony_ci#include <linux/kernel.h> 178c2ecf20Sopenharmony_ci#include <linux/list.h> 188c2ecf20Sopenharmony_ci#include <linux/module.h> 198c2ecf20Sopenharmony_ci#include <linux/slab.h> 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci#define MAX_CHIPS 10 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci/* 248c2ecf20Sopenharmony_ci * Support for I2C_FUNC_SMBUS_BLOCK_DATA is disabled by default and must 258c2ecf20Sopenharmony_ci * be enabled explicitly by setting the I2C_FUNC_SMBUS_BLOCK_DATA bits 268c2ecf20Sopenharmony_ci * in the 'functionality' module parameter. 278c2ecf20Sopenharmony_ci */ 288c2ecf20Sopenharmony_ci#define STUB_FUNC_DEFAULT \ 298c2ecf20Sopenharmony_ci (I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | \ 308c2ecf20Sopenharmony_ci I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | \ 318c2ecf20Sopenharmony_ci I2C_FUNC_SMBUS_I2C_BLOCK) 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#define STUB_FUNC_ALL \ 348c2ecf20Sopenharmony_ci (STUB_FUNC_DEFAULT | I2C_FUNC_SMBUS_BLOCK_DATA) 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_cistatic unsigned short chip_addr[MAX_CHIPS]; 378c2ecf20Sopenharmony_cimodule_param_array(chip_addr, ushort, NULL, S_IRUGO); 388c2ecf20Sopenharmony_ciMODULE_PARM_DESC(chip_addr, 398c2ecf20Sopenharmony_ci "Chip addresses (up to 10, between 0x03 and 0x77)"); 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_cistatic unsigned long functionality = STUB_FUNC_DEFAULT; 428c2ecf20Sopenharmony_cimodule_param(functionality, ulong, S_IRUGO | S_IWUSR); 438c2ecf20Sopenharmony_ciMODULE_PARM_DESC(functionality, "Override functionality bitfield"); 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci/* Some chips have banked register ranges */ 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_cistatic u8 bank_reg[MAX_CHIPS]; 488c2ecf20Sopenharmony_cimodule_param_array(bank_reg, byte, NULL, S_IRUGO); 498c2ecf20Sopenharmony_ciMODULE_PARM_DESC(bank_reg, "Bank register"); 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_cistatic u8 bank_mask[MAX_CHIPS]; 528c2ecf20Sopenharmony_cimodule_param_array(bank_mask, byte, NULL, S_IRUGO); 538c2ecf20Sopenharmony_ciMODULE_PARM_DESC(bank_mask, "Bank value mask"); 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_cistatic u8 bank_start[MAX_CHIPS]; 568c2ecf20Sopenharmony_cimodule_param_array(bank_start, byte, NULL, S_IRUGO); 578c2ecf20Sopenharmony_ciMODULE_PARM_DESC(bank_start, "First banked register"); 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_cistatic u8 bank_end[MAX_CHIPS]; 608c2ecf20Sopenharmony_cimodule_param_array(bank_end, byte, NULL, S_IRUGO); 618c2ecf20Sopenharmony_ciMODULE_PARM_DESC(bank_end, "Last banked register"); 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_cistruct smbus_block_data { 648c2ecf20Sopenharmony_ci struct list_head node; 658c2ecf20Sopenharmony_ci u8 command; 668c2ecf20Sopenharmony_ci u8 len; 678c2ecf20Sopenharmony_ci u8 block[I2C_SMBUS_BLOCK_MAX]; 688c2ecf20Sopenharmony_ci}; 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_cistruct stub_chip { 718c2ecf20Sopenharmony_ci u8 pointer; 728c2ecf20Sopenharmony_ci u16 words[256]; /* Byte operations use the LSB as per SMBus 738c2ecf20Sopenharmony_ci specification */ 748c2ecf20Sopenharmony_ci struct list_head smbus_blocks; 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci /* For chips with banks, extra registers are allocated dynamically */ 778c2ecf20Sopenharmony_ci u8 bank_reg; 788c2ecf20Sopenharmony_ci u8 bank_shift; 798c2ecf20Sopenharmony_ci u8 bank_mask; 808c2ecf20Sopenharmony_ci u8 bank_sel; /* Currently selected bank */ 818c2ecf20Sopenharmony_ci u8 bank_start; 828c2ecf20Sopenharmony_ci u8 bank_end; 838c2ecf20Sopenharmony_ci u16 bank_size; 848c2ecf20Sopenharmony_ci u16 *bank_words; /* Room for bank_mask * bank_size registers */ 858c2ecf20Sopenharmony_ci}; 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_cistatic struct stub_chip *stub_chips; 888c2ecf20Sopenharmony_cistatic int stub_chips_nr; 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_cistatic struct smbus_block_data *stub_find_block(struct device *dev, 918c2ecf20Sopenharmony_ci struct stub_chip *chip, 928c2ecf20Sopenharmony_ci u8 command, bool create) 938c2ecf20Sopenharmony_ci{ 948c2ecf20Sopenharmony_ci struct smbus_block_data *b, *rb = NULL; 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ci list_for_each_entry(b, &chip->smbus_blocks, node) { 978c2ecf20Sopenharmony_ci if (b->command == command) { 988c2ecf20Sopenharmony_ci rb = b; 998c2ecf20Sopenharmony_ci break; 1008c2ecf20Sopenharmony_ci } 1018c2ecf20Sopenharmony_ci } 1028c2ecf20Sopenharmony_ci if (rb == NULL && create) { 1038c2ecf20Sopenharmony_ci rb = devm_kzalloc(dev, sizeof(*rb), GFP_KERNEL); 1048c2ecf20Sopenharmony_ci if (rb == NULL) 1058c2ecf20Sopenharmony_ci return rb; 1068c2ecf20Sopenharmony_ci rb->command = command; 1078c2ecf20Sopenharmony_ci list_add(&rb->node, &chip->smbus_blocks); 1088c2ecf20Sopenharmony_ci } 1098c2ecf20Sopenharmony_ci return rb; 1108c2ecf20Sopenharmony_ci} 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_cistatic u16 *stub_get_wordp(struct stub_chip *chip, u8 offset) 1138c2ecf20Sopenharmony_ci{ 1148c2ecf20Sopenharmony_ci if (chip->bank_sel && 1158c2ecf20Sopenharmony_ci offset >= chip->bank_start && offset <= chip->bank_end) 1168c2ecf20Sopenharmony_ci return chip->bank_words + 1178c2ecf20Sopenharmony_ci (chip->bank_sel - 1) * chip->bank_size + 1188c2ecf20Sopenharmony_ci offset - chip->bank_start; 1198c2ecf20Sopenharmony_ci else 1208c2ecf20Sopenharmony_ci return chip->words + offset; 1218c2ecf20Sopenharmony_ci} 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ci/* Return negative errno on error. */ 1248c2ecf20Sopenharmony_cistatic s32 stub_xfer(struct i2c_adapter *adap, u16 addr, unsigned short flags, 1258c2ecf20Sopenharmony_ci char read_write, u8 command, int size, union i2c_smbus_data *data) 1268c2ecf20Sopenharmony_ci{ 1278c2ecf20Sopenharmony_ci s32 ret; 1288c2ecf20Sopenharmony_ci int i, len; 1298c2ecf20Sopenharmony_ci struct stub_chip *chip = NULL; 1308c2ecf20Sopenharmony_ci struct smbus_block_data *b; 1318c2ecf20Sopenharmony_ci u16 *wordp; 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci /* Search for the right chip */ 1348c2ecf20Sopenharmony_ci for (i = 0; i < stub_chips_nr; i++) { 1358c2ecf20Sopenharmony_ci if (addr == chip_addr[i]) { 1368c2ecf20Sopenharmony_ci chip = stub_chips + i; 1378c2ecf20Sopenharmony_ci break; 1388c2ecf20Sopenharmony_ci } 1398c2ecf20Sopenharmony_ci } 1408c2ecf20Sopenharmony_ci if (!chip) 1418c2ecf20Sopenharmony_ci return -ENODEV; 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_ci switch (size) { 1448c2ecf20Sopenharmony_ci 1458c2ecf20Sopenharmony_ci case I2C_SMBUS_QUICK: 1468c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, "smbus quick - addr 0x%02x\n", addr); 1478c2ecf20Sopenharmony_ci ret = 0; 1488c2ecf20Sopenharmony_ci break; 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_ci case I2C_SMBUS_BYTE: 1518c2ecf20Sopenharmony_ci if (read_write == I2C_SMBUS_WRITE) { 1528c2ecf20Sopenharmony_ci chip->pointer = command; 1538c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 1548c2ecf20Sopenharmony_ci "smbus byte - addr 0x%02x, wrote 0x%02x.\n", 1558c2ecf20Sopenharmony_ci addr, command); 1568c2ecf20Sopenharmony_ci } else { 1578c2ecf20Sopenharmony_ci wordp = stub_get_wordp(chip, chip->pointer++); 1588c2ecf20Sopenharmony_ci data->byte = *wordp & 0xff; 1598c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 1608c2ecf20Sopenharmony_ci "smbus byte - addr 0x%02x, read 0x%02x.\n", 1618c2ecf20Sopenharmony_ci addr, data->byte); 1628c2ecf20Sopenharmony_ci } 1638c2ecf20Sopenharmony_ci 1648c2ecf20Sopenharmony_ci ret = 0; 1658c2ecf20Sopenharmony_ci break; 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci case I2C_SMBUS_BYTE_DATA: 1688c2ecf20Sopenharmony_ci wordp = stub_get_wordp(chip, command); 1698c2ecf20Sopenharmony_ci if (read_write == I2C_SMBUS_WRITE) { 1708c2ecf20Sopenharmony_ci *wordp &= 0xff00; 1718c2ecf20Sopenharmony_ci *wordp |= data->byte; 1728c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 1738c2ecf20Sopenharmony_ci "smbus byte data - addr 0x%02x, wrote 0x%02x at 0x%02x.\n", 1748c2ecf20Sopenharmony_ci addr, data->byte, command); 1758c2ecf20Sopenharmony_ci 1768c2ecf20Sopenharmony_ci /* Set the bank as needed */ 1778c2ecf20Sopenharmony_ci if (chip->bank_words && command == chip->bank_reg) { 1788c2ecf20Sopenharmony_ci chip->bank_sel = 1798c2ecf20Sopenharmony_ci (data->byte >> chip->bank_shift) 1808c2ecf20Sopenharmony_ci & chip->bank_mask; 1818c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 1828c2ecf20Sopenharmony_ci "switching to bank %u.\n", 1838c2ecf20Sopenharmony_ci chip->bank_sel); 1848c2ecf20Sopenharmony_ci } 1858c2ecf20Sopenharmony_ci } else { 1868c2ecf20Sopenharmony_ci data->byte = *wordp & 0xff; 1878c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 1888c2ecf20Sopenharmony_ci "smbus byte data - addr 0x%02x, read 0x%02x at 0x%02x.\n", 1898c2ecf20Sopenharmony_ci addr, data->byte, command); 1908c2ecf20Sopenharmony_ci } 1918c2ecf20Sopenharmony_ci chip->pointer = command + 1; 1928c2ecf20Sopenharmony_ci 1938c2ecf20Sopenharmony_ci ret = 0; 1948c2ecf20Sopenharmony_ci break; 1958c2ecf20Sopenharmony_ci 1968c2ecf20Sopenharmony_ci case I2C_SMBUS_WORD_DATA: 1978c2ecf20Sopenharmony_ci wordp = stub_get_wordp(chip, command); 1988c2ecf20Sopenharmony_ci if (read_write == I2C_SMBUS_WRITE) { 1998c2ecf20Sopenharmony_ci *wordp = data->word; 2008c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 2018c2ecf20Sopenharmony_ci "smbus word data - addr 0x%02x, wrote 0x%04x at 0x%02x.\n", 2028c2ecf20Sopenharmony_ci addr, data->word, command); 2038c2ecf20Sopenharmony_ci } else { 2048c2ecf20Sopenharmony_ci data->word = *wordp; 2058c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 2068c2ecf20Sopenharmony_ci "smbus word data - addr 0x%02x, read 0x%04x at 0x%02x.\n", 2078c2ecf20Sopenharmony_ci addr, data->word, command); 2088c2ecf20Sopenharmony_ci } 2098c2ecf20Sopenharmony_ci 2108c2ecf20Sopenharmony_ci ret = 0; 2118c2ecf20Sopenharmony_ci break; 2128c2ecf20Sopenharmony_ci 2138c2ecf20Sopenharmony_ci case I2C_SMBUS_I2C_BLOCK_DATA: 2148c2ecf20Sopenharmony_ci /* 2158c2ecf20Sopenharmony_ci * We ignore banks here, because banked chips don't use I2C 2168c2ecf20Sopenharmony_ci * block transfers 2178c2ecf20Sopenharmony_ci */ 2188c2ecf20Sopenharmony_ci if (data->block[0] > 256 - command) /* Avoid overrun */ 2198c2ecf20Sopenharmony_ci data->block[0] = 256 - command; 2208c2ecf20Sopenharmony_ci len = data->block[0]; 2218c2ecf20Sopenharmony_ci if (read_write == I2C_SMBUS_WRITE) { 2228c2ecf20Sopenharmony_ci for (i = 0; i < len; i++) { 2238c2ecf20Sopenharmony_ci chip->words[command + i] &= 0xff00; 2248c2ecf20Sopenharmony_ci chip->words[command + i] |= data->block[1 + i]; 2258c2ecf20Sopenharmony_ci } 2268c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 2278c2ecf20Sopenharmony_ci "i2c block data - addr 0x%02x, wrote %d bytes at 0x%02x.\n", 2288c2ecf20Sopenharmony_ci addr, len, command); 2298c2ecf20Sopenharmony_ci } else { 2308c2ecf20Sopenharmony_ci for (i = 0; i < len; i++) { 2318c2ecf20Sopenharmony_ci data->block[1 + i] = 2328c2ecf20Sopenharmony_ci chip->words[command + i] & 0xff; 2338c2ecf20Sopenharmony_ci } 2348c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 2358c2ecf20Sopenharmony_ci "i2c block data - addr 0x%02x, read %d bytes at 0x%02x.\n", 2368c2ecf20Sopenharmony_ci addr, len, command); 2378c2ecf20Sopenharmony_ci } 2388c2ecf20Sopenharmony_ci 2398c2ecf20Sopenharmony_ci ret = 0; 2408c2ecf20Sopenharmony_ci break; 2418c2ecf20Sopenharmony_ci 2428c2ecf20Sopenharmony_ci case I2C_SMBUS_BLOCK_DATA: 2438c2ecf20Sopenharmony_ci /* 2448c2ecf20Sopenharmony_ci * We ignore banks here, because chips typically don't use both 2458c2ecf20Sopenharmony_ci * banks and SMBus block transfers 2468c2ecf20Sopenharmony_ci */ 2478c2ecf20Sopenharmony_ci b = stub_find_block(&adap->dev, chip, command, false); 2488c2ecf20Sopenharmony_ci if (read_write == I2C_SMBUS_WRITE) { 2498c2ecf20Sopenharmony_ci len = data->block[0]; 2508c2ecf20Sopenharmony_ci if (len == 0 || len > I2C_SMBUS_BLOCK_MAX) { 2518c2ecf20Sopenharmony_ci ret = -EINVAL; 2528c2ecf20Sopenharmony_ci break; 2538c2ecf20Sopenharmony_ci } 2548c2ecf20Sopenharmony_ci if (b == NULL) { 2558c2ecf20Sopenharmony_ci b = stub_find_block(&adap->dev, chip, command, 2568c2ecf20Sopenharmony_ci true); 2578c2ecf20Sopenharmony_ci if (b == NULL) { 2588c2ecf20Sopenharmony_ci ret = -ENOMEM; 2598c2ecf20Sopenharmony_ci break; 2608c2ecf20Sopenharmony_ci } 2618c2ecf20Sopenharmony_ci } 2628c2ecf20Sopenharmony_ci /* Largest write sets read block length */ 2638c2ecf20Sopenharmony_ci if (len > b->len) 2648c2ecf20Sopenharmony_ci b->len = len; 2658c2ecf20Sopenharmony_ci for (i = 0; i < len; i++) 2668c2ecf20Sopenharmony_ci b->block[i] = data->block[i + 1]; 2678c2ecf20Sopenharmony_ci /* update for byte and word commands */ 2688c2ecf20Sopenharmony_ci chip->words[command] = (b->block[0] << 8) | b->len; 2698c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 2708c2ecf20Sopenharmony_ci "smbus block data - addr 0x%02x, wrote %d bytes at 0x%02x.\n", 2718c2ecf20Sopenharmony_ci addr, len, command); 2728c2ecf20Sopenharmony_ci } else { 2738c2ecf20Sopenharmony_ci if (b == NULL) { 2748c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 2758c2ecf20Sopenharmony_ci "SMBus block read command without prior block write not supported\n"); 2768c2ecf20Sopenharmony_ci ret = -EOPNOTSUPP; 2778c2ecf20Sopenharmony_ci break; 2788c2ecf20Sopenharmony_ci } 2798c2ecf20Sopenharmony_ci len = b->len; 2808c2ecf20Sopenharmony_ci data->block[0] = len; 2818c2ecf20Sopenharmony_ci for (i = 0; i < len; i++) 2828c2ecf20Sopenharmony_ci data->block[i + 1] = b->block[i]; 2838c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, 2848c2ecf20Sopenharmony_ci "smbus block data - addr 0x%02x, read %d bytes at 0x%02x.\n", 2858c2ecf20Sopenharmony_ci addr, len, command); 2868c2ecf20Sopenharmony_ci } 2878c2ecf20Sopenharmony_ci 2888c2ecf20Sopenharmony_ci ret = 0; 2898c2ecf20Sopenharmony_ci break; 2908c2ecf20Sopenharmony_ci 2918c2ecf20Sopenharmony_ci default: 2928c2ecf20Sopenharmony_ci dev_dbg(&adap->dev, "Unsupported I2C/SMBus command\n"); 2938c2ecf20Sopenharmony_ci ret = -EOPNOTSUPP; 2948c2ecf20Sopenharmony_ci break; 2958c2ecf20Sopenharmony_ci } /* switch (size) */ 2968c2ecf20Sopenharmony_ci 2978c2ecf20Sopenharmony_ci return ret; 2988c2ecf20Sopenharmony_ci} 2998c2ecf20Sopenharmony_ci 3008c2ecf20Sopenharmony_cistatic u32 stub_func(struct i2c_adapter *adapter) 3018c2ecf20Sopenharmony_ci{ 3028c2ecf20Sopenharmony_ci return STUB_FUNC_ALL & functionality; 3038c2ecf20Sopenharmony_ci} 3048c2ecf20Sopenharmony_ci 3058c2ecf20Sopenharmony_cistatic const struct i2c_algorithm smbus_algorithm = { 3068c2ecf20Sopenharmony_ci .functionality = stub_func, 3078c2ecf20Sopenharmony_ci .smbus_xfer = stub_xfer, 3088c2ecf20Sopenharmony_ci}; 3098c2ecf20Sopenharmony_ci 3108c2ecf20Sopenharmony_cistatic struct i2c_adapter stub_adapter = { 3118c2ecf20Sopenharmony_ci .owner = THIS_MODULE, 3128c2ecf20Sopenharmony_ci .class = I2C_CLASS_HWMON | I2C_CLASS_SPD, 3138c2ecf20Sopenharmony_ci .algo = &smbus_algorithm, 3148c2ecf20Sopenharmony_ci .name = "SMBus stub driver", 3158c2ecf20Sopenharmony_ci}; 3168c2ecf20Sopenharmony_ci 3178c2ecf20Sopenharmony_cistatic int __init i2c_stub_allocate_banks(int i) 3188c2ecf20Sopenharmony_ci{ 3198c2ecf20Sopenharmony_ci struct stub_chip *chip = stub_chips + i; 3208c2ecf20Sopenharmony_ci 3218c2ecf20Sopenharmony_ci chip->bank_reg = bank_reg[i]; 3228c2ecf20Sopenharmony_ci chip->bank_start = bank_start[i]; 3238c2ecf20Sopenharmony_ci chip->bank_end = bank_end[i]; 3248c2ecf20Sopenharmony_ci chip->bank_size = bank_end[i] - bank_start[i] + 1; 3258c2ecf20Sopenharmony_ci 3268c2ecf20Sopenharmony_ci /* We assume that all bits in the mask are contiguous */ 3278c2ecf20Sopenharmony_ci chip->bank_mask = bank_mask[i]; 3288c2ecf20Sopenharmony_ci while (!(chip->bank_mask & 1)) { 3298c2ecf20Sopenharmony_ci chip->bank_shift++; 3308c2ecf20Sopenharmony_ci chip->bank_mask >>= 1; 3318c2ecf20Sopenharmony_ci } 3328c2ecf20Sopenharmony_ci 3338c2ecf20Sopenharmony_ci chip->bank_words = kcalloc(chip->bank_mask * chip->bank_size, 3348c2ecf20Sopenharmony_ci sizeof(u16), 3358c2ecf20Sopenharmony_ci GFP_KERNEL); 3368c2ecf20Sopenharmony_ci if (!chip->bank_words) 3378c2ecf20Sopenharmony_ci return -ENOMEM; 3388c2ecf20Sopenharmony_ci 3398c2ecf20Sopenharmony_ci pr_debug("Allocated %u banks of %u words each (registers 0x%02x to 0x%02x)\n", 3408c2ecf20Sopenharmony_ci chip->bank_mask, chip->bank_size, chip->bank_start, 3418c2ecf20Sopenharmony_ci chip->bank_end); 3428c2ecf20Sopenharmony_ci 3438c2ecf20Sopenharmony_ci return 0; 3448c2ecf20Sopenharmony_ci} 3458c2ecf20Sopenharmony_ci 3468c2ecf20Sopenharmony_cistatic void i2c_stub_free(void) 3478c2ecf20Sopenharmony_ci{ 3488c2ecf20Sopenharmony_ci int i; 3498c2ecf20Sopenharmony_ci 3508c2ecf20Sopenharmony_ci for (i = 0; i < stub_chips_nr; i++) 3518c2ecf20Sopenharmony_ci kfree(stub_chips[i].bank_words); 3528c2ecf20Sopenharmony_ci kfree(stub_chips); 3538c2ecf20Sopenharmony_ci} 3548c2ecf20Sopenharmony_ci 3558c2ecf20Sopenharmony_cistatic int __init i2c_stub_init(void) 3568c2ecf20Sopenharmony_ci{ 3578c2ecf20Sopenharmony_ci int i, ret; 3588c2ecf20Sopenharmony_ci 3598c2ecf20Sopenharmony_ci if (!chip_addr[0]) { 3608c2ecf20Sopenharmony_ci pr_err("Please specify a chip address\n"); 3618c2ecf20Sopenharmony_ci return -ENODEV; 3628c2ecf20Sopenharmony_ci } 3638c2ecf20Sopenharmony_ci 3648c2ecf20Sopenharmony_ci for (i = 0; i < MAX_CHIPS && chip_addr[i]; i++) { 3658c2ecf20Sopenharmony_ci if (chip_addr[i] < 0x03 || chip_addr[i] > 0x77) { 3668c2ecf20Sopenharmony_ci pr_err("Invalid chip address 0x%02x\n", 3678c2ecf20Sopenharmony_ci chip_addr[i]); 3688c2ecf20Sopenharmony_ci return -EINVAL; 3698c2ecf20Sopenharmony_ci } 3708c2ecf20Sopenharmony_ci 3718c2ecf20Sopenharmony_ci pr_info("Virtual chip at 0x%02x\n", chip_addr[i]); 3728c2ecf20Sopenharmony_ci } 3738c2ecf20Sopenharmony_ci 3748c2ecf20Sopenharmony_ci /* Allocate memory for all chips at once */ 3758c2ecf20Sopenharmony_ci stub_chips_nr = i; 3768c2ecf20Sopenharmony_ci stub_chips = kcalloc(stub_chips_nr, sizeof(struct stub_chip), 3778c2ecf20Sopenharmony_ci GFP_KERNEL); 3788c2ecf20Sopenharmony_ci if (!stub_chips) 3798c2ecf20Sopenharmony_ci return -ENOMEM; 3808c2ecf20Sopenharmony_ci 3818c2ecf20Sopenharmony_ci for (i = 0; i < stub_chips_nr; i++) { 3828c2ecf20Sopenharmony_ci INIT_LIST_HEAD(&stub_chips[i].smbus_blocks); 3838c2ecf20Sopenharmony_ci 3848c2ecf20Sopenharmony_ci /* Allocate extra memory for banked register ranges */ 3858c2ecf20Sopenharmony_ci if (bank_mask[i]) { 3868c2ecf20Sopenharmony_ci ret = i2c_stub_allocate_banks(i); 3878c2ecf20Sopenharmony_ci if (ret) 3888c2ecf20Sopenharmony_ci goto fail_free; 3898c2ecf20Sopenharmony_ci } 3908c2ecf20Sopenharmony_ci } 3918c2ecf20Sopenharmony_ci 3928c2ecf20Sopenharmony_ci ret = i2c_add_adapter(&stub_adapter); 3938c2ecf20Sopenharmony_ci if (ret) 3948c2ecf20Sopenharmony_ci goto fail_free; 3958c2ecf20Sopenharmony_ci 3968c2ecf20Sopenharmony_ci return 0; 3978c2ecf20Sopenharmony_ci 3988c2ecf20Sopenharmony_ci fail_free: 3998c2ecf20Sopenharmony_ci i2c_stub_free(); 4008c2ecf20Sopenharmony_ci return ret; 4018c2ecf20Sopenharmony_ci} 4028c2ecf20Sopenharmony_ci 4038c2ecf20Sopenharmony_cistatic void __exit i2c_stub_exit(void) 4048c2ecf20Sopenharmony_ci{ 4058c2ecf20Sopenharmony_ci i2c_del_adapter(&stub_adapter); 4068c2ecf20Sopenharmony_ci i2c_stub_free(); 4078c2ecf20Sopenharmony_ci} 4088c2ecf20Sopenharmony_ci 4098c2ecf20Sopenharmony_ciMODULE_AUTHOR("Mark M. Hoffman <mhoffman@lightlink.com>"); 4108c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("I2C stub driver"); 4118c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 4128c2ecf20Sopenharmony_ci 4138c2ecf20Sopenharmony_cimodule_init(i2c_stub_init); 4148c2ecf20Sopenharmony_cimodule_exit(i2c_stub_exit); 415