18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci    SMBus driver for nVidia nForce2 MCP
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ci    Added nForce3 Pro 150  Thomas Leibold <thomas@plx.com>,
68c2ecf20Sopenharmony_ci	Ported to 2.5 Patrick Dreker <patrick@dreker.de>,
78c2ecf20Sopenharmony_ci    Copyright (c) 2003  Hans-Frieder Vogt <hfvogt@arcor.de>,
88c2ecf20Sopenharmony_ci    Based on
98c2ecf20Sopenharmony_ci    SMBus 2.0 driver for AMD-8111 IO-Hub
108c2ecf20Sopenharmony_ci    Copyright (c) 2002 Vojtech Pavlik
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ci*/
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci/*
158c2ecf20Sopenharmony_ci    SUPPORTED DEVICES		PCI ID
168c2ecf20Sopenharmony_ci    nForce2 MCP			0064
178c2ecf20Sopenharmony_ci    nForce2 Ultra 400 MCP	0084
188c2ecf20Sopenharmony_ci    nForce3 Pro150 MCP		00D4
198c2ecf20Sopenharmony_ci    nForce3 250Gb MCP		00E4
208c2ecf20Sopenharmony_ci    nForce4 MCP			0052
218c2ecf20Sopenharmony_ci    nForce4 MCP-04		0034
228c2ecf20Sopenharmony_ci    nForce MCP51		0264
238c2ecf20Sopenharmony_ci    nForce MCP55		0368
248c2ecf20Sopenharmony_ci    nForce MCP61		03EB
258c2ecf20Sopenharmony_ci    nForce MCP65		0446
268c2ecf20Sopenharmony_ci    nForce MCP67		0542
278c2ecf20Sopenharmony_ci    nForce MCP73		07D8
288c2ecf20Sopenharmony_ci    nForce MCP78S		0752
298c2ecf20Sopenharmony_ci    nForce MCP79		0AA2
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci    This driver supports the 2 SMBuses that are included in the MCP of the
328c2ecf20Sopenharmony_ci    nForce2/3/4/5xx chipsets.
338c2ecf20Sopenharmony_ci*/
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci/* Note: we assume there can only be one nForce2, with two SMBus interfaces */
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci#include <linux/module.h>
388c2ecf20Sopenharmony_ci#include <linux/pci.h>
398c2ecf20Sopenharmony_ci#include <linux/kernel.h>
408c2ecf20Sopenharmony_ci#include <linux/stddef.h>
418c2ecf20Sopenharmony_ci#include <linux/ioport.h>
428c2ecf20Sopenharmony_ci#include <linux/i2c.h>
438c2ecf20Sopenharmony_ci#include <linux/delay.h>
448c2ecf20Sopenharmony_ci#include <linux/dmi.h>
458c2ecf20Sopenharmony_ci#include <linux/acpi.h>
468c2ecf20Sopenharmony_ci#include <linux/slab.h>
478c2ecf20Sopenharmony_ci#include <linux/io.h>
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL");
508c2ecf20Sopenharmony_ciMODULE_AUTHOR("Hans-Frieder Vogt <hfvogt@gmx.net>");
518c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("nForce2/3/4/5xx SMBus driver");
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_ci
548c2ecf20Sopenharmony_cistruct nforce2_smbus {
558c2ecf20Sopenharmony_ci	struct i2c_adapter adapter;
568c2ecf20Sopenharmony_ci	int base;
578c2ecf20Sopenharmony_ci	int size;
588c2ecf20Sopenharmony_ci	int blockops;
598c2ecf20Sopenharmony_ci	int can_abort;
608c2ecf20Sopenharmony_ci};
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_ci/*
648c2ecf20Sopenharmony_ci * nVidia nForce2 SMBus control register definitions
658c2ecf20Sopenharmony_ci * (Newer incarnations use standard BARs 4 and 5 instead)
668c2ecf20Sopenharmony_ci */
678c2ecf20Sopenharmony_ci#define NFORCE_PCI_SMB1	0x50
688c2ecf20Sopenharmony_ci#define NFORCE_PCI_SMB2	0x54
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci
718c2ecf20Sopenharmony_ci/*
728c2ecf20Sopenharmony_ci * ACPI 2.0 chapter 13 SMBus 2.0 EC register model
738c2ecf20Sopenharmony_ci */
748c2ecf20Sopenharmony_ci#define NVIDIA_SMB_PRTCL	(smbus->base + 0x00)	/* protocol, PEC */
758c2ecf20Sopenharmony_ci#define NVIDIA_SMB_STS		(smbus->base + 0x01)	/* status */
768c2ecf20Sopenharmony_ci#define NVIDIA_SMB_ADDR		(smbus->base + 0x02)	/* address */
778c2ecf20Sopenharmony_ci#define NVIDIA_SMB_CMD		(smbus->base + 0x03)	/* command */
788c2ecf20Sopenharmony_ci#define NVIDIA_SMB_DATA		(smbus->base + 0x04)	/* 32 data registers */
798c2ecf20Sopenharmony_ci#define NVIDIA_SMB_BCNT		(smbus->base + 0x24)	/* number of data
808c2ecf20Sopenharmony_ci							   bytes */
818c2ecf20Sopenharmony_ci#define NVIDIA_SMB_STATUS_ABRT	(smbus->base + 0x3c)	/* register used to
828c2ecf20Sopenharmony_ci							   check the status of
838c2ecf20Sopenharmony_ci							   the abort command */
848c2ecf20Sopenharmony_ci#define NVIDIA_SMB_CTRL		(smbus->base + 0x3e)	/* control register */
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci#define NVIDIA_SMB_STATUS_ABRT_STS	0x01		/* Bit to notify that
878c2ecf20Sopenharmony_ci							   abort succeeded */
888c2ecf20Sopenharmony_ci#define NVIDIA_SMB_CTRL_ABORT	0x20
898c2ecf20Sopenharmony_ci#define NVIDIA_SMB_STS_DONE	0x80
908c2ecf20Sopenharmony_ci#define NVIDIA_SMB_STS_ALRM	0x40
918c2ecf20Sopenharmony_ci#define NVIDIA_SMB_STS_RES	0x20
928c2ecf20Sopenharmony_ci#define NVIDIA_SMB_STS_STATUS	0x1f
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_ci#define NVIDIA_SMB_PRTCL_WRITE			0x00
958c2ecf20Sopenharmony_ci#define NVIDIA_SMB_PRTCL_READ			0x01
968c2ecf20Sopenharmony_ci#define NVIDIA_SMB_PRTCL_QUICK			0x02
978c2ecf20Sopenharmony_ci#define NVIDIA_SMB_PRTCL_BYTE			0x04
988c2ecf20Sopenharmony_ci#define NVIDIA_SMB_PRTCL_BYTE_DATA		0x06
998c2ecf20Sopenharmony_ci#define NVIDIA_SMB_PRTCL_WORD_DATA		0x08
1008c2ecf20Sopenharmony_ci#define NVIDIA_SMB_PRTCL_BLOCK_DATA		0x0a
1018c2ecf20Sopenharmony_ci#define NVIDIA_SMB_PRTCL_PEC			0x80
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci/* Misc definitions */
1048c2ecf20Sopenharmony_ci#define MAX_TIMEOUT	100
1058c2ecf20Sopenharmony_ci
1068c2ecf20Sopenharmony_ci/* We disable the second SMBus channel on these boards */
1078c2ecf20Sopenharmony_cistatic const struct dmi_system_id nforce2_dmi_blacklist2[] = {
1088c2ecf20Sopenharmony_ci	{
1098c2ecf20Sopenharmony_ci		.ident = "DFI Lanparty NF4 Expert",
1108c2ecf20Sopenharmony_ci		.matches = {
1118c2ecf20Sopenharmony_ci			DMI_MATCH(DMI_BOARD_VENDOR, "DFI Corp,LTD"),
1128c2ecf20Sopenharmony_ci			DMI_MATCH(DMI_BOARD_NAME, "LP UT NF4 Expert"),
1138c2ecf20Sopenharmony_ci		},
1148c2ecf20Sopenharmony_ci	},
1158c2ecf20Sopenharmony_ci	{ }
1168c2ecf20Sopenharmony_ci};
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_cistatic struct pci_driver nforce2_driver;
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_ci/* For multiplexing support, we need a global reference to the 1st
1218c2ecf20Sopenharmony_ci   SMBus channel */
1228c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_I2C_NFORCE2_S4985)
1238c2ecf20Sopenharmony_cistruct i2c_adapter *nforce2_smbus;
1248c2ecf20Sopenharmony_ciEXPORT_SYMBOL_GPL(nforce2_smbus);
1258c2ecf20Sopenharmony_ci
1268c2ecf20Sopenharmony_cistatic void nforce2_set_reference(struct i2c_adapter *adap)
1278c2ecf20Sopenharmony_ci{
1288c2ecf20Sopenharmony_ci	nforce2_smbus = adap;
1298c2ecf20Sopenharmony_ci}
1308c2ecf20Sopenharmony_ci#else
1318c2ecf20Sopenharmony_cistatic inline void nforce2_set_reference(struct i2c_adapter *adap) { }
1328c2ecf20Sopenharmony_ci#endif
1338c2ecf20Sopenharmony_ci
1348c2ecf20Sopenharmony_cistatic void nforce2_abort(struct i2c_adapter *adap)
1358c2ecf20Sopenharmony_ci{
1368c2ecf20Sopenharmony_ci	struct nforce2_smbus *smbus = adap->algo_data;
1378c2ecf20Sopenharmony_ci	int timeout = 0;
1388c2ecf20Sopenharmony_ci	unsigned char temp;
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ci	dev_dbg(&adap->dev, "Aborting current transaction\n");
1418c2ecf20Sopenharmony_ci
1428c2ecf20Sopenharmony_ci	outb_p(NVIDIA_SMB_CTRL_ABORT, NVIDIA_SMB_CTRL);
1438c2ecf20Sopenharmony_ci	do {
1448c2ecf20Sopenharmony_ci		msleep(1);
1458c2ecf20Sopenharmony_ci		temp = inb_p(NVIDIA_SMB_STATUS_ABRT);
1468c2ecf20Sopenharmony_ci	} while (!(temp & NVIDIA_SMB_STATUS_ABRT_STS) &&
1478c2ecf20Sopenharmony_ci			(timeout++ < MAX_TIMEOUT));
1488c2ecf20Sopenharmony_ci	if (!(temp & NVIDIA_SMB_STATUS_ABRT_STS))
1498c2ecf20Sopenharmony_ci		dev_err(&adap->dev, "Can't reset the smbus\n");
1508c2ecf20Sopenharmony_ci	outb_p(NVIDIA_SMB_STATUS_ABRT_STS, NVIDIA_SMB_STATUS_ABRT);
1518c2ecf20Sopenharmony_ci}
1528c2ecf20Sopenharmony_ci
1538c2ecf20Sopenharmony_cistatic int nforce2_check_status(struct i2c_adapter *adap)
1548c2ecf20Sopenharmony_ci{
1558c2ecf20Sopenharmony_ci	struct nforce2_smbus *smbus = adap->algo_data;
1568c2ecf20Sopenharmony_ci	int timeout = 0;
1578c2ecf20Sopenharmony_ci	unsigned char temp;
1588c2ecf20Sopenharmony_ci
1598c2ecf20Sopenharmony_ci	do {
1608c2ecf20Sopenharmony_ci		msleep(1);
1618c2ecf20Sopenharmony_ci		temp = inb_p(NVIDIA_SMB_STS);
1628c2ecf20Sopenharmony_ci	} while ((!temp) && (timeout++ < MAX_TIMEOUT));
1638c2ecf20Sopenharmony_ci
1648c2ecf20Sopenharmony_ci	if (timeout > MAX_TIMEOUT) {
1658c2ecf20Sopenharmony_ci		dev_dbg(&adap->dev, "SMBus Timeout!\n");
1668c2ecf20Sopenharmony_ci		if (smbus->can_abort)
1678c2ecf20Sopenharmony_ci			nforce2_abort(adap);
1688c2ecf20Sopenharmony_ci		return -ETIMEDOUT;
1698c2ecf20Sopenharmony_ci	}
1708c2ecf20Sopenharmony_ci	if (!(temp & NVIDIA_SMB_STS_DONE) || (temp & NVIDIA_SMB_STS_STATUS)) {
1718c2ecf20Sopenharmony_ci		dev_dbg(&adap->dev, "Transaction failed (0x%02x)!\n", temp);
1728c2ecf20Sopenharmony_ci		return -EIO;
1738c2ecf20Sopenharmony_ci	}
1748c2ecf20Sopenharmony_ci	return 0;
1758c2ecf20Sopenharmony_ci}
1768c2ecf20Sopenharmony_ci
1778c2ecf20Sopenharmony_ci/* Return negative errno on error */
1788c2ecf20Sopenharmony_cistatic s32 nforce2_access(struct i2c_adapter *adap, u16 addr,
1798c2ecf20Sopenharmony_ci		unsigned short flags, char read_write,
1808c2ecf20Sopenharmony_ci		u8 command, int size, union i2c_smbus_data *data)
1818c2ecf20Sopenharmony_ci{
1828c2ecf20Sopenharmony_ci	struct nforce2_smbus *smbus = adap->algo_data;
1838c2ecf20Sopenharmony_ci	unsigned char protocol, pec;
1848c2ecf20Sopenharmony_ci	u8 len;
1858c2ecf20Sopenharmony_ci	int i, status;
1868c2ecf20Sopenharmony_ci
1878c2ecf20Sopenharmony_ci	protocol = (read_write == I2C_SMBUS_READ) ? NVIDIA_SMB_PRTCL_READ :
1888c2ecf20Sopenharmony_ci		NVIDIA_SMB_PRTCL_WRITE;
1898c2ecf20Sopenharmony_ci	pec = (flags & I2C_CLIENT_PEC) ? NVIDIA_SMB_PRTCL_PEC : 0;
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_ci	switch (size) {
1928c2ecf20Sopenharmony_ci	case I2C_SMBUS_QUICK:
1938c2ecf20Sopenharmony_ci		protocol |= NVIDIA_SMB_PRTCL_QUICK;
1948c2ecf20Sopenharmony_ci		read_write = I2C_SMBUS_WRITE;
1958c2ecf20Sopenharmony_ci		break;
1968c2ecf20Sopenharmony_ci
1978c2ecf20Sopenharmony_ci	case I2C_SMBUS_BYTE:
1988c2ecf20Sopenharmony_ci		if (read_write == I2C_SMBUS_WRITE)
1998c2ecf20Sopenharmony_ci			outb_p(command, NVIDIA_SMB_CMD);
2008c2ecf20Sopenharmony_ci		protocol |= NVIDIA_SMB_PRTCL_BYTE;
2018c2ecf20Sopenharmony_ci		break;
2028c2ecf20Sopenharmony_ci
2038c2ecf20Sopenharmony_ci	case I2C_SMBUS_BYTE_DATA:
2048c2ecf20Sopenharmony_ci		outb_p(command, NVIDIA_SMB_CMD);
2058c2ecf20Sopenharmony_ci		if (read_write == I2C_SMBUS_WRITE)
2068c2ecf20Sopenharmony_ci			outb_p(data->byte, NVIDIA_SMB_DATA);
2078c2ecf20Sopenharmony_ci		protocol |= NVIDIA_SMB_PRTCL_BYTE_DATA;
2088c2ecf20Sopenharmony_ci		break;
2098c2ecf20Sopenharmony_ci
2108c2ecf20Sopenharmony_ci	case I2C_SMBUS_WORD_DATA:
2118c2ecf20Sopenharmony_ci		outb_p(command, NVIDIA_SMB_CMD);
2128c2ecf20Sopenharmony_ci		if (read_write == I2C_SMBUS_WRITE) {
2138c2ecf20Sopenharmony_ci			outb_p(data->word, NVIDIA_SMB_DATA);
2148c2ecf20Sopenharmony_ci			outb_p(data->word >> 8, NVIDIA_SMB_DATA + 1);
2158c2ecf20Sopenharmony_ci		}
2168c2ecf20Sopenharmony_ci		protocol |= NVIDIA_SMB_PRTCL_WORD_DATA | pec;
2178c2ecf20Sopenharmony_ci		break;
2188c2ecf20Sopenharmony_ci
2198c2ecf20Sopenharmony_ci	case I2C_SMBUS_BLOCK_DATA:
2208c2ecf20Sopenharmony_ci		outb_p(command, NVIDIA_SMB_CMD);
2218c2ecf20Sopenharmony_ci		if (read_write == I2C_SMBUS_WRITE) {
2228c2ecf20Sopenharmony_ci			len = data->block[0];
2238c2ecf20Sopenharmony_ci			if ((len == 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
2248c2ecf20Sopenharmony_ci				dev_err(&adap->dev,
2258c2ecf20Sopenharmony_ci					"Transaction failed (requested block size: %d)\n",
2268c2ecf20Sopenharmony_ci					len);
2278c2ecf20Sopenharmony_ci				return -EINVAL;
2288c2ecf20Sopenharmony_ci			}
2298c2ecf20Sopenharmony_ci			outb_p(len, NVIDIA_SMB_BCNT);
2308c2ecf20Sopenharmony_ci			for (i = 0; i < I2C_SMBUS_BLOCK_MAX; i++)
2318c2ecf20Sopenharmony_ci				outb_p(data->block[i + 1],
2328c2ecf20Sopenharmony_ci				       NVIDIA_SMB_DATA + i);
2338c2ecf20Sopenharmony_ci		}
2348c2ecf20Sopenharmony_ci		protocol |= NVIDIA_SMB_PRTCL_BLOCK_DATA | pec;
2358c2ecf20Sopenharmony_ci		break;
2368c2ecf20Sopenharmony_ci
2378c2ecf20Sopenharmony_ci	default:
2388c2ecf20Sopenharmony_ci		dev_err(&adap->dev, "Unsupported transaction %d\n", size);
2398c2ecf20Sopenharmony_ci		return -EOPNOTSUPP;
2408c2ecf20Sopenharmony_ci	}
2418c2ecf20Sopenharmony_ci
2428c2ecf20Sopenharmony_ci	outb_p((addr & 0x7f) << 1, NVIDIA_SMB_ADDR);
2438c2ecf20Sopenharmony_ci	outb_p(protocol, NVIDIA_SMB_PRTCL);
2448c2ecf20Sopenharmony_ci
2458c2ecf20Sopenharmony_ci	status = nforce2_check_status(adap);
2468c2ecf20Sopenharmony_ci	if (status)
2478c2ecf20Sopenharmony_ci		return status;
2488c2ecf20Sopenharmony_ci
2498c2ecf20Sopenharmony_ci	if (read_write == I2C_SMBUS_WRITE)
2508c2ecf20Sopenharmony_ci		return 0;
2518c2ecf20Sopenharmony_ci
2528c2ecf20Sopenharmony_ci	switch (size) {
2538c2ecf20Sopenharmony_ci	case I2C_SMBUS_BYTE:
2548c2ecf20Sopenharmony_ci	case I2C_SMBUS_BYTE_DATA:
2558c2ecf20Sopenharmony_ci		data->byte = inb_p(NVIDIA_SMB_DATA);
2568c2ecf20Sopenharmony_ci		break;
2578c2ecf20Sopenharmony_ci
2588c2ecf20Sopenharmony_ci	case I2C_SMBUS_WORD_DATA:
2598c2ecf20Sopenharmony_ci		data->word = inb_p(NVIDIA_SMB_DATA) |
2608c2ecf20Sopenharmony_ci			     (inb_p(NVIDIA_SMB_DATA + 1) << 8);
2618c2ecf20Sopenharmony_ci		break;
2628c2ecf20Sopenharmony_ci
2638c2ecf20Sopenharmony_ci	case I2C_SMBUS_BLOCK_DATA:
2648c2ecf20Sopenharmony_ci		len = inb_p(NVIDIA_SMB_BCNT);
2658c2ecf20Sopenharmony_ci		if ((len <= 0) || (len > I2C_SMBUS_BLOCK_MAX)) {
2668c2ecf20Sopenharmony_ci			dev_err(&adap->dev,
2678c2ecf20Sopenharmony_ci				"Transaction failed (received block size: 0x%02x)\n",
2688c2ecf20Sopenharmony_ci				len);
2698c2ecf20Sopenharmony_ci			return -EPROTO;
2708c2ecf20Sopenharmony_ci		}
2718c2ecf20Sopenharmony_ci		for (i = 0; i < len; i++)
2728c2ecf20Sopenharmony_ci			data->block[i + 1] = inb_p(NVIDIA_SMB_DATA + i);
2738c2ecf20Sopenharmony_ci		data->block[0] = len;
2748c2ecf20Sopenharmony_ci		break;
2758c2ecf20Sopenharmony_ci	}
2768c2ecf20Sopenharmony_ci
2778c2ecf20Sopenharmony_ci	return 0;
2788c2ecf20Sopenharmony_ci}
2798c2ecf20Sopenharmony_ci
2808c2ecf20Sopenharmony_ci
2818c2ecf20Sopenharmony_cistatic u32 nforce2_func(struct i2c_adapter *adapter)
2828c2ecf20Sopenharmony_ci{
2838c2ecf20Sopenharmony_ci	/* other functionality might be possible, but is not tested */
2848c2ecf20Sopenharmony_ci	return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
2858c2ecf20Sopenharmony_ci	       I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
2868c2ecf20Sopenharmony_ci	       I2C_FUNC_SMBUS_PEC |
2878c2ecf20Sopenharmony_ci	       (((struct nforce2_smbus *)adapter->algo_data)->blockops ?
2888c2ecf20Sopenharmony_ci		I2C_FUNC_SMBUS_BLOCK_DATA : 0);
2898c2ecf20Sopenharmony_ci}
2908c2ecf20Sopenharmony_ci
2918c2ecf20Sopenharmony_cistatic const struct i2c_algorithm smbus_algorithm = {
2928c2ecf20Sopenharmony_ci	.smbus_xfer	= nforce2_access,
2938c2ecf20Sopenharmony_ci	.functionality	= nforce2_func,
2948c2ecf20Sopenharmony_ci};
2958c2ecf20Sopenharmony_ci
2968c2ecf20Sopenharmony_ci
2978c2ecf20Sopenharmony_cistatic const struct pci_device_id nforce2_ids[] = {
2988c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS) },
2998c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE2S_SMBUS) },
3008c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS) },
3018c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE3S_SMBUS) },
3028c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE4_SMBUS) },
3038c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP04_SMBUS) },
3048c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS) },
3058c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS) },
3068c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SMBUS) },
3078c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP65_SMBUS) },
3088c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP67_SMBUS) },
3098c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP73_SMBUS) },
3108c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP78S_SMBUS) },
3118c2ecf20Sopenharmony_ci	{ PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP79_SMBUS) },
3128c2ecf20Sopenharmony_ci	{ 0 }
3138c2ecf20Sopenharmony_ci};
3148c2ecf20Sopenharmony_ci
3158c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(pci, nforce2_ids);
3168c2ecf20Sopenharmony_ci
3178c2ecf20Sopenharmony_ci
3188c2ecf20Sopenharmony_cistatic int nforce2_probe_smb(struct pci_dev *dev, int bar, int alt_reg,
3198c2ecf20Sopenharmony_ci			     struct nforce2_smbus *smbus, const char *name)
3208c2ecf20Sopenharmony_ci{
3218c2ecf20Sopenharmony_ci	int error;
3228c2ecf20Sopenharmony_ci
3238c2ecf20Sopenharmony_ci	smbus->base = pci_resource_start(dev, bar);
3248c2ecf20Sopenharmony_ci	if (smbus->base) {
3258c2ecf20Sopenharmony_ci		smbus->size = pci_resource_len(dev, bar);
3268c2ecf20Sopenharmony_ci	} else {
3278c2ecf20Sopenharmony_ci		/* Older incarnations of the device used non-standard BARs */
3288c2ecf20Sopenharmony_ci		u16 iobase;
3298c2ecf20Sopenharmony_ci
3308c2ecf20Sopenharmony_ci		if (pci_read_config_word(dev, alt_reg, &iobase)
3318c2ecf20Sopenharmony_ci		    != PCIBIOS_SUCCESSFUL) {
3328c2ecf20Sopenharmony_ci			dev_err(&dev->dev, "Error reading PCI config for %s\n",
3338c2ecf20Sopenharmony_ci				name);
3348c2ecf20Sopenharmony_ci			return -EIO;
3358c2ecf20Sopenharmony_ci		}
3368c2ecf20Sopenharmony_ci
3378c2ecf20Sopenharmony_ci		smbus->base = iobase & PCI_BASE_ADDRESS_IO_MASK;
3388c2ecf20Sopenharmony_ci		smbus->size = 64;
3398c2ecf20Sopenharmony_ci	}
3408c2ecf20Sopenharmony_ci
3418c2ecf20Sopenharmony_ci	error = acpi_check_region(smbus->base, smbus->size,
3428c2ecf20Sopenharmony_ci				  nforce2_driver.name);
3438c2ecf20Sopenharmony_ci	if (error)
3448c2ecf20Sopenharmony_ci		return error;
3458c2ecf20Sopenharmony_ci
3468c2ecf20Sopenharmony_ci	if (!request_region(smbus->base, smbus->size, nforce2_driver.name)) {
3478c2ecf20Sopenharmony_ci		dev_err(&smbus->adapter.dev, "Error requesting region %02x .. %02X for %s\n",
3488c2ecf20Sopenharmony_ci			smbus->base, smbus->base+smbus->size-1, name);
3498c2ecf20Sopenharmony_ci		return -EBUSY;
3508c2ecf20Sopenharmony_ci	}
3518c2ecf20Sopenharmony_ci	smbus->adapter.owner = THIS_MODULE;
3528c2ecf20Sopenharmony_ci	smbus->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
3538c2ecf20Sopenharmony_ci	smbus->adapter.algo = &smbus_algorithm;
3548c2ecf20Sopenharmony_ci	smbus->adapter.algo_data = smbus;
3558c2ecf20Sopenharmony_ci	smbus->adapter.dev.parent = &dev->dev;
3568c2ecf20Sopenharmony_ci	snprintf(smbus->adapter.name, sizeof(smbus->adapter.name),
3578c2ecf20Sopenharmony_ci		"SMBus nForce2 adapter at %04x", smbus->base);
3588c2ecf20Sopenharmony_ci
3598c2ecf20Sopenharmony_ci	error = i2c_add_adapter(&smbus->adapter);
3608c2ecf20Sopenharmony_ci	if (error) {
3618c2ecf20Sopenharmony_ci		release_region(smbus->base, smbus->size);
3628c2ecf20Sopenharmony_ci		return error;
3638c2ecf20Sopenharmony_ci	}
3648c2ecf20Sopenharmony_ci	dev_info(&smbus->adapter.dev, "nForce2 SMBus adapter at %#x\n",
3658c2ecf20Sopenharmony_ci		smbus->base);
3668c2ecf20Sopenharmony_ci	return 0;
3678c2ecf20Sopenharmony_ci}
3688c2ecf20Sopenharmony_ci
3698c2ecf20Sopenharmony_ci
3708c2ecf20Sopenharmony_cistatic int nforce2_probe(struct pci_dev *dev, const struct pci_device_id *id)
3718c2ecf20Sopenharmony_ci{
3728c2ecf20Sopenharmony_ci	struct nforce2_smbus *smbuses;
3738c2ecf20Sopenharmony_ci	int res1, res2;
3748c2ecf20Sopenharmony_ci
3758c2ecf20Sopenharmony_ci	/* we support 2 SMBus adapters */
3768c2ecf20Sopenharmony_ci	smbuses = kcalloc(2, sizeof(struct nforce2_smbus), GFP_KERNEL);
3778c2ecf20Sopenharmony_ci	if (!smbuses)
3788c2ecf20Sopenharmony_ci		return -ENOMEM;
3798c2ecf20Sopenharmony_ci	pci_set_drvdata(dev, smbuses);
3808c2ecf20Sopenharmony_ci
3818c2ecf20Sopenharmony_ci	switch (dev->device) {
3828c2ecf20Sopenharmony_ci	case PCI_DEVICE_ID_NVIDIA_NFORCE2_SMBUS:
3838c2ecf20Sopenharmony_ci	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP51_SMBUS:
3848c2ecf20Sopenharmony_ci	case PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SMBUS:
3858c2ecf20Sopenharmony_ci		smbuses[0].blockops = 1;
3868c2ecf20Sopenharmony_ci		smbuses[1].blockops = 1;
3878c2ecf20Sopenharmony_ci		smbuses[0].can_abort = 1;
3888c2ecf20Sopenharmony_ci		smbuses[1].can_abort = 1;
3898c2ecf20Sopenharmony_ci	}
3908c2ecf20Sopenharmony_ci
3918c2ecf20Sopenharmony_ci	/* SMBus adapter 1 */
3928c2ecf20Sopenharmony_ci	res1 = nforce2_probe_smb(dev, 4, NFORCE_PCI_SMB1, &smbuses[0], "SMB1");
3938c2ecf20Sopenharmony_ci	if (res1 < 0)
3948c2ecf20Sopenharmony_ci		smbuses[0].base = 0;	/* to have a check value */
3958c2ecf20Sopenharmony_ci
3968c2ecf20Sopenharmony_ci	/* SMBus adapter 2 */
3978c2ecf20Sopenharmony_ci	if (dmi_check_system(nforce2_dmi_blacklist2)) {
3988c2ecf20Sopenharmony_ci		dev_err(&dev->dev, "Disabling SMB2 for safety reasons.\n");
3998c2ecf20Sopenharmony_ci		res2 = -EPERM;
4008c2ecf20Sopenharmony_ci		smbuses[1].base = 0;
4018c2ecf20Sopenharmony_ci	} else {
4028c2ecf20Sopenharmony_ci		res2 = nforce2_probe_smb(dev, 5, NFORCE_PCI_SMB2, &smbuses[1],
4038c2ecf20Sopenharmony_ci					 "SMB2");
4048c2ecf20Sopenharmony_ci		if (res2 < 0)
4058c2ecf20Sopenharmony_ci			smbuses[1].base = 0;	/* to have a check value */
4068c2ecf20Sopenharmony_ci	}
4078c2ecf20Sopenharmony_ci
4088c2ecf20Sopenharmony_ci	if ((res1 < 0) && (res2 < 0)) {
4098c2ecf20Sopenharmony_ci		/* we did not find even one of the SMBuses, so we give up */
4108c2ecf20Sopenharmony_ci		kfree(smbuses);
4118c2ecf20Sopenharmony_ci		return -ENODEV;
4128c2ecf20Sopenharmony_ci	}
4138c2ecf20Sopenharmony_ci
4148c2ecf20Sopenharmony_ci	nforce2_set_reference(&smbuses[0].adapter);
4158c2ecf20Sopenharmony_ci	return 0;
4168c2ecf20Sopenharmony_ci}
4178c2ecf20Sopenharmony_ci
4188c2ecf20Sopenharmony_ci
4198c2ecf20Sopenharmony_cistatic void nforce2_remove(struct pci_dev *dev)
4208c2ecf20Sopenharmony_ci{
4218c2ecf20Sopenharmony_ci	struct nforce2_smbus *smbuses = pci_get_drvdata(dev);
4228c2ecf20Sopenharmony_ci
4238c2ecf20Sopenharmony_ci	nforce2_set_reference(NULL);
4248c2ecf20Sopenharmony_ci	if (smbuses[0].base) {
4258c2ecf20Sopenharmony_ci		i2c_del_adapter(&smbuses[0].adapter);
4268c2ecf20Sopenharmony_ci		release_region(smbuses[0].base, smbuses[0].size);
4278c2ecf20Sopenharmony_ci	}
4288c2ecf20Sopenharmony_ci	if (smbuses[1].base) {
4298c2ecf20Sopenharmony_ci		i2c_del_adapter(&smbuses[1].adapter);
4308c2ecf20Sopenharmony_ci		release_region(smbuses[1].base, smbuses[1].size);
4318c2ecf20Sopenharmony_ci	}
4328c2ecf20Sopenharmony_ci	kfree(smbuses);
4338c2ecf20Sopenharmony_ci}
4348c2ecf20Sopenharmony_ci
4358c2ecf20Sopenharmony_cistatic struct pci_driver nforce2_driver = {
4368c2ecf20Sopenharmony_ci	.name		= "nForce2_smbus",
4378c2ecf20Sopenharmony_ci	.id_table	= nforce2_ids,
4388c2ecf20Sopenharmony_ci	.probe		= nforce2_probe,
4398c2ecf20Sopenharmony_ci	.remove		= nforce2_remove,
4408c2ecf20Sopenharmony_ci};
4418c2ecf20Sopenharmony_ci
4428c2ecf20Sopenharmony_cimodule_pci_driver(nforce2_driver);
443