18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright (c) 2013, The Linux Foundation. All rights reserved.
48c2ecf20Sopenharmony_ci * Copyright (c) 2015, Sony Mobile Communications AB
58c2ecf20Sopenharmony_ci */
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci#include <linux/hwspinlock.h>
88c2ecf20Sopenharmony_ci#include <linux/io.h>
98c2ecf20Sopenharmony_ci#include <linux/kernel.h>
108c2ecf20Sopenharmony_ci#include <linux/mfd/syscon.h>
118c2ecf20Sopenharmony_ci#include <linux/module.h>
128c2ecf20Sopenharmony_ci#include <linux/of.h>
138c2ecf20Sopenharmony_ci#include <linux/of_device.h>
148c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
158c2ecf20Sopenharmony_ci#include <linux/regmap.h>
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci#include "hwspinlock_internal.h"
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci#define QCOM_MUTEX_APPS_PROC_ID	1
208c2ecf20Sopenharmony_ci#define QCOM_MUTEX_NUM_LOCKS	32
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_cistatic int qcom_hwspinlock_trylock(struct hwspinlock *lock)
238c2ecf20Sopenharmony_ci{
248c2ecf20Sopenharmony_ci	struct regmap_field *field = lock->priv;
258c2ecf20Sopenharmony_ci	u32 lock_owner;
268c2ecf20Sopenharmony_ci	int ret;
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci	ret = regmap_field_write(field, QCOM_MUTEX_APPS_PROC_ID);
298c2ecf20Sopenharmony_ci	if (ret)
308c2ecf20Sopenharmony_ci		return ret;
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci	ret = regmap_field_read(field, &lock_owner);
338c2ecf20Sopenharmony_ci	if (ret)
348c2ecf20Sopenharmony_ci		return ret;
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci	return lock_owner == QCOM_MUTEX_APPS_PROC_ID;
378c2ecf20Sopenharmony_ci}
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_cistatic void qcom_hwspinlock_unlock(struct hwspinlock *lock)
408c2ecf20Sopenharmony_ci{
418c2ecf20Sopenharmony_ci	struct regmap_field *field = lock->priv;
428c2ecf20Sopenharmony_ci	u32 lock_owner;
438c2ecf20Sopenharmony_ci	int ret;
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci	ret = regmap_field_read(field, &lock_owner);
468c2ecf20Sopenharmony_ci	if (ret) {
478c2ecf20Sopenharmony_ci		pr_err("%s: unable to query spinlock owner\n", __func__);
488c2ecf20Sopenharmony_ci		return;
498c2ecf20Sopenharmony_ci	}
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_ci	if (lock_owner != QCOM_MUTEX_APPS_PROC_ID) {
528c2ecf20Sopenharmony_ci		pr_err("%s: spinlock not owned by us (actual owner is %d)\n",
538c2ecf20Sopenharmony_ci				__func__, lock_owner);
548c2ecf20Sopenharmony_ci	}
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci	ret = regmap_field_write(field, 0);
578c2ecf20Sopenharmony_ci	if (ret)
588c2ecf20Sopenharmony_ci		pr_err("%s: failed to unlock spinlock\n", __func__);
598c2ecf20Sopenharmony_ci}
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_cistatic const struct hwspinlock_ops qcom_hwspinlock_ops = {
628c2ecf20Sopenharmony_ci	.trylock	= qcom_hwspinlock_trylock,
638c2ecf20Sopenharmony_ci	.unlock		= qcom_hwspinlock_unlock,
648c2ecf20Sopenharmony_ci};
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_cistatic const struct of_device_id qcom_hwspinlock_of_match[] = {
678c2ecf20Sopenharmony_ci	{ .compatible = "qcom,sfpb-mutex" },
688c2ecf20Sopenharmony_ci	{ .compatible = "qcom,tcsr-mutex" },
698c2ecf20Sopenharmony_ci	{ }
708c2ecf20Sopenharmony_ci};
718c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, qcom_hwspinlock_of_match);
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_cistatic struct regmap *qcom_hwspinlock_probe_syscon(struct platform_device *pdev,
748c2ecf20Sopenharmony_ci						   u32 *base, u32 *stride)
758c2ecf20Sopenharmony_ci{
768c2ecf20Sopenharmony_ci	struct device_node *syscon;
778c2ecf20Sopenharmony_ci	struct regmap *regmap;
788c2ecf20Sopenharmony_ci	int ret;
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ci	syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0);
818c2ecf20Sopenharmony_ci	if (!syscon)
828c2ecf20Sopenharmony_ci		return ERR_PTR(-ENODEV);
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci	regmap = syscon_node_to_regmap(syscon);
858c2ecf20Sopenharmony_ci	of_node_put(syscon);
868c2ecf20Sopenharmony_ci	if (IS_ERR(regmap))
878c2ecf20Sopenharmony_ci		return regmap;
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ci	ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 1, base);
908c2ecf20Sopenharmony_ci	if (ret < 0) {
918c2ecf20Sopenharmony_ci		dev_err(&pdev->dev, "no offset in syscon\n");
928c2ecf20Sopenharmony_ci		return ERR_PTR(-EINVAL);
938c2ecf20Sopenharmony_ci	}
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ci	ret = of_property_read_u32_index(pdev->dev.of_node, "syscon", 2, stride);
968c2ecf20Sopenharmony_ci	if (ret < 0) {
978c2ecf20Sopenharmony_ci		dev_err(&pdev->dev, "no stride syscon\n");
988c2ecf20Sopenharmony_ci		return ERR_PTR(-EINVAL);
998c2ecf20Sopenharmony_ci	}
1008c2ecf20Sopenharmony_ci
1018c2ecf20Sopenharmony_ci	return regmap;
1028c2ecf20Sopenharmony_ci}
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_cistatic const struct regmap_config tcsr_mutex_config = {
1058c2ecf20Sopenharmony_ci	.reg_bits		= 32,
1068c2ecf20Sopenharmony_ci	.reg_stride		= 4,
1078c2ecf20Sopenharmony_ci	.val_bits		= 32,
1088c2ecf20Sopenharmony_ci	.max_register		= 0x20000,
1098c2ecf20Sopenharmony_ci	.fast_io		= true,
1108c2ecf20Sopenharmony_ci};
1118c2ecf20Sopenharmony_ci
1128c2ecf20Sopenharmony_cistatic struct regmap *qcom_hwspinlock_probe_mmio(struct platform_device *pdev,
1138c2ecf20Sopenharmony_ci						 u32 *offset, u32 *stride)
1148c2ecf20Sopenharmony_ci{
1158c2ecf20Sopenharmony_ci	struct device *dev = &pdev->dev;
1168c2ecf20Sopenharmony_ci	void __iomem *base;
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_ci	/* All modern platform has offset 0 and stride of 4k */
1198c2ecf20Sopenharmony_ci	*offset = 0;
1208c2ecf20Sopenharmony_ci	*stride = 0x1000;
1218c2ecf20Sopenharmony_ci
1228c2ecf20Sopenharmony_ci	base = devm_platform_ioremap_resource(pdev, 0);
1238c2ecf20Sopenharmony_ci	if (IS_ERR(base))
1248c2ecf20Sopenharmony_ci		return ERR_CAST(base);
1258c2ecf20Sopenharmony_ci
1268c2ecf20Sopenharmony_ci	return devm_regmap_init_mmio(dev, base, &tcsr_mutex_config);
1278c2ecf20Sopenharmony_ci}
1288c2ecf20Sopenharmony_ci
1298c2ecf20Sopenharmony_cistatic int qcom_hwspinlock_probe(struct platform_device *pdev)
1308c2ecf20Sopenharmony_ci{
1318c2ecf20Sopenharmony_ci	struct hwspinlock_device *bank;
1328c2ecf20Sopenharmony_ci	struct reg_field field;
1338c2ecf20Sopenharmony_ci	struct regmap *regmap;
1348c2ecf20Sopenharmony_ci	size_t array_size;
1358c2ecf20Sopenharmony_ci	u32 stride;
1368c2ecf20Sopenharmony_ci	u32 base;
1378c2ecf20Sopenharmony_ci	int i;
1388c2ecf20Sopenharmony_ci
1398c2ecf20Sopenharmony_ci	regmap = qcom_hwspinlock_probe_syscon(pdev, &base, &stride);
1408c2ecf20Sopenharmony_ci	if (IS_ERR(regmap) && PTR_ERR(regmap) == -ENODEV)
1418c2ecf20Sopenharmony_ci		regmap = qcom_hwspinlock_probe_mmio(pdev, &base, &stride);
1428c2ecf20Sopenharmony_ci
1438c2ecf20Sopenharmony_ci	if (IS_ERR(regmap))
1448c2ecf20Sopenharmony_ci		return PTR_ERR(regmap);
1458c2ecf20Sopenharmony_ci
1468c2ecf20Sopenharmony_ci	array_size = QCOM_MUTEX_NUM_LOCKS * sizeof(struct hwspinlock);
1478c2ecf20Sopenharmony_ci	bank = devm_kzalloc(&pdev->dev, sizeof(*bank) + array_size, GFP_KERNEL);
1488c2ecf20Sopenharmony_ci	if (!bank)
1498c2ecf20Sopenharmony_ci		return -ENOMEM;
1508c2ecf20Sopenharmony_ci
1518c2ecf20Sopenharmony_ci	platform_set_drvdata(pdev, bank);
1528c2ecf20Sopenharmony_ci
1538c2ecf20Sopenharmony_ci	for (i = 0; i < QCOM_MUTEX_NUM_LOCKS; i++) {
1548c2ecf20Sopenharmony_ci		field.reg = base + i * stride;
1558c2ecf20Sopenharmony_ci		field.lsb = 0;
1568c2ecf20Sopenharmony_ci		field.msb = 31;
1578c2ecf20Sopenharmony_ci
1588c2ecf20Sopenharmony_ci		bank->lock[i].priv = devm_regmap_field_alloc(&pdev->dev,
1598c2ecf20Sopenharmony_ci							     regmap, field);
1608c2ecf20Sopenharmony_ci	}
1618c2ecf20Sopenharmony_ci
1628c2ecf20Sopenharmony_ci	return devm_hwspin_lock_register(&pdev->dev, bank, &qcom_hwspinlock_ops,
1638c2ecf20Sopenharmony_ci					 0, QCOM_MUTEX_NUM_LOCKS);
1648c2ecf20Sopenharmony_ci}
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_cistatic struct platform_driver qcom_hwspinlock_driver = {
1678c2ecf20Sopenharmony_ci	.probe		= qcom_hwspinlock_probe,
1688c2ecf20Sopenharmony_ci	.driver		= {
1698c2ecf20Sopenharmony_ci		.name	= "qcom_hwspinlock",
1708c2ecf20Sopenharmony_ci		.of_match_table = qcom_hwspinlock_of_match,
1718c2ecf20Sopenharmony_ci	},
1728c2ecf20Sopenharmony_ci};
1738c2ecf20Sopenharmony_ci
1748c2ecf20Sopenharmony_cistatic int __init qcom_hwspinlock_init(void)
1758c2ecf20Sopenharmony_ci{
1768c2ecf20Sopenharmony_ci	return platform_driver_register(&qcom_hwspinlock_driver);
1778c2ecf20Sopenharmony_ci}
1788c2ecf20Sopenharmony_ci/* board init code might need to reserve hwspinlocks for predefined purposes */
1798c2ecf20Sopenharmony_cipostcore_initcall(qcom_hwspinlock_init);
1808c2ecf20Sopenharmony_ci
1818c2ecf20Sopenharmony_cistatic void __exit qcom_hwspinlock_exit(void)
1828c2ecf20Sopenharmony_ci{
1838c2ecf20Sopenharmony_ci	platform_driver_unregister(&qcom_hwspinlock_driver);
1848c2ecf20Sopenharmony_ci}
1858c2ecf20Sopenharmony_cimodule_exit(qcom_hwspinlock_exit);
1868c2ecf20Sopenharmony_ci
1878c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
1888c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Hardware spinlock driver for Qualcomm SoCs");
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