1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * coretemp.c - Linux kernel module for hardware monitoring 4 * 5 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> 6 * 7 * Inspired from many hwmon drivers 8 */ 9 10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 11 12#include <linux/module.h> 13#include <linux/init.h> 14#include <linux/slab.h> 15#include <linux/jiffies.h> 16#include <linux/hwmon.h> 17#include <linux/sysfs.h> 18#include <linux/hwmon-sysfs.h> 19#include <linux/err.h> 20#include <linux/mutex.h> 21#include <linux/list.h> 22#include <linux/platform_device.h> 23#include <linux/cpu.h> 24#include <linux/smp.h> 25#include <linux/moduleparam.h> 26#include <linux/pci.h> 27#include <asm/msr.h> 28#include <asm/processor.h> 29#include <asm/cpu_device_id.h> 30 31#define DRVNAME "coretemp" 32 33/* 34 * force_tjmax only matters when TjMax can't be read from the CPU itself. 35 * When set, it replaces the driver's suboptimal heuristic. 36 */ 37static int force_tjmax; 38module_param_named(tjmax, force_tjmax, int, 0444); 39MODULE_PARM_DESC(tjmax, "TjMax value in degrees Celsius"); 40 41#define PKG_SYSFS_ATTR_NO 1 /* Sysfs attribute for package temp */ 42#define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */ 43#define NUM_REAL_CORES 128 /* Number of Real cores per cpu */ 44#define CORETEMP_NAME_LENGTH 28 /* String Length of attrs */ 45#define MAX_CORE_ATTRS 4 /* Maximum no of basic attrs */ 46#define TOTAL_ATTRS (MAX_CORE_ATTRS + 1) 47#define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO) 48 49#ifdef CONFIG_SMP 50#define for_each_sibling(i, cpu) \ 51 for_each_cpu(i, topology_sibling_cpumask(cpu)) 52#else 53#define for_each_sibling(i, cpu) for (i = 0; false; ) 54#endif 55 56/* 57 * Per-Core Temperature Data 58 * @last_updated: The time when the current temperature value was updated 59 * earlier (in jiffies). 60 * @cpu_core_id: The CPU Core from which temperature values should be read 61 * This value is passed as "id" field to rdmsr/wrmsr functions. 62 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS, 63 * from where the temperature values should be read. 64 * @attr_size: Total number of pre-core attrs displayed in the sysfs. 65 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data. 66 * Otherwise, temp_data holds coretemp data. 67 * @valid: If this is 1, the current temperature is valid. 68 */ 69struct temp_data { 70 int temp; 71 int ttarget; 72 int tjmax; 73 unsigned long last_updated; 74 unsigned int cpu; 75 u32 cpu_core_id; 76 u32 status_reg; 77 int attr_size; 78 bool is_pkg_data; 79 bool valid; 80 struct sensor_device_attribute sd_attrs[TOTAL_ATTRS]; 81 char attr_name[TOTAL_ATTRS][CORETEMP_NAME_LENGTH]; 82 struct attribute *attrs[TOTAL_ATTRS + 1]; 83 struct attribute_group attr_group; 84 struct mutex update_lock; 85}; 86 87/* Platform Data per Physical CPU */ 88struct platform_data { 89 struct device *hwmon_dev; 90 u16 pkg_id; 91 u16 cpu_map[NUM_REAL_CORES]; 92 struct ida ida; 93 struct cpumask cpumask; 94 struct temp_data *core_data[MAX_CORE_DATA]; 95 struct device_attribute name_attr; 96}; 97 98/* Keep track of how many zone pointers we allocated in init() */ 99static int max_zones __read_mostly; 100/* Array of zone pointers. Serialized by cpu hotplug lock */ 101static struct platform_device **zone_devices; 102 103static ssize_t show_label(struct device *dev, 104 struct device_attribute *devattr, char *buf) 105{ 106 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 107 struct platform_data *pdata = dev_get_drvdata(dev); 108 struct temp_data *tdata = pdata->core_data[attr->index]; 109 110 if (tdata->is_pkg_data) 111 return sprintf(buf, "Package id %u\n", pdata->pkg_id); 112 113 return sprintf(buf, "Core %u\n", tdata->cpu_core_id); 114} 115 116static ssize_t show_crit_alarm(struct device *dev, 117 struct device_attribute *devattr, char *buf) 118{ 119 u32 eax, edx; 120 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 121 struct platform_data *pdata = dev_get_drvdata(dev); 122 struct temp_data *tdata = pdata->core_data[attr->index]; 123 124 mutex_lock(&tdata->update_lock); 125 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); 126 mutex_unlock(&tdata->update_lock); 127 128 return sprintf(buf, "%d\n", (eax >> 5) & 1); 129} 130 131static ssize_t show_tjmax(struct device *dev, 132 struct device_attribute *devattr, char *buf) 133{ 134 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 135 struct platform_data *pdata = dev_get_drvdata(dev); 136 137 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax); 138} 139 140static ssize_t show_ttarget(struct device *dev, 141 struct device_attribute *devattr, char *buf) 142{ 143 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 144 struct platform_data *pdata = dev_get_drvdata(dev); 145 146 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget); 147} 148 149static ssize_t show_temp(struct device *dev, 150 struct device_attribute *devattr, char *buf) 151{ 152 u32 eax, edx; 153 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); 154 struct platform_data *pdata = dev_get_drvdata(dev); 155 struct temp_data *tdata = pdata->core_data[attr->index]; 156 157 mutex_lock(&tdata->update_lock); 158 159 /* Check whether the time interval has elapsed */ 160 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) { 161 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx); 162 /* 163 * Ignore the valid bit. In all observed cases the register 164 * value is either low or zero if the valid bit is 0. 165 * Return it instead of reporting an error which doesn't 166 * really help at all. 167 */ 168 tdata->temp = tdata->tjmax - ((eax >> 16) & 0x7f) * 1000; 169 tdata->valid = 1; 170 tdata->last_updated = jiffies; 171 } 172 173 mutex_unlock(&tdata->update_lock); 174 return sprintf(buf, "%d\n", tdata->temp); 175} 176 177struct tjmax_pci { 178 unsigned int device; 179 int tjmax; 180}; 181 182static const struct tjmax_pci tjmax_pci_table[] = { 183 { 0x0708, 110000 }, /* CE41x0 (Sodaville ) */ 184 { 0x0c72, 102000 }, /* Atom S1240 (Centerton) */ 185 { 0x0c73, 95000 }, /* Atom S1220 (Centerton) */ 186 { 0x0c75, 95000 }, /* Atom S1260 (Centerton) */ 187}; 188 189struct tjmax { 190 char const *id; 191 int tjmax; 192}; 193 194static const struct tjmax tjmax_table[] = { 195 { "CPU 230", 100000 }, /* Model 0x1c, stepping 2 */ 196 { "CPU 330", 125000 }, /* Model 0x1c, stepping 2 */ 197}; 198 199struct tjmax_model { 200 u8 model; 201 u8 mask; 202 int tjmax; 203}; 204 205#define ANY 0xff 206 207static const struct tjmax_model tjmax_model_table[] = { 208 { 0x1c, 10, 100000 }, /* D4xx, K4xx, N4xx, D5xx, K5xx, N5xx */ 209 { 0x1c, ANY, 90000 }, /* Z5xx, N2xx, possibly others 210 * Note: Also matches 230 and 330, 211 * which are covered by tjmax_table 212 */ 213 { 0x26, ANY, 90000 }, /* Atom Tunnel Creek (Exx), Lincroft (Z6xx) 214 * Note: TjMax for E6xxT is 110C, but CPU type 215 * is undetectable by software 216 */ 217 { 0x27, ANY, 90000 }, /* Atom Medfield (Z2460) */ 218 { 0x35, ANY, 90000 }, /* Atom Clover Trail/Cloverview (Z27x0) */ 219 { 0x36, ANY, 100000 }, /* Atom Cedar Trail/Cedarview (N2xxx, D2xxx) 220 * Also matches S12x0 (stepping 9), covered by 221 * PCI table 222 */ 223}; 224 225static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) 226{ 227 /* The 100C is default for both mobile and non mobile CPUs */ 228 229 int tjmax = 100000; 230 int tjmax_ee = 85000; 231 int usemsr_ee = 1; 232 int err; 233 u32 eax, edx; 234 int i; 235 u16 devfn = PCI_DEVFN(0, 0); 236 struct pci_dev *host_bridge = pci_get_domain_bus_and_slot(0, 0, devfn); 237 238 /* 239 * Explicit tjmax table entries override heuristics. 240 * First try PCI host bridge IDs, followed by model ID strings 241 * and model/stepping information. 242 */ 243 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL) { 244 for (i = 0; i < ARRAY_SIZE(tjmax_pci_table); i++) { 245 if (host_bridge->device == tjmax_pci_table[i].device) { 246 pci_dev_put(host_bridge); 247 return tjmax_pci_table[i].tjmax; 248 } 249 } 250 } 251 pci_dev_put(host_bridge); 252 253 for (i = 0; i < ARRAY_SIZE(tjmax_table); i++) { 254 if (strstr(c->x86_model_id, tjmax_table[i].id)) 255 return tjmax_table[i].tjmax; 256 } 257 258 for (i = 0; i < ARRAY_SIZE(tjmax_model_table); i++) { 259 const struct tjmax_model *tm = &tjmax_model_table[i]; 260 if (c->x86_model == tm->model && 261 (tm->mask == ANY || c->x86_stepping == tm->mask)) 262 return tm->tjmax; 263 } 264 265 /* Early chips have no MSR for TjMax */ 266 267 if (c->x86_model == 0xf && c->x86_stepping < 4) 268 usemsr_ee = 0; 269 270 if (c->x86_model > 0xe && usemsr_ee) { 271 u8 platform_id; 272 273 /* 274 * Now we can detect the mobile CPU using Intel provided table 275 * http://softwarecommunity.intel.com/Wiki/Mobility/720.htm 276 * For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU 277 */ 278 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx); 279 if (err) { 280 dev_warn(dev, 281 "Unable to access MSR 0x17, assuming desktop" 282 " CPU\n"); 283 usemsr_ee = 0; 284 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) { 285 /* 286 * Trust bit 28 up to Penryn, I could not find any 287 * documentation on that; if you happen to know 288 * someone at Intel please ask 289 */ 290 usemsr_ee = 0; 291 } else { 292 /* Platform ID bits 52:50 (EDX starts at bit 32) */ 293 platform_id = (edx >> 18) & 0x7; 294 295 /* 296 * Mobile Penryn CPU seems to be platform ID 7 or 5 297 * (guesswork) 298 */ 299 if (c->x86_model == 0x17 && 300 (platform_id == 5 || platform_id == 7)) { 301 /* 302 * If MSR EE bit is set, set it to 90 degrees C, 303 * otherwise 105 degrees C 304 */ 305 tjmax_ee = 90000; 306 tjmax = 105000; 307 } 308 } 309 } 310 311 if (usemsr_ee) { 312 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx); 313 if (err) { 314 dev_warn(dev, 315 "Unable to access MSR 0xEE, for Tjmax, left" 316 " at default\n"); 317 } else if (eax & 0x40000000) { 318 tjmax = tjmax_ee; 319 } 320 } else if (tjmax == 100000) { 321 /* 322 * If we don't use msr EE it means we are desktop CPU 323 * (with exeception of Atom) 324 */ 325 dev_warn(dev, "Using relative temperature scale!\n"); 326 } 327 328 return tjmax; 329} 330 331static bool cpu_has_tjmax(struct cpuinfo_x86 *c) 332{ 333 u8 model = c->x86_model; 334 335 return model > 0xe && 336 model != 0x1c && 337 model != 0x26 && 338 model != 0x27 && 339 model != 0x35 && 340 model != 0x36; 341} 342 343static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev) 344{ 345 int err; 346 u32 eax, edx; 347 u32 val; 348 349 /* 350 * A new feature of current Intel(R) processors, the 351 * IA32_TEMPERATURE_TARGET contains the TjMax value 352 */ 353 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx); 354 if (err) { 355 if (cpu_has_tjmax(c)) 356 dev_warn(dev, "Unable to read TjMax from CPU %u\n", id); 357 } else { 358 val = (eax >> 16) & 0xff; 359 /* 360 * If the TjMax is not plausible, an assumption 361 * will be used 362 */ 363 if (val) { 364 dev_dbg(dev, "TjMax is %d degrees C\n", val); 365 return val * 1000; 366 } 367 } 368 369 if (force_tjmax) { 370 dev_notice(dev, "TjMax forced to %d degrees C by user\n", 371 force_tjmax); 372 return force_tjmax * 1000; 373 } 374 375 /* 376 * An assumption is made for early CPUs and unreadable MSR. 377 * NOTE: the calculated value may not be correct. 378 */ 379 return adjust_tjmax(c, id, dev); 380} 381 382static int create_core_attrs(struct temp_data *tdata, struct device *dev, 383 int index) 384{ 385 int i; 386 static ssize_t (*const rd_ptr[TOTAL_ATTRS]) (struct device *dev, 387 struct device_attribute *devattr, char *buf) = { 388 show_label, show_crit_alarm, show_temp, show_tjmax, 389 show_ttarget }; 390 static const char *const suffixes[TOTAL_ATTRS] = { 391 "label", "crit_alarm", "input", "crit", "max" 392 }; 393 394 for (i = 0; i < tdata->attr_size; i++) { 395 /* 396 * We map the attr number to core id of the CPU 397 * The attr number is always core id + 2 398 * The Pkgtemp will always show up as temp1_*, if available 399 */ 400 int attr_no = tdata->is_pkg_data ? 1 : tdata->cpu_core_id + 2; 401 402 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, 403 "temp%d_%s", attr_no, suffixes[i]); 404 sysfs_attr_init(&tdata->sd_attrs[i].dev_attr.attr); 405 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i]; 406 tdata->sd_attrs[i].dev_attr.attr.mode = 0444; 407 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i]; 408 tdata->sd_attrs[i].index = index; 409 tdata->attrs[i] = &tdata->sd_attrs[i].dev_attr.attr; 410 } 411 tdata->attr_group.attrs = tdata->attrs; 412 return sysfs_create_group(&dev->kobj, &tdata->attr_group); 413} 414 415 416static int chk_ucode_version(unsigned int cpu) 417{ 418 struct cpuinfo_x86 *c = &cpu_data(cpu); 419 420 /* 421 * Check if we have problem with errata AE18 of Core processors: 422 * Readings might stop update when processor visited too deep sleep, 423 * fixed for stepping D0 (6EC). 424 */ 425 if (c->x86_model == 0xe && c->x86_stepping < 0xc && c->microcode < 0x39) { 426 pr_err("Errata AE18 not fixed, update BIOS or microcode of the CPU!\n"); 427 return -ENODEV; 428 } 429 return 0; 430} 431 432static struct platform_device *coretemp_get_pdev(unsigned int cpu) 433{ 434 int id = topology_logical_die_id(cpu); 435 436 if (id >= 0 && id < max_zones) 437 return zone_devices[id]; 438 return NULL; 439} 440 441static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag) 442{ 443 struct temp_data *tdata; 444 445 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL); 446 if (!tdata) 447 return NULL; 448 449 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS : 450 MSR_IA32_THERM_STATUS; 451 tdata->is_pkg_data = pkg_flag; 452 tdata->cpu = cpu; 453 tdata->cpu_core_id = topology_core_id(cpu); 454 tdata->attr_size = MAX_CORE_ATTRS; 455 mutex_init(&tdata->update_lock); 456 return tdata; 457} 458 459static int create_core_data(struct platform_device *pdev, unsigned int cpu, 460 int pkg_flag) 461{ 462 struct temp_data *tdata; 463 struct platform_data *pdata = platform_get_drvdata(pdev); 464 struct cpuinfo_x86 *c = &cpu_data(cpu); 465 u32 eax, edx; 466 int err, index; 467 468 /* 469 * Get the index of tdata in pdata->core_data[] 470 * tdata for package: pdata->core_data[1] 471 * tdata for core: pdata->core_data[2] .. pdata->core_data[NUM_REAL_CORES + 1] 472 */ 473 if (pkg_flag) { 474 index = PKG_SYSFS_ATTR_NO; 475 } else { 476 index = ida_alloc_max(&pdata->ida, NUM_REAL_CORES - 1, GFP_KERNEL); 477 if (index < 0) 478 return index; 479 480 pdata->cpu_map[index] = topology_core_id(cpu); 481 index += BASE_SYSFS_ATTR_NO; 482 } 483 484 tdata = init_temp_data(cpu, pkg_flag); 485 if (!tdata) { 486 err = -ENOMEM; 487 goto ida_free; 488 } 489 490 /* Test if we can access the status register */ 491 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx); 492 if (err) 493 goto exit_free; 494 495 /* We can access status register. Get Critical Temperature */ 496 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev); 497 498 /* 499 * Read the still undocumented bits 8:15 of IA32_TEMPERATURE_TARGET. 500 * The target temperature is available on older CPUs but not in this 501 * register. Atoms don't have the register at all. 502 */ 503 if (c->x86_model > 0xe && c->x86_model != 0x1c) { 504 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, 505 &eax, &edx); 506 if (!err) { 507 tdata->ttarget 508 = tdata->tjmax - ((eax >> 8) & 0xff) * 1000; 509 tdata->attr_size++; 510 } 511 } 512 513 pdata->core_data[index] = tdata; 514 515 /* Create sysfs interfaces */ 516 err = create_core_attrs(tdata, pdata->hwmon_dev, index); 517 if (err) 518 goto exit_free; 519 520 return 0; 521exit_free: 522 pdata->core_data[index] = NULL; 523 kfree(tdata); 524ida_free: 525 if (!pkg_flag) 526 ida_free(&pdata->ida, index - BASE_SYSFS_ATTR_NO); 527 return err; 528} 529 530static void 531coretemp_add_core(struct platform_device *pdev, unsigned int cpu, int pkg_flag) 532{ 533 if (create_core_data(pdev, cpu, pkg_flag)) 534 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu); 535} 536 537static void coretemp_remove_core(struct platform_data *pdata, int indx) 538{ 539 struct temp_data *tdata = pdata->core_data[indx]; 540 541 /* if we errored on add then this is already gone */ 542 if (!tdata) 543 return; 544 545 /* Remove the sysfs attributes */ 546 sysfs_remove_group(&pdata->hwmon_dev->kobj, &tdata->attr_group); 547 548 kfree(pdata->core_data[indx]); 549 pdata->core_data[indx] = NULL; 550 551 if (indx >= BASE_SYSFS_ATTR_NO) 552 ida_free(&pdata->ida, indx - BASE_SYSFS_ATTR_NO); 553} 554 555static int coretemp_device_add(int zoneid) 556{ 557 struct platform_device *pdev; 558 struct platform_data *pdata; 559 int err; 560 561 /* Initialize the per-zone data structures */ 562 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); 563 if (!pdata) 564 return -ENOMEM; 565 566 pdata->pkg_id = zoneid; 567 ida_init(&pdata->ida); 568 569 pdev = platform_device_alloc(DRVNAME, zoneid); 570 if (!pdev) { 571 err = -ENOMEM; 572 goto err_free_pdata; 573 } 574 575 err = platform_device_add(pdev); 576 if (err) 577 goto err_put_dev; 578 579 platform_set_drvdata(pdev, pdata); 580 zone_devices[zoneid] = pdev; 581 return 0; 582 583err_put_dev: 584 platform_device_put(pdev); 585err_free_pdata: 586 kfree(pdata); 587 return err; 588} 589 590static void coretemp_device_remove(int zoneid) 591{ 592 struct platform_device *pdev = zone_devices[zoneid]; 593 struct platform_data *pdata = platform_get_drvdata(pdev); 594 595 ida_destroy(&pdata->ida); 596 kfree(pdata); 597 platform_device_unregister(pdev); 598} 599 600static int coretemp_cpu_online(unsigned int cpu) 601{ 602 struct platform_device *pdev = coretemp_get_pdev(cpu); 603 struct cpuinfo_x86 *c = &cpu_data(cpu); 604 struct platform_data *pdata; 605 606 /* 607 * Don't execute this on resume as the offline callback did 608 * not get executed on suspend. 609 */ 610 if (cpuhp_tasks_frozen) 611 return 0; 612 613 /* 614 * CPUID.06H.EAX[0] indicates whether the CPU has thermal 615 * sensors. We check this bit only, all the early CPUs 616 * without thermal sensors will be filtered out. 617 */ 618 if (!cpu_has(c, X86_FEATURE_DTHERM)) 619 return -ENODEV; 620 621 pdata = platform_get_drvdata(pdev); 622 if (!pdata->hwmon_dev) { 623 struct device *hwmon; 624 625 /* Check the microcode version of the CPU */ 626 if (chk_ucode_version(cpu)) 627 return -EINVAL; 628 629 /* 630 * Alright, we have DTS support. 631 * We are bringing the _first_ core in this pkg 632 * online. So, initialize per-pkg data structures and 633 * then bring this core online. 634 */ 635 hwmon = hwmon_device_register_with_groups(&pdev->dev, DRVNAME, 636 pdata, NULL); 637 if (IS_ERR(hwmon)) 638 return PTR_ERR(hwmon); 639 pdata->hwmon_dev = hwmon; 640 641 /* 642 * Check whether pkgtemp support is available. 643 * If so, add interfaces for pkgtemp. 644 */ 645 if (cpu_has(c, X86_FEATURE_PTS)) 646 coretemp_add_core(pdev, cpu, 1); 647 } 648 649 /* 650 * Check whether a thread sibling is already online. If not add the 651 * interface for this CPU core. 652 */ 653 if (!cpumask_intersects(&pdata->cpumask, topology_sibling_cpumask(cpu))) 654 coretemp_add_core(pdev, cpu, 0); 655 656 cpumask_set_cpu(cpu, &pdata->cpumask); 657 return 0; 658} 659 660static int coretemp_cpu_offline(unsigned int cpu) 661{ 662 struct platform_device *pdev = coretemp_get_pdev(cpu); 663 struct platform_data *pd; 664 struct temp_data *tdata; 665 int i, indx = -1, target; 666 667 /* No need to tear down any interfaces for suspend */ 668 if (cpuhp_tasks_frozen) 669 return 0; 670 671 /* If the physical CPU device does not exist, just return */ 672 pd = platform_get_drvdata(pdev); 673 if (!pd->hwmon_dev) 674 return 0; 675 676 for (i = 0; i < NUM_REAL_CORES; i++) { 677 if (pd->cpu_map[i] == topology_core_id(cpu)) { 678 indx = i + BASE_SYSFS_ATTR_NO; 679 break; 680 } 681 } 682 683 /* Too many cores and this core is not populated, just return */ 684 if (indx < 0) 685 return 0; 686 687 tdata = pd->core_data[indx]; 688 689 cpumask_clear_cpu(cpu, &pd->cpumask); 690 691 /* 692 * If this is the last thread sibling, remove the CPU core 693 * interface, If there is still a sibling online, transfer the 694 * target cpu of that core interface to it. 695 */ 696 target = cpumask_any_and(&pd->cpumask, topology_sibling_cpumask(cpu)); 697 if (target >= nr_cpu_ids) { 698 coretemp_remove_core(pd, indx); 699 } else if (tdata && tdata->cpu == cpu) { 700 mutex_lock(&tdata->update_lock); 701 tdata->cpu = target; 702 mutex_unlock(&tdata->update_lock); 703 } 704 705 /* 706 * If all cores in this pkg are offline, remove the interface. 707 */ 708 tdata = pd->core_data[PKG_SYSFS_ATTR_NO]; 709 if (cpumask_empty(&pd->cpumask)) { 710 if (tdata) 711 coretemp_remove_core(pd, PKG_SYSFS_ATTR_NO); 712 hwmon_device_unregister(pd->hwmon_dev); 713 pd->hwmon_dev = NULL; 714 return 0; 715 } 716 717 /* 718 * Check whether this core is the target for the package 719 * interface. We need to assign it to some other cpu. 720 */ 721 if (tdata && tdata->cpu == cpu) { 722 target = cpumask_first(&pd->cpumask); 723 mutex_lock(&tdata->update_lock); 724 tdata->cpu = target; 725 mutex_unlock(&tdata->update_lock); 726 } 727 return 0; 728} 729static const struct x86_cpu_id __initconst coretemp_ids[] = { 730 X86_MATCH_VENDOR_FEATURE(INTEL, X86_FEATURE_DTHERM, NULL), 731 {} 732}; 733MODULE_DEVICE_TABLE(x86cpu, coretemp_ids); 734 735static enum cpuhp_state coretemp_hp_online; 736 737static int __init coretemp_init(void) 738{ 739 int i, err; 740 741 /* 742 * CPUID.06H.EAX[0] indicates whether the CPU has thermal 743 * sensors. We check this bit only, all the early CPUs 744 * without thermal sensors will be filtered out. 745 */ 746 if (!x86_match_cpu(coretemp_ids)) 747 return -ENODEV; 748 749 max_zones = topology_max_packages() * topology_max_die_per_package(); 750 zone_devices = kcalloc(max_zones, sizeof(struct platform_device *), 751 GFP_KERNEL); 752 if (!zone_devices) 753 return -ENOMEM; 754 755 for (i = 0; i < max_zones; i++) { 756 err = coretemp_device_add(i); 757 if (err) 758 goto outzone; 759 } 760 761 err = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "hwmon/coretemp:online", 762 coretemp_cpu_online, coretemp_cpu_offline); 763 if (err < 0) 764 goto outzone; 765 coretemp_hp_online = err; 766 return 0; 767 768outzone: 769 while (i--) 770 coretemp_device_remove(i); 771 kfree(zone_devices); 772 return err; 773} 774module_init(coretemp_init) 775 776static void __exit coretemp_exit(void) 777{ 778 int i; 779 780 cpuhp_remove_state(coretemp_hp_online); 781 for (i = 0; i < max_zones; i++) 782 coretemp_device_remove(i); 783 kfree(zone_devices); 784} 785module_exit(coretemp_exit) 786 787MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>"); 788MODULE_DESCRIPTION("Intel Core temperature monitor"); 789MODULE_LICENSE("GPL"); 790