18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * ads7871 - driver for TI ADS7871 A/D converter 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (c) 2010 Paul Thomas <pthomas8589@gmail.com> 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * You need to have something like this in struct spi_board_info 88c2ecf20Sopenharmony_ci * { 98c2ecf20Sopenharmony_ci * .modalias = "ads7871", 108c2ecf20Sopenharmony_ci * .max_speed_hz = 2*1000*1000, 118c2ecf20Sopenharmony_ci * .chip_select = 0, 128c2ecf20Sopenharmony_ci * .bus_num = 1, 138c2ecf20Sopenharmony_ci * }, 148c2ecf20Sopenharmony_ci */ 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci/*From figure 18 in the datasheet*/ 178c2ecf20Sopenharmony_ci/*Register addresses*/ 188c2ecf20Sopenharmony_ci#define REG_LS_BYTE 0 /*A/D Output Data, LS Byte*/ 198c2ecf20Sopenharmony_ci#define REG_MS_BYTE 1 /*A/D Output Data, MS Byte*/ 208c2ecf20Sopenharmony_ci#define REG_PGA_VALID 2 /*PGA Valid Register*/ 218c2ecf20Sopenharmony_ci#define REG_AD_CONTROL 3 /*A/D Control Register*/ 228c2ecf20Sopenharmony_ci#define REG_GAIN_MUX 4 /*Gain/Mux Register*/ 238c2ecf20Sopenharmony_ci#define REG_IO_STATE 5 /*Digital I/O State Register*/ 248c2ecf20Sopenharmony_ci#define REG_IO_CONTROL 6 /*Digital I/O Control Register*/ 258c2ecf20Sopenharmony_ci#define REG_OSC_CONTROL 7 /*Rev/Oscillator Control Register*/ 268c2ecf20Sopenharmony_ci#define REG_SER_CONTROL 24 /*Serial Interface Control Register*/ 278c2ecf20Sopenharmony_ci#define REG_ID 31 /*ID Register*/ 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci/* 308c2ecf20Sopenharmony_ci * From figure 17 in the datasheet 318c2ecf20Sopenharmony_ci * These bits get ORed with the address to form 328c2ecf20Sopenharmony_ci * the instruction byte 338c2ecf20Sopenharmony_ci */ 348c2ecf20Sopenharmony_ci/*Instruction Bit masks*/ 358c2ecf20Sopenharmony_ci#define INST_MODE_BM (1 << 7) 368c2ecf20Sopenharmony_ci#define INST_READ_BM (1 << 6) 378c2ecf20Sopenharmony_ci#define INST_16BIT_BM (1 << 5) 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci/*From figure 18 in the datasheet*/ 408c2ecf20Sopenharmony_ci/*bit masks for Rev/Oscillator Control Register*/ 418c2ecf20Sopenharmony_ci#define MUX_CNV_BV 7 428c2ecf20Sopenharmony_ci#define MUX_CNV_BM (1 << MUX_CNV_BV) 438c2ecf20Sopenharmony_ci#define MUX_M3_BM (1 << 3) /*M3 selects single ended*/ 448c2ecf20Sopenharmony_ci#define MUX_G_BV 4 /*allows for reg = (gain << MUX_G_BV) | ...*/ 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci/*From figure 18 in the datasheet*/ 478c2ecf20Sopenharmony_ci/*bit masks for Rev/Oscillator Control Register*/ 488c2ecf20Sopenharmony_ci#define OSC_OSCR_BM (1 << 5) 498c2ecf20Sopenharmony_ci#define OSC_OSCE_BM (1 << 4) 508c2ecf20Sopenharmony_ci#define OSC_REFE_BM (1 << 3) 518c2ecf20Sopenharmony_ci#define OSC_BUFE_BM (1 << 2) 528c2ecf20Sopenharmony_ci#define OSC_R2V_BM (1 << 1) 538c2ecf20Sopenharmony_ci#define OSC_RBG_BM (1 << 0) 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci#include <linux/module.h> 568c2ecf20Sopenharmony_ci#include <linux/init.h> 578c2ecf20Sopenharmony_ci#include <linux/spi/spi.h> 588c2ecf20Sopenharmony_ci#include <linux/hwmon.h> 598c2ecf20Sopenharmony_ci#include <linux/hwmon-sysfs.h> 608c2ecf20Sopenharmony_ci#include <linux/err.h> 618c2ecf20Sopenharmony_ci#include <linux/delay.h> 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci#define DEVICE_NAME "ads7871" 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_cistruct ads7871_data { 668c2ecf20Sopenharmony_ci struct spi_device *spi; 678c2ecf20Sopenharmony_ci}; 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_cistatic int ads7871_read_reg8(struct spi_device *spi, int reg) 708c2ecf20Sopenharmony_ci{ 718c2ecf20Sopenharmony_ci int ret; 728c2ecf20Sopenharmony_ci reg = reg | INST_READ_BM; 738c2ecf20Sopenharmony_ci ret = spi_w8r8(spi, reg); 748c2ecf20Sopenharmony_ci return ret; 758c2ecf20Sopenharmony_ci} 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_cistatic int ads7871_read_reg16(struct spi_device *spi, int reg) 788c2ecf20Sopenharmony_ci{ 798c2ecf20Sopenharmony_ci int ret; 808c2ecf20Sopenharmony_ci reg = reg | INST_READ_BM | INST_16BIT_BM; 818c2ecf20Sopenharmony_ci ret = spi_w8r16(spi, reg); 828c2ecf20Sopenharmony_ci return ret; 838c2ecf20Sopenharmony_ci} 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_cistatic int ads7871_write_reg8(struct spi_device *spi, int reg, u8 val) 868c2ecf20Sopenharmony_ci{ 878c2ecf20Sopenharmony_ci u8 tmp[2] = {reg, val}; 888c2ecf20Sopenharmony_ci return spi_write(spi, tmp, sizeof(tmp)); 898c2ecf20Sopenharmony_ci} 908c2ecf20Sopenharmony_ci 918c2ecf20Sopenharmony_cistatic ssize_t voltage_show(struct device *dev, struct device_attribute *da, 928c2ecf20Sopenharmony_ci char *buf) 938c2ecf20Sopenharmony_ci{ 948c2ecf20Sopenharmony_ci struct ads7871_data *pdata = dev_get_drvdata(dev); 958c2ecf20Sopenharmony_ci struct spi_device *spi = pdata->spi; 968c2ecf20Sopenharmony_ci struct sensor_device_attribute *attr = to_sensor_dev_attr(da); 978c2ecf20Sopenharmony_ci int ret, val, i = 0; 988c2ecf20Sopenharmony_ci uint8_t channel, mux_cnv; 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci channel = attr->index; 1018c2ecf20Sopenharmony_ci /* 1028c2ecf20Sopenharmony_ci * TODO: add support for conversions 1038c2ecf20Sopenharmony_ci * other than single ended with a gain of 1 1048c2ecf20Sopenharmony_ci */ 1058c2ecf20Sopenharmony_ci /*MUX_M3_BM forces single ended*/ 1068c2ecf20Sopenharmony_ci /*This is also where the gain of the PGA would be set*/ 1078c2ecf20Sopenharmony_ci ads7871_write_reg8(spi, REG_GAIN_MUX, 1088c2ecf20Sopenharmony_ci (MUX_CNV_BM | MUX_M3_BM | channel)); 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ci ret = ads7871_read_reg8(spi, REG_GAIN_MUX); 1118c2ecf20Sopenharmony_ci mux_cnv = ((ret & MUX_CNV_BM) >> MUX_CNV_BV); 1128c2ecf20Sopenharmony_ci /* 1138c2ecf20Sopenharmony_ci * on 400MHz arm9 platform the conversion 1148c2ecf20Sopenharmony_ci * is already done when we do this test 1158c2ecf20Sopenharmony_ci */ 1168c2ecf20Sopenharmony_ci while ((i < 2) && mux_cnv) { 1178c2ecf20Sopenharmony_ci i++; 1188c2ecf20Sopenharmony_ci ret = ads7871_read_reg8(spi, REG_GAIN_MUX); 1198c2ecf20Sopenharmony_ci mux_cnv = ((ret & MUX_CNV_BM) >> MUX_CNV_BV); 1208c2ecf20Sopenharmony_ci msleep_interruptible(1); 1218c2ecf20Sopenharmony_ci } 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ci if (mux_cnv == 0) { 1248c2ecf20Sopenharmony_ci val = ads7871_read_reg16(spi, REG_LS_BYTE); 1258c2ecf20Sopenharmony_ci /*result in volts*10000 = (val/8192)*2.5*10000*/ 1268c2ecf20Sopenharmony_ci val = ((val >> 2) * 25000) / 8192; 1278c2ecf20Sopenharmony_ci return sprintf(buf, "%d\n", val); 1288c2ecf20Sopenharmony_ci } else { 1298c2ecf20Sopenharmony_ci return -1; 1308c2ecf20Sopenharmony_ci } 1318c2ecf20Sopenharmony_ci} 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_cistatic SENSOR_DEVICE_ATTR_RO(in0_input, voltage, 0); 1348c2ecf20Sopenharmony_cistatic SENSOR_DEVICE_ATTR_RO(in1_input, voltage, 1); 1358c2ecf20Sopenharmony_cistatic SENSOR_DEVICE_ATTR_RO(in2_input, voltage, 2); 1368c2ecf20Sopenharmony_cistatic SENSOR_DEVICE_ATTR_RO(in3_input, voltage, 3); 1378c2ecf20Sopenharmony_cistatic SENSOR_DEVICE_ATTR_RO(in4_input, voltage, 4); 1388c2ecf20Sopenharmony_cistatic SENSOR_DEVICE_ATTR_RO(in5_input, voltage, 5); 1398c2ecf20Sopenharmony_cistatic SENSOR_DEVICE_ATTR_RO(in6_input, voltage, 6); 1408c2ecf20Sopenharmony_cistatic SENSOR_DEVICE_ATTR_RO(in7_input, voltage, 7); 1418c2ecf20Sopenharmony_ci 1428c2ecf20Sopenharmony_cistatic struct attribute *ads7871_attrs[] = { 1438c2ecf20Sopenharmony_ci &sensor_dev_attr_in0_input.dev_attr.attr, 1448c2ecf20Sopenharmony_ci &sensor_dev_attr_in1_input.dev_attr.attr, 1458c2ecf20Sopenharmony_ci &sensor_dev_attr_in2_input.dev_attr.attr, 1468c2ecf20Sopenharmony_ci &sensor_dev_attr_in3_input.dev_attr.attr, 1478c2ecf20Sopenharmony_ci &sensor_dev_attr_in4_input.dev_attr.attr, 1488c2ecf20Sopenharmony_ci &sensor_dev_attr_in5_input.dev_attr.attr, 1498c2ecf20Sopenharmony_ci &sensor_dev_attr_in6_input.dev_attr.attr, 1508c2ecf20Sopenharmony_ci &sensor_dev_attr_in7_input.dev_attr.attr, 1518c2ecf20Sopenharmony_ci NULL 1528c2ecf20Sopenharmony_ci}; 1538c2ecf20Sopenharmony_ci 1548c2ecf20Sopenharmony_ciATTRIBUTE_GROUPS(ads7871); 1558c2ecf20Sopenharmony_ci 1568c2ecf20Sopenharmony_cistatic int ads7871_probe(struct spi_device *spi) 1578c2ecf20Sopenharmony_ci{ 1588c2ecf20Sopenharmony_ci struct device *dev = &spi->dev; 1598c2ecf20Sopenharmony_ci int ret; 1608c2ecf20Sopenharmony_ci uint8_t val; 1618c2ecf20Sopenharmony_ci struct ads7871_data *pdata; 1628c2ecf20Sopenharmony_ci struct device *hwmon_dev; 1638c2ecf20Sopenharmony_ci 1648c2ecf20Sopenharmony_ci /* Configure the SPI bus */ 1658c2ecf20Sopenharmony_ci spi->mode = (SPI_MODE_0); 1668c2ecf20Sopenharmony_ci spi->bits_per_word = 8; 1678c2ecf20Sopenharmony_ci spi_setup(spi); 1688c2ecf20Sopenharmony_ci 1698c2ecf20Sopenharmony_ci ads7871_write_reg8(spi, REG_SER_CONTROL, 0); 1708c2ecf20Sopenharmony_ci ads7871_write_reg8(spi, REG_AD_CONTROL, 0); 1718c2ecf20Sopenharmony_ci 1728c2ecf20Sopenharmony_ci val = (OSC_OSCR_BM | OSC_OSCE_BM | OSC_REFE_BM | OSC_BUFE_BM); 1738c2ecf20Sopenharmony_ci ads7871_write_reg8(spi, REG_OSC_CONTROL, val); 1748c2ecf20Sopenharmony_ci ret = ads7871_read_reg8(spi, REG_OSC_CONTROL); 1758c2ecf20Sopenharmony_ci 1768c2ecf20Sopenharmony_ci dev_dbg(dev, "REG_OSC_CONTROL write:%x, read:%x\n", val, ret); 1778c2ecf20Sopenharmony_ci /* 1788c2ecf20Sopenharmony_ci * because there is no other error checking on an SPI bus 1798c2ecf20Sopenharmony_ci * we need to make sure we really have a chip 1808c2ecf20Sopenharmony_ci */ 1818c2ecf20Sopenharmony_ci if (val != ret) 1828c2ecf20Sopenharmony_ci return -ENODEV; 1838c2ecf20Sopenharmony_ci 1848c2ecf20Sopenharmony_ci pdata = devm_kzalloc(dev, sizeof(struct ads7871_data), GFP_KERNEL); 1858c2ecf20Sopenharmony_ci if (!pdata) 1868c2ecf20Sopenharmony_ci return -ENOMEM; 1878c2ecf20Sopenharmony_ci 1888c2ecf20Sopenharmony_ci pdata->spi = spi; 1898c2ecf20Sopenharmony_ci 1908c2ecf20Sopenharmony_ci hwmon_dev = devm_hwmon_device_register_with_groups(dev, spi->modalias, 1918c2ecf20Sopenharmony_ci pdata, 1928c2ecf20Sopenharmony_ci ads7871_groups); 1938c2ecf20Sopenharmony_ci return PTR_ERR_OR_ZERO(hwmon_dev); 1948c2ecf20Sopenharmony_ci} 1958c2ecf20Sopenharmony_ci 1968c2ecf20Sopenharmony_cistatic struct spi_driver ads7871_driver = { 1978c2ecf20Sopenharmony_ci .driver = { 1988c2ecf20Sopenharmony_ci .name = DEVICE_NAME, 1998c2ecf20Sopenharmony_ci }, 2008c2ecf20Sopenharmony_ci .probe = ads7871_probe, 2018c2ecf20Sopenharmony_ci}; 2028c2ecf20Sopenharmony_ci 2038c2ecf20Sopenharmony_cimodule_spi_driver(ads7871_driver); 2048c2ecf20Sopenharmony_ci 2058c2ecf20Sopenharmony_ciMODULE_AUTHOR("Paul Thomas <pthomas8589@gmail.com>"); 2068c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("TI ADS7871 A/D driver"); 2078c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 208