18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * PCI glue for ISHTP provider device (ISH) driver 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (c) 2014-2016, Intel Corporation. 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include <linux/module.h> 98c2ecf20Sopenharmony_ci#include <linux/moduleparam.h> 108c2ecf20Sopenharmony_ci#include <linux/kernel.h> 118c2ecf20Sopenharmony_ci#include <linux/device.h> 128c2ecf20Sopenharmony_ci#include <linux/fs.h> 138c2ecf20Sopenharmony_ci#include <linux/errno.h> 148c2ecf20Sopenharmony_ci#include <linux/types.h> 158c2ecf20Sopenharmony_ci#include <linux/pci.h> 168c2ecf20Sopenharmony_ci#include <linux/sched.h> 178c2ecf20Sopenharmony_ci#include <linux/suspend.h> 188c2ecf20Sopenharmony_ci#include <linux/interrupt.h> 198c2ecf20Sopenharmony_ci#include <linux/workqueue.h> 208c2ecf20Sopenharmony_ci#define CREATE_TRACE_POINTS 218c2ecf20Sopenharmony_ci#include <trace/events/intel_ish.h> 228c2ecf20Sopenharmony_ci#include "ishtp-dev.h" 238c2ecf20Sopenharmony_ci#include "hw-ish.h" 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_cistatic const struct pci_device_id ish_pci_tbl[] = { 268c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CHV_DEVICE_ID)}, 278c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, BXT_Ax_DEVICE_ID)}, 288c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, BXT_Bx_DEVICE_ID)}, 298c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, APL_Ax_DEVICE_ID)}, 308c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, SPT_Ax_DEVICE_ID)}, 318c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_Ax_DEVICE_ID)}, 328c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, GLK_Ax_DEVICE_ID)}, 338c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CNL_H_DEVICE_ID)}, 348c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, ICL_MOBILE_DEVICE_ID)}, 358c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, SPT_H_DEVICE_ID)}, 368c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CML_LP_DEVICE_ID)}, 378c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, CMP_H_DEVICE_ID)}, 388c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, EHL_Ax_DEVICE_ID)}, 398c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, TGL_LP_DEVICE_ID)}, 408c2ecf20Sopenharmony_ci {0, } 418c2ecf20Sopenharmony_ci}; 428c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(pci, ish_pci_tbl); 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ci/** 458c2ecf20Sopenharmony_ci * ish_event_tracer() - Callback function to dump trace messages 468c2ecf20Sopenharmony_ci * @dev: ishtp device 478c2ecf20Sopenharmony_ci * @format: printf style format 488c2ecf20Sopenharmony_ci * 498c2ecf20Sopenharmony_ci * Callback to direct log messages to Linux trace buffers 508c2ecf20Sopenharmony_ci */ 518c2ecf20Sopenharmony_cistatic __printf(2, 3) 528c2ecf20Sopenharmony_civoid ish_event_tracer(struct ishtp_device *dev, const char *format, ...) 538c2ecf20Sopenharmony_ci{ 548c2ecf20Sopenharmony_ci if (trace_ishtp_dump_enabled()) { 558c2ecf20Sopenharmony_ci va_list args; 568c2ecf20Sopenharmony_ci char tmp_buf[100]; 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci va_start(args, format); 598c2ecf20Sopenharmony_ci vsnprintf(tmp_buf, sizeof(tmp_buf), format, args); 608c2ecf20Sopenharmony_ci va_end(args); 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci trace_ishtp_dump(tmp_buf); 638c2ecf20Sopenharmony_ci } 648c2ecf20Sopenharmony_ci} 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci/** 678c2ecf20Sopenharmony_ci * ish_init() - Init function 688c2ecf20Sopenharmony_ci * @dev: ishtp device 698c2ecf20Sopenharmony_ci * 708c2ecf20Sopenharmony_ci * This function initialize wait queues for suspend/resume and call 718c2ecf20Sopenharmony_ci * calls hadware initialization function. This will initiate 728c2ecf20Sopenharmony_ci * startup sequence 738c2ecf20Sopenharmony_ci * 748c2ecf20Sopenharmony_ci * Return: 0 for success or error code for failure 758c2ecf20Sopenharmony_ci */ 768c2ecf20Sopenharmony_cistatic int ish_init(struct ishtp_device *dev) 778c2ecf20Sopenharmony_ci{ 788c2ecf20Sopenharmony_ci int ret; 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_ci /* Set the state of ISH HW to start */ 818c2ecf20Sopenharmony_ci ret = ish_hw_start(dev); 828c2ecf20Sopenharmony_ci if (ret) { 838c2ecf20Sopenharmony_ci dev_err(dev->devc, "ISH: hw start failed.\n"); 848c2ecf20Sopenharmony_ci return ret; 858c2ecf20Sopenharmony_ci } 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ci /* Start the inter process communication to ISH processor */ 888c2ecf20Sopenharmony_ci ret = ishtp_start(dev); 898c2ecf20Sopenharmony_ci if (ret) { 908c2ecf20Sopenharmony_ci dev_err(dev->devc, "ISHTP: Protocol init failed.\n"); 918c2ecf20Sopenharmony_ci return ret; 928c2ecf20Sopenharmony_ci } 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ci return 0; 958c2ecf20Sopenharmony_ci} 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_cistatic const struct pci_device_id ish_invalid_pci_ids[] = { 988c2ecf20Sopenharmony_ci /* Mehlow platform special pci ids */ 998c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xA309)}, 1008c2ecf20Sopenharmony_ci {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0xA30A)}, 1018c2ecf20Sopenharmony_ci {} 1028c2ecf20Sopenharmony_ci}; 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_cistatic inline bool ish_should_enter_d0i3(struct pci_dev *pdev) 1058c2ecf20Sopenharmony_ci{ 1068c2ecf20Sopenharmony_ci return !pm_suspend_via_firmware() || pdev->device == CHV_DEVICE_ID; 1078c2ecf20Sopenharmony_ci} 1088c2ecf20Sopenharmony_ci 1098c2ecf20Sopenharmony_cistatic inline bool ish_should_leave_d0i3(struct pci_dev *pdev) 1108c2ecf20Sopenharmony_ci{ 1118c2ecf20Sopenharmony_ci return !pm_resume_via_firmware() || pdev->device == CHV_DEVICE_ID; 1128c2ecf20Sopenharmony_ci} 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci/** 1158c2ecf20Sopenharmony_ci * ish_probe() - PCI driver probe callback 1168c2ecf20Sopenharmony_ci * @pdev: pci device 1178c2ecf20Sopenharmony_ci * @ent: pci device id 1188c2ecf20Sopenharmony_ci * 1198c2ecf20Sopenharmony_ci * Initialize PCI function, setup interrupt and call for ISH initialization 1208c2ecf20Sopenharmony_ci * 1218c2ecf20Sopenharmony_ci * Return: 0 for success or error code for failure 1228c2ecf20Sopenharmony_ci */ 1238c2ecf20Sopenharmony_cistatic int ish_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1248c2ecf20Sopenharmony_ci{ 1258c2ecf20Sopenharmony_ci int ret; 1268c2ecf20Sopenharmony_ci struct ish_hw *hw; 1278c2ecf20Sopenharmony_ci unsigned long irq_flag = 0; 1288c2ecf20Sopenharmony_ci struct ishtp_device *ishtp; 1298c2ecf20Sopenharmony_ci struct device *dev = &pdev->dev; 1308c2ecf20Sopenharmony_ci 1318c2ecf20Sopenharmony_ci /* Check for invalid platforms for ISH support */ 1328c2ecf20Sopenharmony_ci if (pci_dev_present(ish_invalid_pci_ids)) 1338c2ecf20Sopenharmony_ci return -ENODEV; 1348c2ecf20Sopenharmony_ci 1358c2ecf20Sopenharmony_ci /* enable pci dev */ 1368c2ecf20Sopenharmony_ci ret = pcim_enable_device(pdev); 1378c2ecf20Sopenharmony_ci if (ret) { 1388c2ecf20Sopenharmony_ci dev_err(dev, "ISH: Failed to enable PCI device\n"); 1398c2ecf20Sopenharmony_ci return ret; 1408c2ecf20Sopenharmony_ci } 1418c2ecf20Sopenharmony_ci 1428c2ecf20Sopenharmony_ci /* set PCI host mastering */ 1438c2ecf20Sopenharmony_ci pci_set_master(pdev); 1448c2ecf20Sopenharmony_ci 1458c2ecf20Sopenharmony_ci /* pci request regions for ISH driver */ 1468c2ecf20Sopenharmony_ci ret = pcim_iomap_regions(pdev, 1 << 0, KBUILD_MODNAME); 1478c2ecf20Sopenharmony_ci if (ret) { 1488c2ecf20Sopenharmony_ci dev_err(dev, "ISH: Failed to get PCI regions\n"); 1498c2ecf20Sopenharmony_ci return ret; 1508c2ecf20Sopenharmony_ci } 1518c2ecf20Sopenharmony_ci 1528c2ecf20Sopenharmony_ci /* allocates and initializes the ISH dev structure */ 1538c2ecf20Sopenharmony_ci ishtp = ish_dev_init(pdev); 1548c2ecf20Sopenharmony_ci if (!ishtp) { 1558c2ecf20Sopenharmony_ci ret = -ENOMEM; 1568c2ecf20Sopenharmony_ci return ret; 1578c2ecf20Sopenharmony_ci } 1588c2ecf20Sopenharmony_ci hw = to_ish_hw(ishtp); 1598c2ecf20Sopenharmony_ci ishtp->print_log = ish_event_tracer; 1608c2ecf20Sopenharmony_ci 1618c2ecf20Sopenharmony_ci /* mapping IO device memory */ 1628c2ecf20Sopenharmony_ci hw->mem_addr = pcim_iomap_table(pdev)[0]; 1638c2ecf20Sopenharmony_ci ishtp->pdev = pdev; 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_ci /* request and enable interrupt */ 1668c2ecf20Sopenharmony_ci ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES); 1678c2ecf20Sopenharmony_ci if (!pdev->msi_enabled && !pdev->msix_enabled) 1688c2ecf20Sopenharmony_ci irq_flag = IRQF_SHARED; 1698c2ecf20Sopenharmony_ci 1708c2ecf20Sopenharmony_ci ret = devm_request_irq(dev, pdev->irq, ish_irq_handler, 1718c2ecf20Sopenharmony_ci irq_flag, KBUILD_MODNAME, ishtp); 1728c2ecf20Sopenharmony_ci if (ret) { 1738c2ecf20Sopenharmony_ci dev_err(dev, "ISH: request IRQ %d failed\n", pdev->irq); 1748c2ecf20Sopenharmony_ci return ret; 1758c2ecf20Sopenharmony_ci } 1768c2ecf20Sopenharmony_ci 1778c2ecf20Sopenharmony_ci dev_set_drvdata(ishtp->devc, ishtp); 1788c2ecf20Sopenharmony_ci 1798c2ecf20Sopenharmony_ci init_waitqueue_head(&ishtp->suspend_wait); 1808c2ecf20Sopenharmony_ci init_waitqueue_head(&ishtp->resume_wait); 1818c2ecf20Sopenharmony_ci 1828c2ecf20Sopenharmony_ci ret = ish_init(ishtp); 1838c2ecf20Sopenharmony_ci if (ret) 1848c2ecf20Sopenharmony_ci return ret; 1858c2ecf20Sopenharmony_ci 1868c2ecf20Sopenharmony_ci return 0; 1878c2ecf20Sopenharmony_ci} 1888c2ecf20Sopenharmony_ci 1898c2ecf20Sopenharmony_ci/** 1908c2ecf20Sopenharmony_ci * ish_remove() - PCI driver remove callback 1918c2ecf20Sopenharmony_ci * @pdev: pci device 1928c2ecf20Sopenharmony_ci * 1938c2ecf20Sopenharmony_ci * This function does cleanup of ISH on pci remove callback 1948c2ecf20Sopenharmony_ci */ 1958c2ecf20Sopenharmony_cistatic void ish_remove(struct pci_dev *pdev) 1968c2ecf20Sopenharmony_ci{ 1978c2ecf20Sopenharmony_ci struct ishtp_device *ishtp_dev = pci_get_drvdata(pdev); 1988c2ecf20Sopenharmony_ci 1998c2ecf20Sopenharmony_ci ishtp_bus_remove_all_clients(ishtp_dev, false); 2008c2ecf20Sopenharmony_ci ish_device_disable(ishtp_dev); 2018c2ecf20Sopenharmony_ci} 2028c2ecf20Sopenharmony_ci 2038c2ecf20Sopenharmony_cistatic struct device __maybe_unused *ish_resume_device; 2048c2ecf20Sopenharmony_ci 2058c2ecf20Sopenharmony_ci/* 50ms to get resume response */ 2068c2ecf20Sopenharmony_ci#define WAIT_FOR_RESUME_ACK_MS 50 2078c2ecf20Sopenharmony_ci 2088c2ecf20Sopenharmony_ci/** 2098c2ecf20Sopenharmony_ci * ish_resume_handler() - Work function to complete resume 2108c2ecf20Sopenharmony_ci * @work: work struct 2118c2ecf20Sopenharmony_ci * 2128c2ecf20Sopenharmony_ci * The resume work function to complete resume function asynchronously. 2138c2ecf20Sopenharmony_ci * There are two resume paths, one where ISH is not powered off, 2148c2ecf20Sopenharmony_ci * in that case a simple resume message is enough, others we need 2158c2ecf20Sopenharmony_ci * a reset sequence. 2168c2ecf20Sopenharmony_ci */ 2178c2ecf20Sopenharmony_cistatic void __maybe_unused ish_resume_handler(struct work_struct *work) 2188c2ecf20Sopenharmony_ci{ 2198c2ecf20Sopenharmony_ci struct pci_dev *pdev = to_pci_dev(ish_resume_device); 2208c2ecf20Sopenharmony_ci struct ishtp_device *dev = pci_get_drvdata(pdev); 2218c2ecf20Sopenharmony_ci int ret; 2228c2ecf20Sopenharmony_ci 2238c2ecf20Sopenharmony_ci if (ish_should_leave_d0i3(pdev) && !dev->suspend_flag) { 2248c2ecf20Sopenharmony_ci disable_irq_wake(pdev->irq); 2258c2ecf20Sopenharmony_ci 2268c2ecf20Sopenharmony_ci ishtp_send_resume(dev); 2278c2ecf20Sopenharmony_ci 2288c2ecf20Sopenharmony_ci /* Waiting to get resume response */ 2298c2ecf20Sopenharmony_ci if (dev->resume_flag) 2308c2ecf20Sopenharmony_ci ret = wait_event_interruptible_timeout(dev->resume_wait, 2318c2ecf20Sopenharmony_ci !dev->resume_flag, 2328c2ecf20Sopenharmony_ci msecs_to_jiffies(WAIT_FOR_RESUME_ACK_MS)); 2338c2ecf20Sopenharmony_ci 2348c2ecf20Sopenharmony_ci /* 2358c2ecf20Sopenharmony_ci * If the flag is not cleared, something is wrong with ISH FW. 2368c2ecf20Sopenharmony_ci * So on resume, need to go through init sequence again. 2378c2ecf20Sopenharmony_ci */ 2388c2ecf20Sopenharmony_ci if (dev->resume_flag) 2398c2ecf20Sopenharmony_ci ish_init(dev); 2408c2ecf20Sopenharmony_ci } else { 2418c2ecf20Sopenharmony_ci /* 2428c2ecf20Sopenharmony_ci * Resume from the D3, full reboot of ISH processor will happen, 2438c2ecf20Sopenharmony_ci * so need to go through init sequence again. 2448c2ecf20Sopenharmony_ci */ 2458c2ecf20Sopenharmony_ci ish_init(dev); 2468c2ecf20Sopenharmony_ci } 2478c2ecf20Sopenharmony_ci} 2488c2ecf20Sopenharmony_ci 2498c2ecf20Sopenharmony_ci/** 2508c2ecf20Sopenharmony_ci * ish_suspend() - ISH suspend callback 2518c2ecf20Sopenharmony_ci * @device: device pointer 2528c2ecf20Sopenharmony_ci * 2538c2ecf20Sopenharmony_ci * ISH suspend callback 2548c2ecf20Sopenharmony_ci * 2558c2ecf20Sopenharmony_ci * Return: 0 to the pm core 2568c2ecf20Sopenharmony_ci */ 2578c2ecf20Sopenharmony_cistatic int __maybe_unused ish_suspend(struct device *device) 2588c2ecf20Sopenharmony_ci{ 2598c2ecf20Sopenharmony_ci struct pci_dev *pdev = to_pci_dev(device); 2608c2ecf20Sopenharmony_ci struct ishtp_device *dev = pci_get_drvdata(pdev); 2618c2ecf20Sopenharmony_ci 2628c2ecf20Sopenharmony_ci if (ish_should_enter_d0i3(pdev)) { 2638c2ecf20Sopenharmony_ci /* 2648c2ecf20Sopenharmony_ci * If previous suspend hasn't been asnwered then ISH is likely 2658c2ecf20Sopenharmony_ci * dead, don't attempt nested notification 2668c2ecf20Sopenharmony_ci */ 2678c2ecf20Sopenharmony_ci if (dev->suspend_flag) 2688c2ecf20Sopenharmony_ci return 0; 2698c2ecf20Sopenharmony_ci 2708c2ecf20Sopenharmony_ci dev->resume_flag = 0; 2718c2ecf20Sopenharmony_ci dev->suspend_flag = 1; 2728c2ecf20Sopenharmony_ci ishtp_send_suspend(dev); 2738c2ecf20Sopenharmony_ci 2748c2ecf20Sopenharmony_ci /* 25 ms should be enough for live ISH to flush all IPC buf */ 2758c2ecf20Sopenharmony_ci if (dev->suspend_flag) 2768c2ecf20Sopenharmony_ci wait_event_interruptible_timeout(dev->suspend_wait, 2778c2ecf20Sopenharmony_ci !dev->suspend_flag, 2788c2ecf20Sopenharmony_ci msecs_to_jiffies(25)); 2798c2ecf20Sopenharmony_ci 2808c2ecf20Sopenharmony_ci if (dev->suspend_flag) { 2818c2ecf20Sopenharmony_ci /* 2828c2ecf20Sopenharmony_ci * It looks like FW halt, clear the DMA bit, and put 2838c2ecf20Sopenharmony_ci * ISH into D3, and FW would reset on resume. 2848c2ecf20Sopenharmony_ci */ 2858c2ecf20Sopenharmony_ci ish_disable_dma(dev); 2868c2ecf20Sopenharmony_ci } else { 2878c2ecf20Sopenharmony_ci /* 2888c2ecf20Sopenharmony_ci * Save state so PCI core will keep the device at D0, 2898c2ecf20Sopenharmony_ci * the ISH would enter D0i3 2908c2ecf20Sopenharmony_ci */ 2918c2ecf20Sopenharmony_ci pci_save_state(pdev); 2928c2ecf20Sopenharmony_ci 2938c2ecf20Sopenharmony_ci enable_irq_wake(pdev->irq); 2948c2ecf20Sopenharmony_ci } 2958c2ecf20Sopenharmony_ci } else { 2968c2ecf20Sopenharmony_ci /* 2978c2ecf20Sopenharmony_ci * Clear the DMA bit before putting ISH into D3, 2988c2ecf20Sopenharmony_ci * or ISH FW would reset automatically. 2998c2ecf20Sopenharmony_ci */ 3008c2ecf20Sopenharmony_ci ish_disable_dma(dev); 3018c2ecf20Sopenharmony_ci } 3028c2ecf20Sopenharmony_ci 3038c2ecf20Sopenharmony_ci return 0; 3048c2ecf20Sopenharmony_ci} 3058c2ecf20Sopenharmony_ci 3068c2ecf20Sopenharmony_cistatic __maybe_unused DECLARE_WORK(resume_work, ish_resume_handler); 3078c2ecf20Sopenharmony_ci/** 3088c2ecf20Sopenharmony_ci * ish_resume() - ISH resume callback 3098c2ecf20Sopenharmony_ci * @device: device pointer 3108c2ecf20Sopenharmony_ci * 3118c2ecf20Sopenharmony_ci * ISH resume callback 3128c2ecf20Sopenharmony_ci * 3138c2ecf20Sopenharmony_ci * Return: 0 to the pm core 3148c2ecf20Sopenharmony_ci */ 3158c2ecf20Sopenharmony_cistatic int __maybe_unused ish_resume(struct device *device) 3168c2ecf20Sopenharmony_ci{ 3178c2ecf20Sopenharmony_ci struct pci_dev *pdev = to_pci_dev(device); 3188c2ecf20Sopenharmony_ci struct ishtp_device *dev = pci_get_drvdata(pdev); 3198c2ecf20Sopenharmony_ci 3208c2ecf20Sopenharmony_ci ish_resume_device = device; 3218c2ecf20Sopenharmony_ci dev->resume_flag = 1; 3228c2ecf20Sopenharmony_ci 3238c2ecf20Sopenharmony_ci schedule_work(&resume_work); 3248c2ecf20Sopenharmony_ci 3258c2ecf20Sopenharmony_ci return 0; 3268c2ecf20Sopenharmony_ci} 3278c2ecf20Sopenharmony_ci 3288c2ecf20Sopenharmony_cistatic SIMPLE_DEV_PM_OPS(ish_pm_ops, ish_suspend, ish_resume); 3298c2ecf20Sopenharmony_ci 3308c2ecf20Sopenharmony_cistatic struct pci_driver ish_driver = { 3318c2ecf20Sopenharmony_ci .name = KBUILD_MODNAME, 3328c2ecf20Sopenharmony_ci .id_table = ish_pci_tbl, 3338c2ecf20Sopenharmony_ci .probe = ish_probe, 3348c2ecf20Sopenharmony_ci .remove = ish_remove, 3358c2ecf20Sopenharmony_ci .driver.pm = &ish_pm_ops, 3368c2ecf20Sopenharmony_ci}; 3378c2ecf20Sopenharmony_ci 3388c2ecf20Sopenharmony_cimodule_pci_driver(ish_driver); 3398c2ecf20Sopenharmony_ci 3408c2ecf20Sopenharmony_ci/* Original author */ 3418c2ecf20Sopenharmony_ciMODULE_AUTHOR("Daniel Drubin <daniel.drubin@intel.com>"); 3428c2ecf20Sopenharmony_ci/* Adoption to upstream Linux kernel */ 3438c2ecf20Sopenharmony_ciMODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 3448c2ecf20Sopenharmony_ci 3458c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("Intel(R) Integrated Sensor Hub PCI Device Driver"); 3468c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL"); 347