18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright 2016 Linaro Ltd. 48c2ecf20Sopenharmony_ci * Copyright 2016 ZTE Corporation. 58c2ecf20Sopenharmony_ci */ 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#ifndef __ZX_VOU_H__ 88c2ecf20Sopenharmony_ci#define __ZX_VOU_H__ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#define VOU_CRTC_MASK 0x3 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci/* VOU output interfaces */ 138c2ecf20Sopenharmony_cienum vou_inf_id { 148c2ecf20Sopenharmony_ci VOU_HDMI = 0, 158c2ecf20Sopenharmony_ci VOU_RGB_LCD = 1, 168c2ecf20Sopenharmony_ci VOU_TV_ENC = 2, 178c2ecf20Sopenharmony_ci VOU_MIPI_DSI = 3, 188c2ecf20Sopenharmony_ci VOU_LVDS = 4, 198c2ecf20Sopenharmony_ci VOU_VGA = 5, 208c2ecf20Sopenharmony_ci}; 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_cienum vou_inf_hdmi_audio { 238c2ecf20Sopenharmony_ci VOU_HDMI_AUD_SPDIF = BIT(0), 248c2ecf20Sopenharmony_ci VOU_HDMI_AUD_I2S = BIT(1), 258c2ecf20Sopenharmony_ci VOU_HDMI_AUD_DSD = BIT(2), 268c2ecf20Sopenharmony_ci VOU_HDMI_AUD_HBR = BIT(3), 278c2ecf20Sopenharmony_ci VOU_HDMI_AUD_PARALLEL = BIT(4), 288c2ecf20Sopenharmony_ci}; 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_civoid vou_inf_hdmi_audio_sel(struct drm_crtc *crtc, 318c2ecf20Sopenharmony_ci enum vou_inf_hdmi_audio aud); 328c2ecf20Sopenharmony_civoid vou_inf_enable(enum vou_inf_id id, struct drm_crtc *crtc); 338c2ecf20Sopenharmony_civoid vou_inf_disable(enum vou_inf_id id, struct drm_crtc *crtc); 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_cienum vou_div_id { 368c2ecf20Sopenharmony_ci VOU_DIV_VGA, 378c2ecf20Sopenharmony_ci VOU_DIV_PIC, 388c2ecf20Sopenharmony_ci VOU_DIV_TVENC, 398c2ecf20Sopenharmony_ci VOU_DIV_HDMI_PNX, 408c2ecf20Sopenharmony_ci VOU_DIV_HDMI, 418c2ecf20Sopenharmony_ci VOU_DIV_INF, 428c2ecf20Sopenharmony_ci VOU_DIV_LAYER, 438c2ecf20Sopenharmony_ci}; 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_cienum vou_div_val { 468c2ecf20Sopenharmony_ci VOU_DIV_1 = 0, 478c2ecf20Sopenharmony_ci VOU_DIV_2 = 1, 488c2ecf20Sopenharmony_ci VOU_DIV_4 = 3, 498c2ecf20Sopenharmony_ci VOU_DIV_8 = 7, 508c2ecf20Sopenharmony_ci}; 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_cistruct vou_div_config { 538c2ecf20Sopenharmony_ci enum vou_div_id id; 548c2ecf20Sopenharmony_ci enum vou_div_val val; 558c2ecf20Sopenharmony_ci}; 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_civoid zx_vou_config_dividers(struct drm_crtc *crtc, 588c2ecf20Sopenharmony_ci struct vou_div_config *configs, int num); 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_civoid zx_vou_layer_enable(struct drm_plane *plane); 618c2ecf20Sopenharmony_civoid zx_vou_layer_disable(struct drm_plane *plane, 628c2ecf20Sopenharmony_ci struct drm_plane_state *old_state); 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci#endif /* __ZX_VOU_H__ */ 65