1/* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Authors: 6 * Dave Airlie 7 * Alon Levy 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 */ 27 28#include <linux/file.h> 29#include <linux/sync_file.h> 30#include <linux/uaccess.h> 31 32#include <drm/drm_file.h> 33#include <drm/virtgpu_drm.h> 34 35#include "virtgpu_drv.h" 36 37void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file) 38{ 39 struct virtio_gpu_device *vgdev = dev->dev_private; 40 struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 41 char dbgname[TASK_COMM_LEN]; 42 43 mutex_lock(&vfpriv->context_lock); 44 if (vfpriv->context_created) 45 goto out_unlock; 46 47 get_task_comm(dbgname, current); 48 virtio_gpu_cmd_context_create(vgdev, vfpriv->ctx_id, 49 strlen(dbgname), dbgname); 50 vfpriv->context_created = true; 51 52out_unlock: 53 mutex_unlock(&vfpriv->context_lock); 54} 55 56static int virtio_gpu_map_ioctl(struct drm_device *dev, void *data, 57 struct drm_file *file) 58{ 59 struct virtio_gpu_device *vgdev = dev->dev_private; 60 struct drm_virtgpu_map *virtio_gpu_map = data; 61 62 return virtio_gpu_mode_dumb_mmap(file, vgdev->ddev, 63 virtio_gpu_map->handle, 64 &virtio_gpu_map->offset); 65} 66 67/* 68 * Usage of execbuffer: 69 * Relocations need to take into account the full VIRTIO_GPUDrawable size. 70 * However, the command as passed from user space must *not* contain the initial 71 * VIRTIO_GPUReleaseInfo struct (first XXX bytes) 72 */ 73static int virtio_gpu_execbuffer_ioctl(struct drm_device *dev, void *data, 74 struct drm_file *file) 75{ 76 struct drm_virtgpu_execbuffer *exbuf = data; 77 struct virtio_gpu_device *vgdev = dev->dev_private; 78 struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 79 struct virtio_gpu_fence *out_fence; 80 int ret; 81 uint32_t *bo_handles = NULL; 82 void __user *user_bo_handles = NULL; 83 struct virtio_gpu_object_array *buflist = NULL; 84 struct sync_file *sync_file; 85 int in_fence_fd = exbuf->fence_fd; 86 int out_fence_fd = -1; 87 void *buf; 88 89 if (vgdev->has_virgl_3d == false) 90 return -ENOSYS; 91 92 if ((exbuf->flags & ~VIRTGPU_EXECBUF_FLAGS)) 93 return -EINVAL; 94 95 exbuf->fence_fd = -1; 96 97 virtio_gpu_create_context(dev, file); 98 if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_IN) { 99 struct dma_fence *in_fence; 100 101 in_fence = sync_file_get_fence(in_fence_fd); 102 103 if (!in_fence) 104 return -EINVAL; 105 106 /* 107 * Wait if the fence is from a foreign context, or if the fence 108 * array contains any fence from a foreign context. 109 */ 110 ret = 0; 111 if (!dma_fence_match_context(in_fence, vgdev->fence_drv.context)) 112 ret = dma_fence_wait(in_fence, true); 113 114 dma_fence_put(in_fence); 115 if (ret) 116 return ret; 117 } 118 119 if (exbuf->flags & VIRTGPU_EXECBUF_FENCE_FD_OUT) { 120 out_fence_fd = get_unused_fd_flags(O_CLOEXEC); 121 if (out_fence_fd < 0) 122 return out_fence_fd; 123 } 124 125 if (exbuf->num_bo_handles) { 126 bo_handles = kvmalloc_array(exbuf->num_bo_handles, 127 sizeof(uint32_t), GFP_KERNEL); 128 if (!bo_handles) { 129 ret = -ENOMEM; 130 goto out_unused_fd; 131 } 132 133 user_bo_handles = u64_to_user_ptr(exbuf->bo_handles); 134 if (copy_from_user(bo_handles, user_bo_handles, 135 exbuf->num_bo_handles * sizeof(uint32_t))) { 136 ret = -EFAULT; 137 goto out_unused_fd; 138 } 139 140 buflist = virtio_gpu_array_from_handles(file, bo_handles, 141 exbuf->num_bo_handles); 142 if (!buflist) { 143 ret = -ENOENT; 144 goto out_unused_fd; 145 } 146 kvfree(bo_handles); 147 bo_handles = NULL; 148 } 149 150 buf = vmemdup_user(u64_to_user_ptr(exbuf->command), exbuf->size); 151 if (IS_ERR(buf)) { 152 ret = PTR_ERR(buf); 153 goto out_unused_fd; 154 } 155 156 if (buflist) { 157 ret = virtio_gpu_array_lock_resv(buflist); 158 if (ret) 159 goto out_memdup; 160 } 161 162 out_fence = virtio_gpu_fence_alloc(vgdev); 163 if(!out_fence) { 164 ret = -ENOMEM; 165 goto out_unresv; 166 } 167 168 if (out_fence_fd >= 0) { 169 sync_file = sync_file_create(&out_fence->f); 170 if (!sync_file) { 171 dma_fence_put(&out_fence->f); 172 ret = -ENOMEM; 173 goto out_memdup; 174 } 175 176 exbuf->fence_fd = out_fence_fd; 177 fd_install(out_fence_fd, sync_file->file); 178 } 179 180 virtio_gpu_cmd_submit(vgdev, buf, exbuf->size, 181 vfpriv->ctx_id, buflist, out_fence); 182 dma_fence_put(&out_fence->f); 183 virtio_gpu_notify(vgdev); 184 return 0; 185 186out_unresv: 187 if (buflist) 188 virtio_gpu_array_unlock_resv(buflist); 189out_memdup: 190 kvfree(buf); 191out_unused_fd: 192 kvfree(bo_handles); 193 if (buflist) 194 virtio_gpu_array_put_free(buflist); 195 196 if (out_fence_fd >= 0) 197 put_unused_fd(out_fence_fd); 198 199 return ret; 200} 201 202static int virtio_gpu_getparam_ioctl(struct drm_device *dev, void *data, 203 struct drm_file *file) 204{ 205 struct virtio_gpu_device *vgdev = dev->dev_private; 206 struct drm_virtgpu_getparam *param = data; 207 int value; 208 209 switch (param->param) { 210 case VIRTGPU_PARAM_3D_FEATURES: 211 value = vgdev->has_virgl_3d == true ? 1 : 0; 212 break; 213 case VIRTGPU_PARAM_CAPSET_QUERY_FIX: 214 value = 1; 215 break; 216 default: 217 return -EINVAL; 218 } 219 if (copy_to_user(u64_to_user_ptr(param->value), &value, sizeof(int))) 220 return -EFAULT; 221 222 return 0; 223} 224 225static int virtio_gpu_resource_create_ioctl(struct drm_device *dev, void *data, 226 struct drm_file *file) 227{ 228 struct virtio_gpu_device *vgdev = dev->dev_private; 229 struct drm_virtgpu_resource_create *rc = data; 230 struct virtio_gpu_fence *fence; 231 int ret; 232 struct virtio_gpu_object *qobj; 233 struct drm_gem_object *obj; 234 uint32_t handle = 0; 235 struct virtio_gpu_object_params params = { 0 }; 236 237 if (vgdev->has_virgl_3d) { 238 virtio_gpu_create_context(dev, file); 239 params.virgl = true; 240 params.target = rc->target; 241 params.bind = rc->bind; 242 params.depth = rc->depth; 243 params.array_size = rc->array_size; 244 params.last_level = rc->last_level; 245 params.nr_samples = rc->nr_samples; 246 params.flags = rc->flags; 247 } else { 248 if (rc->depth > 1) 249 return -EINVAL; 250 if (rc->nr_samples > 1) 251 return -EINVAL; 252 if (rc->last_level > 1) 253 return -EINVAL; 254 if (rc->target != 2) 255 return -EINVAL; 256 if (rc->array_size > 1) 257 return -EINVAL; 258 } 259 260 params.format = rc->format; 261 params.width = rc->width; 262 params.height = rc->height; 263 params.size = rc->size; 264 /* allocate a single page size object */ 265 if (params.size == 0) 266 params.size = PAGE_SIZE; 267 268 fence = virtio_gpu_fence_alloc(vgdev); 269 if (!fence) 270 return -ENOMEM; 271 ret = virtio_gpu_object_create(vgdev, ¶ms, &qobj, fence); 272 dma_fence_put(&fence->f); 273 if (ret < 0) 274 return ret; 275 obj = &qobj->base.base; 276 277 ret = drm_gem_handle_create(file, obj, &handle); 278 if (ret) { 279 drm_gem_object_release(obj); 280 return ret; 281 } 282 283 rc->res_handle = qobj->hw_res_handle; /* similiar to a VM address */ 284 rc->bo_handle = handle; 285 286 /* 287 * The handle owns the reference now. But we must drop our 288 * remaining reference *after* we no longer need to dereference 289 * the obj. Otherwise userspace could guess the handle and 290 * race closing it from another thread. 291 */ 292 drm_gem_object_put(obj); 293 294 return 0; 295} 296 297static int virtio_gpu_resource_info_ioctl(struct drm_device *dev, void *data, 298 struct drm_file *file) 299{ 300 struct drm_virtgpu_resource_info *ri = data; 301 struct drm_gem_object *gobj = NULL; 302 struct virtio_gpu_object *qobj = NULL; 303 304 gobj = drm_gem_object_lookup(file, ri->bo_handle); 305 if (gobj == NULL) 306 return -ENOENT; 307 308 qobj = gem_to_virtio_gpu_obj(gobj); 309 310 ri->size = qobj->base.base.size; 311 ri->res_handle = qobj->hw_res_handle; 312 drm_gem_object_put(gobj); 313 return 0; 314} 315 316static int virtio_gpu_transfer_from_host_ioctl(struct drm_device *dev, 317 void *data, 318 struct drm_file *file) 319{ 320 struct virtio_gpu_device *vgdev = dev->dev_private; 321 struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 322 struct drm_virtgpu_3d_transfer_from_host *args = data; 323 struct virtio_gpu_object_array *objs; 324 struct virtio_gpu_fence *fence; 325 int ret; 326 u32 offset = args->offset; 327 328 if (vgdev->has_virgl_3d == false) 329 return -ENOSYS; 330 331 virtio_gpu_create_context(dev, file); 332 objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1); 333 if (objs == NULL) 334 return -ENOENT; 335 336 ret = virtio_gpu_array_lock_resv(objs); 337 if (ret != 0) 338 goto err_put_free; 339 340 fence = virtio_gpu_fence_alloc(vgdev); 341 if (!fence) { 342 ret = -ENOMEM; 343 goto err_unlock; 344 } 345 virtio_gpu_cmd_transfer_from_host_3d 346 (vgdev, vfpriv->ctx_id, offset, args->level, 347 &args->box, objs, fence); 348 dma_fence_put(&fence->f); 349 virtio_gpu_notify(vgdev); 350 return 0; 351 352err_unlock: 353 virtio_gpu_array_unlock_resv(objs); 354err_put_free: 355 virtio_gpu_array_put_free(objs); 356 return ret; 357} 358 359static int virtio_gpu_transfer_to_host_ioctl(struct drm_device *dev, void *data, 360 struct drm_file *file) 361{ 362 struct virtio_gpu_device *vgdev = dev->dev_private; 363 struct virtio_gpu_fpriv *vfpriv = file->driver_priv; 364 struct drm_virtgpu_3d_transfer_to_host *args = data; 365 struct virtio_gpu_object_array *objs; 366 struct virtio_gpu_fence *fence; 367 int ret; 368 u32 offset = args->offset; 369 370 objs = virtio_gpu_array_from_handles(file, &args->bo_handle, 1); 371 if (objs == NULL) 372 return -ENOENT; 373 374 if (!vgdev->has_virgl_3d) { 375 virtio_gpu_cmd_transfer_to_host_2d 376 (vgdev, offset, 377 args->box.w, args->box.h, args->box.x, args->box.y, 378 objs, NULL); 379 } else { 380 virtio_gpu_create_context(dev, file); 381 ret = virtio_gpu_array_lock_resv(objs); 382 if (ret != 0) 383 goto err_put_free; 384 385 ret = -ENOMEM; 386 fence = virtio_gpu_fence_alloc(vgdev); 387 if (!fence) 388 goto err_unlock; 389 390 virtio_gpu_cmd_transfer_to_host_3d 391 (vgdev, 392 vfpriv ? vfpriv->ctx_id : 0, offset, 393 args->level, &args->box, objs, fence); 394 dma_fence_put(&fence->f); 395 } 396 virtio_gpu_notify(vgdev); 397 return 0; 398 399err_unlock: 400 virtio_gpu_array_unlock_resv(objs); 401err_put_free: 402 virtio_gpu_array_put_free(objs); 403 return ret; 404} 405 406static int virtio_gpu_wait_ioctl(struct drm_device *dev, void *data, 407 struct drm_file *file) 408{ 409 struct drm_virtgpu_3d_wait *args = data; 410 struct drm_gem_object *obj; 411 long timeout = 15 * HZ; 412 int ret; 413 414 obj = drm_gem_object_lookup(file, args->handle); 415 if (obj == NULL) 416 return -ENOENT; 417 418 if (args->flags & VIRTGPU_WAIT_NOWAIT) { 419 ret = dma_resv_test_signaled_rcu(obj->resv, true); 420 } else { 421 ret = dma_resv_wait_timeout_rcu(obj->resv, true, true, 422 timeout); 423 } 424 if (ret == 0) 425 ret = -EBUSY; 426 else if (ret > 0) 427 ret = 0; 428 429 drm_gem_object_put(obj); 430 return ret; 431} 432 433static int virtio_gpu_get_caps_ioctl(struct drm_device *dev, 434 void *data, struct drm_file *file) 435{ 436 struct virtio_gpu_device *vgdev = dev->dev_private; 437 struct drm_virtgpu_get_caps *args = data; 438 unsigned size, host_caps_size; 439 int i; 440 int found_valid = -1; 441 int ret; 442 struct virtio_gpu_drv_cap_cache *cache_ent; 443 void *ptr; 444 445 if (vgdev->num_capsets == 0) 446 return -ENOSYS; 447 448 /* don't allow userspace to pass 0 */ 449 if (args->size == 0) 450 return -EINVAL; 451 452 spin_lock(&vgdev->display_info_lock); 453 for (i = 0; i < vgdev->num_capsets; i++) { 454 if (vgdev->capsets[i].id == args->cap_set_id) { 455 if (vgdev->capsets[i].max_version >= args->cap_set_ver) { 456 found_valid = i; 457 break; 458 } 459 } 460 } 461 462 if (found_valid == -1) { 463 spin_unlock(&vgdev->display_info_lock); 464 return -EINVAL; 465 } 466 467 host_caps_size = vgdev->capsets[found_valid].max_size; 468 /* only copy to user the minimum of the host caps size or the guest caps size */ 469 size = min(args->size, host_caps_size); 470 471 list_for_each_entry(cache_ent, &vgdev->cap_cache, head) { 472 if (cache_ent->id == args->cap_set_id && 473 cache_ent->version == args->cap_set_ver) { 474 spin_unlock(&vgdev->display_info_lock); 475 goto copy_exit; 476 } 477 } 478 spin_unlock(&vgdev->display_info_lock); 479 480 /* not in cache - need to talk to hw */ 481 ret = virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver, 482 &cache_ent); 483 if (ret) 484 return ret; 485 virtio_gpu_notify(vgdev); 486 487copy_exit: 488 ret = wait_event_timeout(vgdev->resp_wq, 489 atomic_read(&cache_ent->is_valid), 5 * HZ); 490 if (!ret) 491 return -EBUSY; 492 493 /* is_valid check must proceed before copy of the cache entry. */ 494 smp_rmb(); 495 496 ptr = cache_ent->caps_cache; 497 498 if (copy_to_user(u64_to_user_ptr(args->addr), ptr, size)) 499 return -EFAULT; 500 501 return 0; 502} 503 504struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS] = { 505 DRM_IOCTL_DEF_DRV(VIRTGPU_MAP, virtio_gpu_map_ioctl, 506 DRM_RENDER_ALLOW), 507 508 DRM_IOCTL_DEF_DRV(VIRTGPU_EXECBUFFER, virtio_gpu_execbuffer_ioctl, 509 DRM_RENDER_ALLOW), 510 511 DRM_IOCTL_DEF_DRV(VIRTGPU_GETPARAM, virtio_gpu_getparam_ioctl, 512 DRM_RENDER_ALLOW), 513 514 DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_CREATE, 515 virtio_gpu_resource_create_ioctl, 516 DRM_RENDER_ALLOW), 517 518 DRM_IOCTL_DEF_DRV(VIRTGPU_RESOURCE_INFO, virtio_gpu_resource_info_ioctl, 519 DRM_RENDER_ALLOW), 520 521 /* make transfer async to the main ring? - no sure, can we 522 * thread these in the underlying GL 523 */ 524 DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_FROM_HOST, 525 virtio_gpu_transfer_from_host_ioctl, 526 DRM_RENDER_ALLOW), 527 DRM_IOCTL_DEF_DRV(VIRTGPU_TRANSFER_TO_HOST, 528 virtio_gpu_transfer_to_host_ioctl, 529 DRM_RENDER_ALLOW), 530 531 DRM_IOCTL_DEF_DRV(VIRTGPU_WAIT, virtio_gpu_wait_ioctl, 532 DRM_RENDER_ALLOW), 533 534 DRM_IOCTL_DEF_DRV(VIRTGPU_GET_CAPS, virtio_gpu_get_caps_ioctl, 535 DRM_RENDER_ALLOW), 536}; 537