1/* 2 * Copyright (C) 2015 Red Hat, Inc. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining 6 * a copy of this software and associated documentation files (the 7 * "Software"), to deal in the Software without restriction, including 8 * without limitation the rights to use, copy, modify, merge, publish, 9 * distribute, sublicense, and/or sell copies of the Software, and to 10 * permit persons to whom the Software is furnished to do so, subject to 11 * the following conditions: 12 * 13 * The above copyright notice and this permission notice (including the 14 * next paragraph) shall be included in all copies or substantial 15 * portions of the Software. 16 * 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 24 */ 25 26#ifndef VIRTIO_DRV_H 27#define VIRTIO_DRV_H 28 29#include <linux/virtio.h> 30#include <linux/virtio_ids.h> 31#include <linux/virtio_config.h> 32#include <linux/virtio_gpu.h> 33 34#include <drm/drm_atomic.h> 35#include <drm/drm_drv.h> 36#include <drm/drm_encoder.h> 37#include <drm/drm_fb_helper.h> 38#include <drm/drm_gem.h> 39#include <drm/drm_gem_shmem_helper.h> 40#include <drm/drm_ioctl.h> 41#include <drm/drm_probe_helper.h> 42#include <drm/virtgpu_drm.h> 43 44#define DRIVER_NAME "virtio_gpu" 45#define DRIVER_DESC "virtio GPU" 46#define DRIVER_DATE "0" 47 48#define DRIVER_MAJOR 0 49#define DRIVER_MINOR 1 50#define DRIVER_PATCHLEVEL 0 51 52#define UUID_INITIALIZING 0 53#define UUID_INITIALIZED 1 54#define UUID_INITIALIZATION_FAILED 2 55 56struct virtio_gpu_object_params { 57 uint32_t format; 58 uint32_t width; 59 uint32_t height; 60 unsigned long size; 61 bool dumb; 62 /* 3d */ 63 bool virgl; 64 uint32_t target; 65 uint32_t bind; 66 uint32_t depth; 67 uint32_t array_size; 68 uint32_t last_level; 69 uint32_t nr_samples; 70 uint32_t flags; 71}; 72 73struct virtio_gpu_object { 74 struct drm_gem_shmem_object base; 75 uint32_t hw_res_handle; 76 bool dumb; 77 bool created; 78 79 int uuid_state; 80 uuid_t uuid; 81}; 82#define gem_to_virtio_gpu_obj(gobj) \ 83 container_of((gobj), struct virtio_gpu_object, base.base) 84 85struct virtio_gpu_object_shmem { 86 struct virtio_gpu_object base; 87 struct sg_table *pages; 88 uint32_t mapped; 89}; 90 91#define to_virtio_gpu_shmem(virtio_gpu_object) \ 92 container_of((virtio_gpu_object), struct virtio_gpu_object_shmem, base) 93 94struct virtio_gpu_object_array { 95 struct ww_acquire_ctx ticket; 96 struct list_head next; 97 u32 nents, total; 98 struct drm_gem_object *objs[]; 99}; 100 101struct virtio_gpu_vbuffer; 102struct virtio_gpu_device; 103 104typedef void (*virtio_gpu_resp_cb)(struct virtio_gpu_device *vgdev, 105 struct virtio_gpu_vbuffer *vbuf); 106 107struct virtio_gpu_fence_driver { 108 atomic64_t last_seq; 109 uint64_t sync_seq; 110 uint64_t context; 111 struct list_head fences; 112 spinlock_t lock; 113}; 114 115struct virtio_gpu_fence { 116 struct dma_fence f; 117 struct virtio_gpu_fence_driver *drv; 118 struct list_head node; 119}; 120 121struct virtio_gpu_vbuffer { 122 char *buf; 123 int size; 124 125 void *data_buf; 126 uint32_t data_size; 127 128 char *resp_buf; 129 int resp_size; 130 virtio_gpu_resp_cb resp_cb; 131 void *resp_cb_data; 132 133 struct virtio_gpu_object_array *objs; 134 struct list_head list; 135}; 136 137struct virtio_gpu_output { 138 int index; 139 struct drm_crtc crtc; 140 struct drm_connector conn; 141 struct drm_encoder enc; 142 struct virtio_gpu_display_one info; 143 struct virtio_gpu_update_cursor cursor; 144 struct edid *edid; 145 int cur_x; 146 int cur_y; 147 bool needs_modeset; 148}; 149#define drm_crtc_to_virtio_gpu_output(x) \ 150 container_of(x, struct virtio_gpu_output, crtc) 151 152struct virtio_gpu_framebuffer { 153 struct drm_framebuffer base; 154 struct virtio_gpu_fence *fence; 155}; 156#define to_virtio_gpu_framebuffer(x) \ 157 container_of(x, struct virtio_gpu_framebuffer, base) 158 159struct virtio_gpu_queue { 160 struct virtqueue *vq; 161 spinlock_t qlock; 162 wait_queue_head_t ack_queue; 163 struct work_struct dequeue_work; 164}; 165 166struct virtio_gpu_drv_capset { 167 uint32_t id; 168 uint32_t max_version; 169 uint32_t max_size; 170}; 171 172struct virtio_gpu_drv_cap_cache { 173 struct list_head head; 174 void *caps_cache; 175 uint32_t id; 176 uint32_t version; 177 uint32_t size; 178 atomic_t is_valid; 179}; 180 181struct virtio_gpu_device { 182 struct device *dev; 183 struct drm_device *ddev; 184 185 struct virtio_device *vdev; 186 187 struct virtio_gpu_output outputs[VIRTIO_GPU_MAX_SCANOUTS]; 188 uint32_t num_scanouts; 189 190 struct virtio_gpu_queue ctrlq; 191 struct virtio_gpu_queue cursorq; 192 struct kmem_cache *vbufs; 193 194 atomic_t pending_commands; 195 196 struct ida resource_ida; 197 198 wait_queue_head_t resp_wq; 199 /* current display info */ 200 spinlock_t display_info_lock; 201 bool display_info_pending; 202 203 struct virtio_gpu_fence_driver fence_drv; 204 205 struct ida ctx_id_ida; 206 207 bool has_virgl_3d; 208 bool has_edid; 209 bool has_indirect; 210 bool has_resource_assign_uuid; 211 212 struct work_struct config_changed_work; 213 214 struct work_struct obj_free_work; 215 spinlock_t obj_free_lock; 216 struct list_head obj_free_list; 217 218 struct virtio_gpu_drv_capset *capsets; 219 uint32_t num_capsets; 220 struct list_head cap_cache; 221 222 /* protects resource state when exporting */ 223 spinlock_t resource_export_lock; 224}; 225 226struct virtio_gpu_fpriv { 227 uint32_t ctx_id; 228 bool context_created; 229 struct mutex context_lock; 230}; 231 232/* virtgpu_ioctl.c */ 233#define DRM_VIRTIO_NUM_IOCTLS 10 234extern struct drm_ioctl_desc virtio_gpu_ioctls[DRM_VIRTIO_NUM_IOCTLS]; 235void virtio_gpu_create_context(struct drm_device *dev, struct drm_file *file); 236 237/* virtgpu_kms.c */ 238int virtio_gpu_init(struct drm_device *dev); 239void virtio_gpu_deinit(struct drm_device *dev); 240void virtio_gpu_release(struct drm_device *dev); 241int virtio_gpu_driver_open(struct drm_device *dev, struct drm_file *file); 242void virtio_gpu_driver_postclose(struct drm_device *dev, struct drm_file *file); 243 244/* virtgpu_gem.c */ 245int virtio_gpu_gem_object_open(struct drm_gem_object *obj, 246 struct drm_file *file); 247void virtio_gpu_gem_object_close(struct drm_gem_object *obj, 248 struct drm_file *file); 249int virtio_gpu_mode_dumb_create(struct drm_file *file_priv, 250 struct drm_device *dev, 251 struct drm_mode_create_dumb *args); 252int virtio_gpu_mode_dumb_mmap(struct drm_file *file_priv, 253 struct drm_device *dev, 254 uint32_t handle, uint64_t *offset_p); 255 256struct virtio_gpu_object_array *virtio_gpu_array_alloc(u32 nents); 257struct virtio_gpu_object_array* 258virtio_gpu_array_from_handles(struct drm_file *drm_file, u32 *handles, u32 nents); 259void virtio_gpu_array_add_obj(struct virtio_gpu_object_array *objs, 260 struct drm_gem_object *obj); 261int virtio_gpu_array_lock_resv(struct virtio_gpu_object_array *objs); 262void virtio_gpu_array_unlock_resv(struct virtio_gpu_object_array *objs); 263void virtio_gpu_array_add_fence(struct virtio_gpu_object_array *objs, 264 struct dma_fence *fence); 265void virtio_gpu_array_put_free(struct virtio_gpu_object_array *objs); 266void virtio_gpu_array_put_free_delayed(struct virtio_gpu_device *vgdev, 267 struct virtio_gpu_object_array *objs); 268void virtio_gpu_array_put_free_work(struct work_struct *work); 269 270/* virtgpu_vq.c */ 271int virtio_gpu_alloc_vbufs(struct virtio_gpu_device *vgdev); 272void virtio_gpu_free_vbufs(struct virtio_gpu_device *vgdev); 273void virtio_gpu_cmd_create_resource(struct virtio_gpu_device *vgdev, 274 struct virtio_gpu_object *bo, 275 struct virtio_gpu_object_params *params, 276 struct virtio_gpu_object_array *objs, 277 struct virtio_gpu_fence *fence); 278void virtio_gpu_cmd_unref_resource(struct virtio_gpu_device *vgdev, 279 struct virtio_gpu_object *bo); 280void virtio_gpu_cmd_transfer_to_host_2d(struct virtio_gpu_device *vgdev, 281 uint64_t offset, 282 uint32_t width, uint32_t height, 283 uint32_t x, uint32_t y, 284 struct virtio_gpu_object_array *objs, 285 struct virtio_gpu_fence *fence); 286void virtio_gpu_cmd_resource_flush(struct virtio_gpu_device *vgdev, 287 uint32_t resource_id, 288 uint32_t x, uint32_t y, 289 uint32_t width, uint32_t height); 290void virtio_gpu_cmd_set_scanout(struct virtio_gpu_device *vgdev, 291 uint32_t scanout_id, uint32_t resource_id, 292 uint32_t width, uint32_t height, 293 uint32_t x, uint32_t y); 294void virtio_gpu_object_attach(struct virtio_gpu_device *vgdev, 295 struct virtio_gpu_object *obj, 296 struct virtio_gpu_mem_entry *ents, 297 unsigned int nents); 298int virtio_gpu_attach_status_page(struct virtio_gpu_device *vgdev); 299int virtio_gpu_detach_status_page(struct virtio_gpu_device *vgdev); 300void virtio_gpu_cursor_ping(struct virtio_gpu_device *vgdev, 301 struct virtio_gpu_output *output); 302int virtio_gpu_cmd_get_display_info(struct virtio_gpu_device *vgdev); 303int virtio_gpu_cmd_get_capset_info(struct virtio_gpu_device *vgdev, int idx); 304int virtio_gpu_cmd_get_capset(struct virtio_gpu_device *vgdev, 305 int idx, int version, 306 struct virtio_gpu_drv_cap_cache **cache_p); 307int virtio_gpu_cmd_get_edids(struct virtio_gpu_device *vgdev); 308void virtio_gpu_cmd_context_create(struct virtio_gpu_device *vgdev, uint32_t id, 309 uint32_t nlen, const char *name); 310void virtio_gpu_cmd_context_destroy(struct virtio_gpu_device *vgdev, 311 uint32_t id); 312void virtio_gpu_cmd_context_attach_resource(struct virtio_gpu_device *vgdev, 313 uint32_t ctx_id, 314 struct virtio_gpu_object_array *objs); 315void virtio_gpu_cmd_context_detach_resource(struct virtio_gpu_device *vgdev, 316 uint32_t ctx_id, 317 struct virtio_gpu_object_array *objs); 318void virtio_gpu_cmd_submit(struct virtio_gpu_device *vgdev, 319 void *data, uint32_t data_size, 320 uint32_t ctx_id, 321 struct virtio_gpu_object_array *objs, 322 struct virtio_gpu_fence *fence); 323void virtio_gpu_cmd_transfer_from_host_3d(struct virtio_gpu_device *vgdev, 324 uint32_t ctx_id, 325 uint64_t offset, uint32_t level, 326 struct drm_virtgpu_3d_box *box, 327 struct virtio_gpu_object_array *objs, 328 struct virtio_gpu_fence *fence); 329void virtio_gpu_cmd_transfer_to_host_3d(struct virtio_gpu_device *vgdev, 330 uint32_t ctx_id, 331 uint64_t offset, uint32_t level, 332 struct drm_virtgpu_3d_box *box, 333 struct virtio_gpu_object_array *objs, 334 struct virtio_gpu_fence *fence); 335void 336virtio_gpu_cmd_resource_create_3d(struct virtio_gpu_device *vgdev, 337 struct virtio_gpu_object *bo, 338 struct virtio_gpu_object_params *params, 339 struct virtio_gpu_object_array *objs, 340 struct virtio_gpu_fence *fence); 341void virtio_gpu_ctrl_ack(struct virtqueue *vq); 342void virtio_gpu_cursor_ack(struct virtqueue *vq); 343void virtio_gpu_fence_ack(struct virtqueue *vq); 344void virtio_gpu_dequeue_ctrl_func(struct work_struct *work); 345void virtio_gpu_dequeue_cursor_func(struct work_struct *work); 346void virtio_gpu_dequeue_fence_func(struct work_struct *work); 347 348void virtio_gpu_notify(struct virtio_gpu_device *vgdev); 349 350int 351virtio_gpu_cmd_resource_assign_uuid(struct virtio_gpu_device *vgdev, 352 struct virtio_gpu_object_array *objs); 353 354/* virtgpu_display.c */ 355int virtio_gpu_modeset_init(struct virtio_gpu_device *vgdev); 356void virtio_gpu_modeset_fini(struct virtio_gpu_device *vgdev); 357 358/* virtgpu_plane.c */ 359uint32_t virtio_gpu_translate_format(uint32_t drm_fourcc); 360struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev, 361 enum drm_plane_type type, 362 int index); 363 364/* virtgpu_fence.c */ 365struct virtio_gpu_fence *virtio_gpu_fence_alloc( 366 struct virtio_gpu_device *vgdev); 367void virtio_gpu_fence_emit(struct virtio_gpu_device *vgdev, 368 struct virtio_gpu_ctrl_hdr *cmd_hdr, 369 struct virtio_gpu_fence *fence); 370void virtio_gpu_fence_event_process(struct virtio_gpu_device *vdev, 371 u64 last_seq); 372 373/* virtgpu_object.c */ 374void virtio_gpu_cleanup_object(struct virtio_gpu_object *bo); 375struct drm_gem_object *virtio_gpu_create_object(struct drm_device *dev, 376 size_t size); 377int virtio_gpu_object_create(struct virtio_gpu_device *vgdev, 378 struct virtio_gpu_object_params *params, 379 struct virtio_gpu_object **bo_ptr, 380 struct virtio_gpu_fence *fence); 381 382bool virtio_gpu_is_shmem(struct virtio_gpu_object *bo); 383 384/* virtgpu_prime.c */ 385struct dma_buf *virtgpu_gem_prime_export(struct drm_gem_object *obj, 386 int flags); 387struct drm_gem_object *virtgpu_gem_prime_import(struct drm_device *dev, 388 struct dma_buf *buf); 389int virtgpu_gem_prime_get_uuid(struct drm_gem_object *obj, 390 uuid_t *uuid); 391struct drm_gem_object *virtgpu_gem_prime_import_sg_table( 392 struct drm_device *dev, struct dma_buf_attachment *attach, 393 struct sg_table *sgt); 394 395/* virtgpu_debugfs.c */ 396void virtio_gpu_debugfs_init(struct drm_minor *minor); 397 398#endif 399