18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright (C) STMicroelectronics SA 2014
48c2ecf20Sopenharmony_ci * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
58c2ecf20Sopenharmony_ci */
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci#ifndef _STI_HDMI_H_
88c2ecf20Sopenharmony_ci#define _STI_HDMI_H_
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ci#include <linux/hdmi.h>
118c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
128c2ecf20Sopenharmony_ci
138c2ecf20Sopenharmony_ci#include <media/cec-notifier.h>
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci#include <drm/drm_modes.h>
168c2ecf20Sopenharmony_ci#include <drm/drm_property.h>
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci#define HDMI_STA           0x0010
198c2ecf20Sopenharmony_ci#define HDMI_STA_DLL_LCK   BIT(5)
208c2ecf20Sopenharmony_ci#define HDMI_STA_HOT_PLUG  BIT(4)
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_cistruct sti_hdmi;
238c2ecf20Sopenharmony_ci
248c2ecf20Sopenharmony_cistruct hdmi_phy_ops {
258c2ecf20Sopenharmony_ci	bool (*start)(struct sti_hdmi *hdmi);
268c2ecf20Sopenharmony_ci	void (*stop)(struct sti_hdmi *hdmi);
278c2ecf20Sopenharmony_ci};
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_cistruct hdmi_audio_params {
308c2ecf20Sopenharmony_ci	bool enabled;
318c2ecf20Sopenharmony_ci	unsigned int sample_width;
328c2ecf20Sopenharmony_ci	unsigned int sample_rate;
338c2ecf20Sopenharmony_ci	struct hdmi_audio_infoframe cea;
348c2ecf20Sopenharmony_ci};
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_cistatic const struct drm_prop_enum_list colorspace_mode_names[] = {
378c2ecf20Sopenharmony_ci	{ HDMI_COLORSPACE_RGB, "rgb" },
388c2ecf20Sopenharmony_ci	{ HDMI_COLORSPACE_YUV422, "yuv422" },
398c2ecf20Sopenharmony_ci	{ HDMI_COLORSPACE_YUV444, "yuv444" },
408c2ecf20Sopenharmony_ci};
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci#define DEFAULT_COLORSPACE_MODE HDMI_COLORSPACE_RGB
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci/**
458c2ecf20Sopenharmony_ci * STI hdmi structure
468c2ecf20Sopenharmony_ci *
478c2ecf20Sopenharmony_ci * @dev: driver device
488c2ecf20Sopenharmony_ci * @drm_dev: pointer to drm device
498c2ecf20Sopenharmony_ci * @mode: current display mode selected
508c2ecf20Sopenharmony_ci * @regs: hdmi register
518c2ecf20Sopenharmony_ci * @syscfg: syscfg register for pll rejection configuration
528c2ecf20Sopenharmony_ci * @clk_pix: hdmi pixel clock
538c2ecf20Sopenharmony_ci * @clk_tmds: hdmi tmds clock
548c2ecf20Sopenharmony_ci * @clk_phy: hdmi phy clock
558c2ecf20Sopenharmony_ci * @clk_audio: hdmi audio clock
568c2ecf20Sopenharmony_ci * @irq: hdmi interrupt number
578c2ecf20Sopenharmony_ci * @irq_status: interrupt status register
588c2ecf20Sopenharmony_ci * @phy_ops: phy start/stop operations
598c2ecf20Sopenharmony_ci * @enabled: true if hdmi is enabled else false
608c2ecf20Sopenharmony_ci * @hpd: hot plug detect status
618c2ecf20Sopenharmony_ci * @wait_event: wait event
628c2ecf20Sopenharmony_ci * @event_received: wait event status
638c2ecf20Sopenharmony_ci * @reset: reset control of the hdmi phy
648c2ecf20Sopenharmony_ci * @ddc_adapt: i2c ddc adapter
658c2ecf20Sopenharmony_ci * @colorspace: current colorspace selected
668c2ecf20Sopenharmony_ci * @hdmi_monitor: true if HDMI monitor detected else DVI monitor assumed
678c2ecf20Sopenharmony_ci * @audio_pdev: ASoC hdmi-codec platform device
688c2ecf20Sopenharmony_ci * @audio: hdmi audio parameters.
698c2ecf20Sopenharmony_ci * @drm_connector: hdmi connector
708c2ecf20Sopenharmony_ci * @notifier: hotplug detect notifier
718c2ecf20Sopenharmony_ci */
728c2ecf20Sopenharmony_cistruct sti_hdmi {
738c2ecf20Sopenharmony_ci	struct device dev;
748c2ecf20Sopenharmony_ci	struct drm_device *drm_dev;
758c2ecf20Sopenharmony_ci	struct drm_display_mode mode;
768c2ecf20Sopenharmony_ci	void __iomem *regs;
778c2ecf20Sopenharmony_ci	void __iomem *syscfg;
788c2ecf20Sopenharmony_ci	struct clk *clk_pix;
798c2ecf20Sopenharmony_ci	struct clk *clk_tmds;
808c2ecf20Sopenharmony_ci	struct clk *clk_phy;
818c2ecf20Sopenharmony_ci	struct clk *clk_audio;
828c2ecf20Sopenharmony_ci	int irq;
838c2ecf20Sopenharmony_ci	u32 irq_status;
848c2ecf20Sopenharmony_ci	struct hdmi_phy_ops *phy_ops;
858c2ecf20Sopenharmony_ci	bool enabled;
868c2ecf20Sopenharmony_ci	bool hpd;
878c2ecf20Sopenharmony_ci	wait_queue_head_t wait_event;
888c2ecf20Sopenharmony_ci	bool event_received;
898c2ecf20Sopenharmony_ci	struct reset_control *reset;
908c2ecf20Sopenharmony_ci	struct i2c_adapter *ddc_adapt;
918c2ecf20Sopenharmony_ci	enum hdmi_colorspace colorspace;
928c2ecf20Sopenharmony_ci	bool hdmi_monitor;
938c2ecf20Sopenharmony_ci	struct platform_device *audio_pdev;
948c2ecf20Sopenharmony_ci	struct hdmi_audio_params audio;
958c2ecf20Sopenharmony_ci	struct drm_connector *drm_connector;
968c2ecf20Sopenharmony_ci	struct cec_notifier *notifier;
978c2ecf20Sopenharmony_ci};
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_ciu32 hdmi_read(struct sti_hdmi *hdmi, int offset);
1008c2ecf20Sopenharmony_civoid hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci/**
1038c2ecf20Sopenharmony_ci * hdmi phy config structure
1048c2ecf20Sopenharmony_ci *
1058c2ecf20Sopenharmony_ci * A pointer to an array of these structures is passed to a TMDS (HDMI) output
1068c2ecf20Sopenharmony_ci * via the control interface to provide board and SoC specific
1078c2ecf20Sopenharmony_ci * configurations of the HDMI PHY. Each entry in the array specifies a hardware
1088c2ecf20Sopenharmony_ci * specific configuration for a given TMDS clock frequency range.
1098c2ecf20Sopenharmony_ci *
1108c2ecf20Sopenharmony_ci * @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
1118c2ecf20Sopenharmony_ci * @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
1128c2ecf20Sopenharmony_ci * @config: SoC specific register configuration
1138c2ecf20Sopenharmony_ci */
1148c2ecf20Sopenharmony_cistruct hdmi_phy_config {
1158c2ecf20Sopenharmony_ci	u32 min_tmds_freq;
1168c2ecf20Sopenharmony_ci	u32 max_tmds_freq;
1178c2ecf20Sopenharmony_ci	u32 config[4];
1188c2ecf20Sopenharmony_ci};
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_ci#endif
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