18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 OR MIT
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Copyright 2009 VMware, Inc.
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Permission is hereby granted, free of charge, to any person obtaining a
68c2ecf20Sopenharmony_ci * copy of this software and associated documentation files (the "Software"),
78c2ecf20Sopenharmony_ci * to deal in the Software without restriction, including without limitation
88c2ecf20Sopenharmony_ci * the rights to use, copy, modify, merge, publish, distribute, sublicense,
98c2ecf20Sopenharmony_ci * and/or sell copies of the Software, and to permit persons to whom the
108c2ecf20Sopenharmony_ci * Software is furnished to do so, subject to the following conditions:
118c2ecf20Sopenharmony_ci *
128c2ecf20Sopenharmony_ci * The above copyright notice and this permission notice shall be included in
138c2ecf20Sopenharmony_ci * all copies or substantial portions of the Software.
148c2ecf20Sopenharmony_ci *
158c2ecf20Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
168c2ecf20Sopenharmony_ci * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
178c2ecf20Sopenharmony_ci * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
188c2ecf20Sopenharmony_ci * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
198c2ecf20Sopenharmony_ci * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
208c2ecf20Sopenharmony_ci * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
218c2ecf20Sopenharmony_ci * OTHER DEALINGS IN THE SOFTWARE.
228c2ecf20Sopenharmony_ci *
238c2ecf20Sopenharmony_ci * Authors: Michel Dänzer
248c2ecf20Sopenharmony_ci */
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci#include <drm/radeon_drm.h>
278c2ecf20Sopenharmony_ci#include "radeon_reg.h"
288c2ecf20Sopenharmony_ci#include "radeon.h"
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci#define RADEON_TEST_COPY_BLIT 1
318c2ecf20Sopenharmony_ci#define RADEON_TEST_COPY_DMA  0
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_ci/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
358c2ecf20Sopenharmony_cistatic void radeon_do_test_moves(struct radeon_device *rdev, int flag)
368c2ecf20Sopenharmony_ci{
378c2ecf20Sopenharmony_ci	struct radeon_bo *vram_obj = NULL;
388c2ecf20Sopenharmony_ci	struct radeon_bo **gtt_obj = NULL;
398c2ecf20Sopenharmony_ci	uint64_t gtt_addr, vram_addr;
408c2ecf20Sopenharmony_ci	unsigned n, size;
418c2ecf20Sopenharmony_ci	int i, r, ring;
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci	switch (flag) {
448c2ecf20Sopenharmony_ci	case RADEON_TEST_COPY_DMA:
458c2ecf20Sopenharmony_ci		ring = radeon_copy_dma_ring_index(rdev);
468c2ecf20Sopenharmony_ci		break;
478c2ecf20Sopenharmony_ci	case RADEON_TEST_COPY_BLIT:
488c2ecf20Sopenharmony_ci		ring = radeon_copy_blit_ring_index(rdev);
498c2ecf20Sopenharmony_ci		break;
508c2ecf20Sopenharmony_ci	default:
518c2ecf20Sopenharmony_ci		DRM_ERROR("Unknown copy method\n");
528c2ecf20Sopenharmony_ci		return;
538c2ecf20Sopenharmony_ci	}
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci	size = 1024 * 1024;
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci	/* Number of tests =
588c2ecf20Sopenharmony_ci	 * (Total GTT - IB pool - writeback page - ring buffers) / test size
598c2ecf20Sopenharmony_ci	 */
608c2ecf20Sopenharmony_ci	n = rdev->mc.gtt_size - rdev->gart_pin_size;
618c2ecf20Sopenharmony_ci	n /= size;
628c2ecf20Sopenharmony_ci
638c2ecf20Sopenharmony_ci	gtt_obj = kcalloc(n, sizeof(*gtt_obj), GFP_KERNEL);
648c2ecf20Sopenharmony_ci	if (!gtt_obj) {
658c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to allocate %d pointers\n", n);
668c2ecf20Sopenharmony_ci		r = 1;
678c2ecf20Sopenharmony_ci		goto out_cleanup;
688c2ecf20Sopenharmony_ci	}
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci	r = radeon_bo_create(rdev, size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
718c2ecf20Sopenharmony_ci			     0, NULL, NULL, &vram_obj);
728c2ecf20Sopenharmony_ci	if (r) {
738c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to create VRAM object\n");
748c2ecf20Sopenharmony_ci		goto out_cleanup;
758c2ecf20Sopenharmony_ci	}
768c2ecf20Sopenharmony_ci	r = radeon_bo_reserve(vram_obj, false);
778c2ecf20Sopenharmony_ci	if (unlikely(r != 0))
788c2ecf20Sopenharmony_ci		goto out_unref;
798c2ecf20Sopenharmony_ci	r = radeon_bo_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
808c2ecf20Sopenharmony_ci	if (r) {
818c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to pin VRAM object\n");
828c2ecf20Sopenharmony_ci		goto out_unres;
838c2ecf20Sopenharmony_ci	}
848c2ecf20Sopenharmony_ci	for (i = 0; i < n; i++) {
858c2ecf20Sopenharmony_ci		void *gtt_map, *vram_map;
868c2ecf20Sopenharmony_ci		void **gtt_start, **gtt_end;
878c2ecf20Sopenharmony_ci		void **vram_start, **vram_end;
888c2ecf20Sopenharmony_ci		struct radeon_fence *fence = NULL;
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci		r = radeon_bo_create(rdev, size, PAGE_SIZE, true,
918c2ecf20Sopenharmony_ci				     RADEON_GEM_DOMAIN_GTT, 0, NULL, NULL,
928c2ecf20Sopenharmony_ci				     gtt_obj + i);
938c2ecf20Sopenharmony_ci		if (r) {
948c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to create GTT object %d\n", i);
958c2ecf20Sopenharmony_ci			goto out_lclean;
968c2ecf20Sopenharmony_ci		}
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ci		r = radeon_bo_reserve(gtt_obj[i], false);
998c2ecf20Sopenharmony_ci		if (unlikely(r != 0))
1008c2ecf20Sopenharmony_ci			goto out_lclean_unref;
1018c2ecf20Sopenharmony_ci		r = radeon_bo_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
1028c2ecf20Sopenharmony_ci		if (r) {
1038c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to pin GTT object %d\n", i);
1048c2ecf20Sopenharmony_ci			goto out_lclean_unres;
1058c2ecf20Sopenharmony_ci		}
1068c2ecf20Sopenharmony_ci
1078c2ecf20Sopenharmony_ci		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
1088c2ecf20Sopenharmony_ci		if (r) {
1098c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to map GTT object %d\n", i);
1108c2ecf20Sopenharmony_ci			goto out_lclean_unpin;
1118c2ecf20Sopenharmony_ci		}
1128c2ecf20Sopenharmony_ci
1138c2ecf20Sopenharmony_ci		for (gtt_start = gtt_map, gtt_end = gtt_map + size;
1148c2ecf20Sopenharmony_ci		     gtt_start < gtt_end;
1158c2ecf20Sopenharmony_ci		     gtt_start++)
1168c2ecf20Sopenharmony_ci			*gtt_start = gtt_start;
1178c2ecf20Sopenharmony_ci
1188c2ecf20Sopenharmony_ci		radeon_bo_kunmap(gtt_obj[i]);
1198c2ecf20Sopenharmony_ci
1208c2ecf20Sopenharmony_ci		if (ring == R600_RING_TYPE_DMA_INDEX)
1218c2ecf20Sopenharmony_ci			fence = radeon_copy_dma(rdev, gtt_addr, vram_addr,
1228c2ecf20Sopenharmony_ci						size / RADEON_GPU_PAGE_SIZE,
1238c2ecf20Sopenharmony_ci						vram_obj->tbo.base.resv);
1248c2ecf20Sopenharmony_ci		else
1258c2ecf20Sopenharmony_ci			fence = radeon_copy_blit(rdev, gtt_addr, vram_addr,
1268c2ecf20Sopenharmony_ci						 size / RADEON_GPU_PAGE_SIZE,
1278c2ecf20Sopenharmony_ci						 vram_obj->tbo.base.resv);
1288c2ecf20Sopenharmony_ci		if (IS_ERR(fence)) {
1298c2ecf20Sopenharmony_ci			DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
1308c2ecf20Sopenharmony_ci			r = PTR_ERR(fence);
1318c2ecf20Sopenharmony_ci			goto out_lclean_unpin;
1328c2ecf20Sopenharmony_ci		}
1338c2ecf20Sopenharmony_ci
1348c2ecf20Sopenharmony_ci		r = radeon_fence_wait(fence, false);
1358c2ecf20Sopenharmony_ci		if (r) {
1368c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
1378c2ecf20Sopenharmony_ci			goto out_lclean_unpin;
1388c2ecf20Sopenharmony_ci		}
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ci		radeon_fence_unref(&fence);
1418c2ecf20Sopenharmony_ci
1428c2ecf20Sopenharmony_ci		r = radeon_bo_kmap(vram_obj, &vram_map);
1438c2ecf20Sopenharmony_ci		if (r) {
1448c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
1458c2ecf20Sopenharmony_ci			goto out_lclean_unpin;
1468c2ecf20Sopenharmony_ci		}
1478c2ecf20Sopenharmony_ci
1488c2ecf20Sopenharmony_ci		for (gtt_start = gtt_map, gtt_end = gtt_map + size,
1498c2ecf20Sopenharmony_ci		     vram_start = vram_map, vram_end = vram_map + size;
1508c2ecf20Sopenharmony_ci		     vram_start < vram_end;
1518c2ecf20Sopenharmony_ci		     gtt_start++, vram_start++) {
1528c2ecf20Sopenharmony_ci			if (*vram_start != gtt_start) {
1538c2ecf20Sopenharmony_ci				DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
1548c2ecf20Sopenharmony_ci					  "expected 0x%p (GTT/VRAM offset "
1558c2ecf20Sopenharmony_ci					  "0x%16llx/0x%16llx)\n",
1568c2ecf20Sopenharmony_ci					  i, *vram_start, gtt_start,
1578c2ecf20Sopenharmony_ci					  (unsigned long long)
1588c2ecf20Sopenharmony_ci					  (gtt_addr - rdev->mc.gtt_start +
1598c2ecf20Sopenharmony_ci					   (void*)gtt_start - gtt_map),
1608c2ecf20Sopenharmony_ci					  (unsigned long long)
1618c2ecf20Sopenharmony_ci					  (vram_addr - rdev->mc.vram_start +
1628c2ecf20Sopenharmony_ci					   (void*)gtt_start - gtt_map));
1638c2ecf20Sopenharmony_ci				radeon_bo_kunmap(vram_obj);
1648c2ecf20Sopenharmony_ci				goto out_lclean_unpin;
1658c2ecf20Sopenharmony_ci			}
1668c2ecf20Sopenharmony_ci			*vram_start = vram_start;
1678c2ecf20Sopenharmony_ci		}
1688c2ecf20Sopenharmony_ci
1698c2ecf20Sopenharmony_ci		radeon_bo_kunmap(vram_obj);
1708c2ecf20Sopenharmony_ci
1718c2ecf20Sopenharmony_ci		if (ring == R600_RING_TYPE_DMA_INDEX)
1728c2ecf20Sopenharmony_ci			fence = radeon_copy_dma(rdev, vram_addr, gtt_addr,
1738c2ecf20Sopenharmony_ci						size / RADEON_GPU_PAGE_SIZE,
1748c2ecf20Sopenharmony_ci						vram_obj->tbo.base.resv);
1758c2ecf20Sopenharmony_ci		else
1768c2ecf20Sopenharmony_ci			fence = radeon_copy_blit(rdev, vram_addr, gtt_addr,
1778c2ecf20Sopenharmony_ci						 size / RADEON_GPU_PAGE_SIZE,
1788c2ecf20Sopenharmony_ci						 vram_obj->tbo.base.resv);
1798c2ecf20Sopenharmony_ci		if (IS_ERR(fence)) {
1808c2ecf20Sopenharmony_ci			DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
1818c2ecf20Sopenharmony_ci			r = PTR_ERR(fence);
1828c2ecf20Sopenharmony_ci			goto out_lclean_unpin;
1838c2ecf20Sopenharmony_ci		}
1848c2ecf20Sopenharmony_ci
1858c2ecf20Sopenharmony_ci		r = radeon_fence_wait(fence, false);
1868c2ecf20Sopenharmony_ci		if (r) {
1878c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
1888c2ecf20Sopenharmony_ci			goto out_lclean_unpin;
1898c2ecf20Sopenharmony_ci		}
1908c2ecf20Sopenharmony_ci
1918c2ecf20Sopenharmony_ci		radeon_fence_unref(&fence);
1928c2ecf20Sopenharmony_ci
1938c2ecf20Sopenharmony_ci		r = radeon_bo_kmap(gtt_obj[i], &gtt_map);
1948c2ecf20Sopenharmony_ci		if (r) {
1958c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to map GTT object after copy %d\n", i);
1968c2ecf20Sopenharmony_ci			goto out_lclean_unpin;
1978c2ecf20Sopenharmony_ci		}
1988c2ecf20Sopenharmony_ci
1998c2ecf20Sopenharmony_ci		for (gtt_start = gtt_map, gtt_end = gtt_map + size,
2008c2ecf20Sopenharmony_ci		     vram_start = vram_map, vram_end = vram_map + size;
2018c2ecf20Sopenharmony_ci		     gtt_start < gtt_end;
2028c2ecf20Sopenharmony_ci		     gtt_start++, vram_start++) {
2038c2ecf20Sopenharmony_ci			if (*gtt_start != vram_start) {
2048c2ecf20Sopenharmony_ci				DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
2058c2ecf20Sopenharmony_ci					  "expected 0x%p (VRAM/GTT offset "
2068c2ecf20Sopenharmony_ci					  "0x%16llx/0x%16llx)\n",
2078c2ecf20Sopenharmony_ci					  i, *gtt_start, vram_start,
2088c2ecf20Sopenharmony_ci					  (unsigned long long)
2098c2ecf20Sopenharmony_ci					  (vram_addr - rdev->mc.vram_start +
2108c2ecf20Sopenharmony_ci					   (void*)vram_start - vram_map),
2118c2ecf20Sopenharmony_ci					  (unsigned long long)
2128c2ecf20Sopenharmony_ci					  (gtt_addr - rdev->mc.gtt_start +
2138c2ecf20Sopenharmony_ci					   (void*)vram_start - vram_map));
2148c2ecf20Sopenharmony_ci				radeon_bo_kunmap(gtt_obj[i]);
2158c2ecf20Sopenharmony_ci				goto out_lclean_unpin;
2168c2ecf20Sopenharmony_ci			}
2178c2ecf20Sopenharmony_ci		}
2188c2ecf20Sopenharmony_ci
2198c2ecf20Sopenharmony_ci		radeon_bo_kunmap(gtt_obj[i]);
2208c2ecf20Sopenharmony_ci
2218c2ecf20Sopenharmony_ci		DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
2228c2ecf20Sopenharmony_ci			 gtt_addr - rdev->mc.gtt_start);
2238c2ecf20Sopenharmony_ci		continue;
2248c2ecf20Sopenharmony_ci
2258c2ecf20Sopenharmony_ciout_lclean_unpin:
2268c2ecf20Sopenharmony_ci		radeon_bo_unpin(gtt_obj[i]);
2278c2ecf20Sopenharmony_ciout_lclean_unres:
2288c2ecf20Sopenharmony_ci		radeon_bo_unreserve(gtt_obj[i]);
2298c2ecf20Sopenharmony_ciout_lclean_unref:
2308c2ecf20Sopenharmony_ci		radeon_bo_unref(&gtt_obj[i]);
2318c2ecf20Sopenharmony_ciout_lclean:
2328c2ecf20Sopenharmony_ci		for (--i; i >= 0; --i) {
2338c2ecf20Sopenharmony_ci			radeon_bo_unpin(gtt_obj[i]);
2348c2ecf20Sopenharmony_ci			radeon_bo_unreserve(gtt_obj[i]);
2358c2ecf20Sopenharmony_ci			radeon_bo_unref(&gtt_obj[i]);
2368c2ecf20Sopenharmony_ci		}
2378c2ecf20Sopenharmony_ci		if (fence && !IS_ERR(fence))
2388c2ecf20Sopenharmony_ci			radeon_fence_unref(&fence);
2398c2ecf20Sopenharmony_ci		break;
2408c2ecf20Sopenharmony_ci	}
2418c2ecf20Sopenharmony_ci
2428c2ecf20Sopenharmony_ci	radeon_bo_unpin(vram_obj);
2438c2ecf20Sopenharmony_ciout_unres:
2448c2ecf20Sopenharmony_ci	radeon_bo_unreserve(vram_obj);
2458c2ecf20Sopenharmony_ciout_unref:
2468c2ecf20Sopenharmony_ci	radeon_bo_unref(&vram_obj);
2478c2ecf20Sopenharmony_ciout_cleanup:
2488c2ecf20Sopenharmony_ci	kfree(gtt_obj);
2498c2ecf20Sopenharmony_ci	if (r) {
2508c2ecf20Sopenharmony_ci		pr_warn("Error while testing BO move\n");
2518c2ecf20Sopenharmony_ci	}
2528c2ecf20Sopenharmony_ci}
2538c2ecf20Sopenharmony_ci
2548c2ecf20Sopenharmony_civoid radeon_test_moves(struct radeon_device *rdev)
2558c2ecf20Sopenharmony_ci{
2568c2ecf20Sopenharmony_ci	if (rdev->asic->copy.dma)
2578c2ecf20Sopenharmony_ci		radeon_do_test_moves(rdev, RADEON_TEST_COPY_DMA);
2588c2ecf20Sopenharmony_ci	if (rdev->asic->copy.blit)
2598c2ecf20Sopenharmony_ci		radeon_do_test_moves(rdev, RADEON_TEST_COPY_BLIT);
2608c2ecf20Sopenharmony_ci}
2618c2ecf20Sopenharmony_ci
2628c2ecf20Sopenharmony_cistatic int radeon_test_create_and_emit_fence(struct radeon_device *rdev,
2638c2ecf20Sopenharmony_ci					     struct radeon_ring *ring,
2648c2ecf20Sopenharmony_ci					     struct radeon_fence **fence)
2658c2ecf20Sopenharmony_ci{
2668c2ecf20Sopenharmony_ci	uint32_t handle = ring->idx ^ 0xdeafbeef;
2678c2ecf20Sopenharmony_ci	int r;
2688c2ecf20Sopenharmony_ci
2698c2ecf20Sopenharmony_ci	if (ring->idx == R600_RING_TYPE_UVD_INDEX) {
2708c2ecf20Sopenharmony_ci		r = radeon_uvd_get_create_msg(rdev, ring->idx, handle, NULL);
2718c2ecf20Sopenharmony_ci		if (r) {
2728c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to get dummy create msg\n");
2738c2ecf20Sopenharmony_ci			return r;
2748c2ecf20Sopenharmony_ci		}
2758c2ecf20Sopenharmony_ci
2768c2ecf20Sopenharmony_ci		r = radeon_uvd_get_destroy_msg(rdev, ring->idx, handle, fence);
2778c2ecf20Sopenharmony_ci		if (r) {
2788c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to get dummy destroy msg\n");
2798c2ecf20Sopenharmony_ci			return r;
2808c2ecf20Sopenharmony_ci		}
2818c2ecf20Sopenharmony_ci
2828c2ecf20Sopenharmony_ci	} else if (ring->idx == TN_RING_TYPE_VCE1_INDEX ||
2838c2ecf20Sopenharmony_ci		   ring->idx == TN_RING_TYPE_VCE2_INDEX) {
2848c2ecf20Sopenharmony_ci		r = radeon_vce_get_create_msg(rdev, ring->idx, handle, NULL);
2858c2ecf20Sopenharmony_ci		if (r) {
2868c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to get dummy create msg\n");
2878c2ecf20Sopenharmony_ci			return r;
2888c2ecf20Sopenharmony_ci		}
2898c2ecf20Sopenharmony_ci
2908c2ecf20Sopenharmony_ci		r = radeon_vce_get_destroy_msg(rdev, ring->idx, handle, fence);
2918c2ecf20Sopenharmony_ci		if (r) {
2928c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to get dummy destroy msg\n");
2938c2ecf20Sopenharmony_ci			return r;
2948c2ecf20Sopenharmony_ci		}
2958c2ecf20Sopenharmony_ci
2968c2ecf20Sopenharmony_ci	} else {
2978c2ecf20Sopenharmony_ci		r = radeon_ring_lock(rdev, ring, 64);
2988c2ecf20Sopenharmony_ci		if (r) {
2998c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to lock ring A %d\n", ring->idx);
3008c2ecf20Sopenharmony_ci			return r;
3018c2ecf20Sopenharmony_ci		}
3028c2ecf20Sopenharmony_ci		r = radeon_fence_emit(rdev, fence, ring->idx);
3038c2ecf20Sopenharmony_ci		if (r) {
3048c2ecf20Sopenharmony_ci			DRM_ERROR("Failed to emit fence\n");
3058c2ecf20Sopenharmony_ci			radeon_ring_unlock_undo(rdev, ring);
3068c2ecf20Sopenharmony_ci			return r;
3078c2ecf20Sopenharmony_ci		}
3088c2ecf20Sopenharmony_ci		radeon_ring_unlock_commit(rdev, ring, false);
3098c2ecf20Sopenharmony_ci	}
3108c2ecf20Sopenharmony_ci	return 0;
3118c2ecf20Sopenharmony_ci}
3128c2ecf20Sopenharmony_ci
3138c2ecf20Sopenharmony_civoid radeon_test_ring_sync(struct radeon_device *rdev,
3148c2ecf20Sopenharmony_ci			   struct radeon_ring *ringA,
3158c2ecf20Sopenharmony_ci			   struct radeon_ring *ringB)
3168c2ecf20Sopenharmony_ci{
3178c2ecf20Sopenharmony_ci	struct radeon_fence *fence1 = NULL, *fence2 = NULL;
3188c2ecf20Sopenharmony_ci	struct radeon_semaphore *semaphore = NULL;
3198c2ecf20Sopenharmony_ci	int r;
3208c2ecf20Sopenharmony_ci
3218c2ecf20Sopenharmony_ci	r = radeon_semaphore_create(rdev, &semaphore);
3228c2ecf20Sopenharmony_ci	if (r) {
3238c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to create semaphore\n");
3248c2ecf20Sopenharmony_ci		goto out_cleanup;
3258c2ecf20Sopenharmony_ci	}
3268c2ecf20Sopenharmony_ci
3278c2ecf20Sopenharmony_ci	r = radeon_ring_lock(rdev, ringA, 64);
3288c2ecf20Sopenharmony_ci	if (r) {
3298c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
3308c2ecf20Sopenharmony_ci		goto out_cleanup;
3318c2ecf20Sopenharmony_ci	}
3328c2ecf20Sopenharmony_ci	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
3338c2ecf20Sopenharmony_ci	radeon_ring_unlock_commit(rdev, ringA, false);
3348c2ecf20Sopenharmony_ci
3358c2ecf20Sopenharmony_ci	r = radeon_test_create_and_emit_fence(rdev, ringA, &fence1);
3368c2ecf20Sopenharmony_ci	if (r)
3378c2ecf20Sopenharmony_ci		goto out_cleanup;
3388c2ecf20Sopenharmony_ci
3398c2ecf20Sopenharmony_ci	r = radeon_ring_lock(rdev, ringA, 64);
3408c2ecf20Sopenharmony_ci	if (r) {
3418c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
3428c2ecf20Sopenharmony_ci		goto out_cleanup;
3438c2ecf20Sopenharmony_ci	}
3448c2ecf20Sopenharmony_ci	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
3458c2ecf20Sopenharmony_ci	radeon_ring_unlock_commit(rdev, ringA, false);
3468c2ecf20Sopenharmony_ci
3478c2ecf20Sopenharmony_ci	r = radeon_test_create_and_emit_fence(rdev, ringA, &fence2);
3488c2ecf20Sopenharmony_ci	if (r)
3498c2ecf20Sopenharmony_ci		goto out_cleanup;
3508c2ecf20Sopenharmony_ci
3518c2ecf20Sopenharmony_ci	msleep(1000);
3528c2ecf20Sopenharmony_ci
3538c2ecf20Sopenharmony_ci	if (radeon_fence_signaled(fence1)) {
3548c2ecf20Sopenharmony_ci		DRM_ERROR("Fence 1 signaled without waiting for semaphore.\n");
3558c2ecf20Sopenharmony_ci		goto out_cleanup;
3568c2ecf20Sopenharmony_ci	}
3578c2ecf20Sopenharmony_ci
3588c2ecf20Sopenharmony_ci	r = radeon_ring_lock(rdev, ringB, 64);
3598c2ecf20Sopenharmony_ci	if (r) {
3608c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to lock ring B %p\n", ringB);
3618c2ecf20Sopenharmony_ci		goto out_cleanup;
3628c2ecf20Sopenharmony_ci	}
3638c2ecf20Sopenharmony_ci	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
3648c2ecf20Sopenharmony_ci	radeon_ring_unlock_commit(rdev, ringB, false);
3658c2ecf20Sopenharmony_ci
3668c2ecf20Sopenharmony_ci	r = radeon_fence_wait(fence1, false);
3678c2ecf20Sopenharmony_ci	if (r) {
3688c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to wait for sync fence 1\n");
3698c2ecf20Sopenharmony_ci		goto out_cleanup;
3708c2ecf20Sopenharmony_ci	}
3718c2ecf20Sopenharmony_ci
3728c2ecf20Sopenharmony_ci	msleep(1000);
3738c2ecf20Sopenharmony_ci
3748c2ecf20Sopenharmony_ci	if (radeon_fence_signaled(fence2)) {
3758c2ecf20Sopenharmony_ci		DRM_ERROR("Fence 2 signaled without waiting for semaphore.\n");
3768c2ecf20Sopenharmony_ci		goto out_cleanup;
3778c2ecf20Sopenharmony_ci	}
3788c2ecf20Sopenharmony_ci
3798c2ecf20Sopenharmony_ci	r = radeon_ring_lock(rdev, ringB, 64);
3808c2ecf20Sopenharmony_ci	if (r) {
3818c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to lock ring B %p\n", ringB);
3828c2ecf20Sopenharmony_ci		goto out_cleanup;
3838c2ecf20Sopenharmony_ci	}
3848c2ecf20Sopenharmony_ci	radeon_semaphore_emit_signal(rdev, ringB->idx, semaphore);
3858c2ecf20Sopenharmony_ci	radeon_ring_unlock_commit(rdev, ringB, false);
3868c2ecf20Sopenharmony_ci
3878c2ecf20Sopenharmony_ci	r = radeon_fence_wait(fence2, false);
3888c2ecf20Sopenharmony_ci	if (r) {
3898c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to wait for sync fence 1\n");
3908c2ecf20Sopenharmony_ci		goto out_cleanup;
3918c2ecf20Sopenharmony_ci	}
3928c2ecf20Sopenharmony_ci
3938c2ecf20Sopenharmony_ciout_cleanup:
3948c2ecf20Sopenharmony_ci	radeon_semaphore_free(rdev, &semaphore, NULL);
3958c2ecf20Sopenharmony_ci
3968c2ecf20Sopenharmony_ci	if (fence1)
3978c2ecf20Sopenharmony_ci		radeon_fence_unref(&fence1);
3988c2ecf20Sopenharmony_ci
3998c2ecf20Sopenharmony_ci	if (fence2)
4008c2ecf20Sopenharmony_ci		radeon_fence_unref(&fence2);
4018c2ecf20Sopenharmony_ci
4028c2ecf20Sopenharmony_ci	if (r)
4038c2ecf20Sopenharmony_ci		pr_warn("Error while testing ring sync (%d)\n", r);
4048c2ecf20Sopenharmony_ci}
4058c2ecf20Sopenharmony_ci
4068c2ecf20Sopenharmony_cistatic void radeon_test_ring_sync2(struct radeon_device *rdev,
4078c2ecf20Sopenharmony_ci			    struct radeon_ring *ringA,
4088c2ecf20Sopenharmony_ci			    struct radeon_ring *ringB,
4098c2ecf20Sopenharmony_ci			    struct radeon_ring *ringC)
4108c2ecf20Sopenharmony_ci{
4118c2ecf20Sopenharmony_ci	struct radeon_fence *fenceA = NULL, *fenceB = NULL;
4128c2ecf20Sopenharmony_ci	struct radeon_semaphore *semaphore = NULL;
4138c2ecf20Sopenharmony_ci	bool sigA, sigB;
4148c2ecf20Sopenharmony_ci	int i, r;
4158c2ecf20Sopenharmony_ci
4168c2ecf20Sopenharmony_ci	r = radeon_semaphore_create(rdev, &semaphore);
4178c2ecf20Sopenharmony_ci	if (r) {
4188c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to create semaphore\n");
4198c2ecf20Sopenharmony_ci		goto out_cleanup;
4208c2ecf20Sopenharmony_ci	}
4218c2ecf20Sopenharmony_ci
4228c2ecf20Sopenharmony_ci	r = radeon_ring_lock(rdev, ringA, 64);
4238c2ecf20Sopenharmony_ci	if (r) {
4248c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to lock ring A %d\n", ringA->idx);
4258c2ecf20Sopenharmony_ci		goto out_cleanup;
4268c2ecf20Sopenharmony_ci	}
4278c2ecf20Sopenharmony_ci	radeon_semaphore_emit_wait(rdev, ringA->idx, semaphore);
4288c2ecf20Sopenharmony_ci	radeon_ring_unlock_commit(rdev, ringA, false);
4298c2ecf20Sopenharmony_ci
4308c2ecf20Sopenharmony_ci	r = radeon_test_create_and_emit_fence(rdev, ringA, &fenceA);
4318c2ecf20Sopenharmony_ci	if (r)
4328c2ecf20Sopenharmony_ci		goto out_cleanup;
4338c2ecf20Sopenharmony_ci
4348c2ecf20Sopenharmony_ci	r = radeon_ring_lock(rdev, ringB, 64);
4358c2ecf20Sopenharmony_ci	if (r) {
4368c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to lock ring B %d\n", ringB->idx);
4378c2ecf20Sopenharmony_ci		goto out_cleanup;
4388c2ecf20Sopenharmony_ci	}
4398c2ecf20Sopenharmony_ci	radeon_semaphore_emit_wait(rdev, ringB->idx, semaphore);
4408c2ecf20Sopenharmony_ci	radeon_ring_unlock_commit(rdev, ringB, false);
4418c2ecf20Sopenharmony_ci	r = radeon_test_create_and_emit_fence(rdev, ringB, &fenceB);
4428c2ecf20Sopenharmony_ci	if (r)
4438c2ecf20Sopenharmony_ci		goto out_cleanup;
4448c2ecf20Sopenharmony_ci
4458c2ecf20Sopenharmony_ci	msleep(1000);
4468c2ecf20Sopenharmony_ci
4478c2ecf20Sopenharmony_ci	if (radeon_fence_signaled(fenceA)) {
4488c2ecf20Sopenharmony_ci		DRM_ERROR("Fence A signaled without waiting for semaphore.\n");
4498c2ecf20Sopenharmony_ci		goto out_cleanup;
4508c2ecf20Sopenharmony_ci	}
4518c2ecf20Sopenharmony_ci	if (radeon_fence_signaled(fenceB)) {
4528c2ecf20Sopenharmony_ci		DRM_ERROR("Fence B signaled without waiting for semaphore.\n");
4538c2ecf20Sopenharmony_ci		goto out_cleanup;
4548c2ecf20Sopenharmony_ci	}
4558c2ecf20Sopenharmony_ci
4568c2ecf20Sopenharmony_ci	r = radeon_ring_lock(rdev, ringC, 64);
4578c2ecf20Sopenharmony_ci	if (r) {
4588c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to lock ring B %p\n", ringC);
4598c2ecf20Sopenharmony_ci		goto out_cleanup;
4608c2ecf20Sopenharmony_ci	}
4618c2ecf20Sopenharmony_ci	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
4628c2ecf20Sopenharmony_ci	radeon_ring_unlock_commit(rdev, ringC, false);
4638c2ecf20Sopenharmony_ci
4648c2ecf20Sopenharmony_ci	for (i = 0; i < 30; ++i) {
4658c2ecf20Sopenharmony_ci		msleep(100);
4668c2ecf20Sopenharmony_ci		sigA = radeon_fence_signaled(fenceA);
4678c2ecf20Sopenharmony_ci		sigB = radeon_fence_signaled(fenceB);
4688c2ecf20Sopenharmony_ci		if (sigA || sigB)
4698c2ecf20Sopenharmony_ci			break;
4708c2ecf20Sopenharmony_ci	}
4718c2ecf20Sopenharmony_ci
4728c2ecf20Sopenharmony_ci	if (!sigA && !sigB) {
4738c2ecf20Sopenharmony_ci		DRM_ERROR("Neither fence A nor B has been signaled\n");
4748c2ecf20Sopenharmony_ci		goto out_cleanup;
4758c2ecf20Sopenharmony_ci	} else if (sigA && sigB) {
4768c2ecf20Sopenharmony_ci		DRM_ERROR("Both fence A and B has been signaled\n");
4778c2ecf20Sopenharmony_ci		goto out_cleanup;
4788c2ecf20Sopenharmony_ci	}
4798c2ecf20Sopenharmony_ci
4808c2ecf20Sopenharmony_ci	DRM_INFO("Fence %c was first signaled\n", sigA ? 'A' : 'B');
4818c2ecf20Sopenharmony_ci
4828c2ecf20Sopenharmony_ci	r = radeon_ring_lock(rdev, ringC, 64);
4838c2ecf20Sopenharmony_ci	if (r) {
4848c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to lock ring B %p\n", ringC);
4858c2ecf20Sopenharmony_ci		goto out_cleanup;
4868c2ecf20Sopenharmony_ci	}
4878c2ecf20Sopenharmony_ci	radeon_semaphore_emit_signal(rdev, ringC->idx, semaphore);
4888c2ecf20Sopenharmony_ci	radeon_ring_unlock_commit(rdev, ringC, false);
4898c2ecf20Sopenharmony_ci
4908c2ecf20Sopenharmony_ci	msleep(1000);
4918c2ecf20Sopenharmony_ci
4928c2ecf20Sopenharmony_ci	r = radeon_fence_wait(fenceA, false);
4938c2ecf20Sopenharmony_ci	if (r) {
4948c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to wait for sync fence A\n");
4958c2ecf20Sopenharmony_ci		goto out_cleanup;
4968c2ecf20Sopenharmony_ci	}
4978c2ecf20Sopenharmony_ci	r = radeon_fence_wait(fenceB, false);
4988c2ecf20Sopenharmony_ci	if (r) {
4998c2ecf20Sopenharmony_ci		DRM_ERROR("Failed to wait for sync fence B\n");
5008c2ecf20Sopenharmony_ci		goto out_cleanup;
5018c2ecf20Sopenharmony_ci	}
5028c2ecf20Sopenharmony_ci
5038c2ecf20Sopenharmony_ciout_cleanup:
5048c2ecf20Sopenharmony_ci	radeon_semaphore_free(rdev, &semaphore, NULL);
5058c2ecf20Sopenharmony_ci
5068c2ecf20Sopenharmony_ci	if (fenceA)
5078c2ecf20Sopenharmony_ci		radeon_fence_unref(&fenceA);
5088c2ecf20Sopenharmony_ci
5098c2ecf20Sopenharmony_ci	if (fenceB)
5108c2ecf20Sopenharmony_ci		radeon_fence_unref(&fenceB);
5118c2ecf20Sopenharmony_ci
5128c2ecf20Sopenharmony_ci	if (r)
5138c2ecf20Sopenharmony_ci		pr_warn("Error while testing ring sync (%d)\n", r);
5148c2ecf20Sopenharmony_ci}
5158c2ecf20Sopenharmony_ci
5168c2ecf20Sopenharmony_cistatic bool radeon_test_sync_possible(struct radeon_ring *ringA,
5178c2ecf20Sopenharmony_ci				      struct radeon_ring *ringB)
5188c2ecf20Sopenharmony_ci{
5198c2ecf20Sopenharmony_ci	if (ringA->idx == TN_RING_TYPE_VCE2_INDEX &&
5208c2ecf20Sopenharmony_ci	    ringB->idx == TN_RING_TYPE_VCE1_INDEX)
5218c2ecf20Sopenharmony_ci		return false;
5228c2ecf20Sopenharmony_ci
5238c2ecf20Sopenharmony_ci	return true;
5248c2ecf20Sopenharmony_ci}
5258c2ecf20Sopenharmony_ci
5268c2ecf20Sopenharmony_civoid radeon_test_syncing(struct radeon_device *rdev)
5278c2ecf20Sopenharmony_ci{
5288c2ecf20Sopenharmony_ci	int i, j, k;
5298c2ecf20Sopenharmony_ci
5308c2ecf20Sopenharmony_ci	for (i = 1; i < RADEON_NUM_RINGS; ++i) {
5318c2ecf20Sopenharmony_ci		struct radeon_ring *ringA = &rdev->ring[i];
5328c2ecf20Sopenharmony_ci		if (!ringA->ready)
5338c2ecf20Sopenharmony_ci			continue;
5348c2ecf20Sopenharmony_ci
5358c2ecf20Sopenharmony_ci		for (j = 0; j < i; ++j) {
5368c2ecf20Sopenharmony_ci			struct radeon_ring *ringB = &rdev->ring[j];
5378c2ecf20Sopenharmony_ci			if (!ringB->ready)
5388c2ecf20Sopenharmony_ci				continue;
5398c2ecf20Sopenharmony_ci
5408c2ecf20Sopenharmony_ci			if (!radeon_test_sync_possible(ringA, ringB))
5418c2ecf20Sopenharmony_ci				continue;
5428c2ecf20Sopenharmony_ci
5438c2ecf20Sopenharmony_ci			DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
5448c2ecf20Sopenharmony_ci			radeon_test_ring_sync(rdev, ringA, ringB);
5458c2ecf20Sopenharmony_ci
5468c2ecf20Sopenharmony_ci			DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
5478c2ecf20Sopenharmony_ci			radeon_test_ring_sync(rdev, ringB, ringA);
5488c2ecf20Sopenharmony_ci
5498c2ecf20Sopenharmony_ci			for (k = 0; k < j; ++k) {
5508c2ecf20Sopenharmony_ci				struct radeon_ring *ringC = &rdev->ring[k];
5518c2ecf20Sopenharmony_ci				if (!ringC->ready)
5528c2ecf20Sopenharmony_ci					continue;
5538c2ecf20Sopenharmony_ci
5548c2ecf20Sopenharmony_ci				if (!radeon_test_sync_possible(ringA, ringC))
5558c2ecf20Sopenharmony_ci					continue;
5568c2ecf20Sopenharmony_ci
5578c2ecf20Sopenharmony_ci				if (!radeon_test_sync_possible(ringB, ringC))
5588c2ecf20Sopenharmony_ci					continue;
5598c2ecf20Sopenharmony_ci
5608c2ecf20Sopenharmony_ci				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
5618c2ecf20Sopenharmony_ci				radeon_test_ring_sync2(rdev, ringA, ringB, ringC);
5628c2ecf20Sopenharmony_ci
5638c2ecf20Sopenharmony_ci				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
5648c2ecf20Sopenharmony_ci				radeon_test_ring_sync2(rdev, ringA, ringC, ringB);
5658c2ecf20Sopenharmony_ci
5668c2ecf20Sopenharmony_ci				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
5678c2ecf20Sopenharmony_ci				radeon_test_ring_sync2(rdev, ringB, ringA, ringC);
5688c2ecf20Sopenharmony_ci
5698c2ecf20Sopenharmony_ci				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
5708c2ecf20Sopenharmony_ci				radeon_test_ring_sync2(rdev, ringB, ringC, ringA);
5718c2ecf20Sopenharmony_ci
5728c2ecf20Sopenharmony_ci				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
5738c2ecf20Sopenharmony_ci				radeon_test_ring_sync2(rdev, ringC, ringA, ringB);
5748c2ecf20Sopenharmony_ci
5758c2ecf20Sopenharmony_ci				DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
5768c2ecf20Sopenharmony_ci				radeon_test_ring_sync2(rdev, ringC, ringB, ringA);
5778c2ecf20Sopenharmony_ci			}
5788c2ecf20Sopenharmony_ci		}
5798c2ecf20Sopenharmony_ci	}
5808c2ecf20Sopenharmony_ci}
581