18c2ecf20Sopenharmony_ci/*
28c2ecf20Sopenharmony_ci * Copyright 2014 Advanced Micro Devices, Inc.
38c2ecf20Sopenharmony_ci * All Rights Reserved.
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Permission is hereby granted, free of charge, to any person obtaining a
68c2ecf20Sopenharmony_ci * copy of this software and associated documentation files (the
78c2ecf20Sopenharmony_ci * "Software"), to deal in the Software without restriction, including
88c2ecf20Sopenharmony_ci * without limitation the rights to use, copy, modify, merge, publish,
98c2ecf20Sopenharmony_ci * distribute, sub license, and/or sell copies of the Software, and to
108c2ecf20Sopenharmony_ci * permit persons to whom the Software is furnished to do so, subject to
118c2ecf20Sopenharmony_ci * the following conditions:
128c2ecf20Sopenharmony_ci *
138c2ecf20Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
148c2ecf20Sopenharmony_ci * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
158c2ecf20Sopenharmony_ci * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
168c2ecf20Sopenharmony_ci * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
178c2ecf20Sopenharmony_ci * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
188c2ecf20Sopenharmony_ci * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
198c2ecf20Sopenharmony_ci * USE OR OTHER DEALINGS IN THE SOFTWARE.
208c2ecf20Sopenharmony_ci *
218c2ecf20Sopenharmony_ci * The above copyright notice and this permission notice (including the
228c2ecf20Sopenharmony_ci * next paragraph) shall be included in all copies or substantial portions
238c2ecf20Sopenharmony_ci * of the Software.
248c2ecf20Sopenharmony_ci *
258c2ecf20Sopenharmony_ci */
268c2ecf20Sopenharmony_ci/*
278c2ecf20Sopenharmony_ci * Authors:
288c2ecf20Sopenharmony_ci *    Christian König <christian.koenig@amd.com>
298c2ecf20Sopenharmony_ci */
308c2ecf20Sopenharmony_ci
318c2ecf20Sopenharmony_ci#include <linux/firmware.h>
328c2ecf20Sopenharmony_ci#include <linux/module.h>
338c2ecf20Sopenharmony_ci#include <linux/mmu_notifier.h>
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci#include <drm/drm.h>
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci#include "radeon.h"
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci/**
408c2ecf20Sopenharmony_ci * radeon_mn_invalidate - callback to notify about mm change
418c2ecf20Sopenharmony_ci *
428c2ecf20Sopenharmony_ci * @mn: our notifier
438c2ecf20Sopenharmony_ci * @range: the VMA under invalidation
448c2ecf20Sopenharmony_ci *
458c2ecf20Sopenharmony_ci * We block for all BOs between start and end to be idle and
468c2ecf20Sopenharmony_ci * unmap them by move them into system domain again.
478c2ecf20Sopenharmony_ci */
488c2ecf20Sopenharmony_cistatic bool radeon_mn_invalidate(struct mmu_interval_notifier *mn,
498c2ecf20Sopenharmony_ci				 const struct mmu_notifier_range *range,
508c2ecf20Sopenharmony_ci				 unsigned long cur_seq)
518c2ecf20Sopenharmony_ci{
528c2ecf20Sopenharmony_ci	struct radeon_bo *bo = container_of(mn, struct radeon_bo, notifier);
538c2ecf20Sopenharmony_ci	struct ttm_operation_ctx ctx = { false, false };
548c2ecf20Sopenharmony_ci	long r;
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci	if (!bo->tbo.ttm || !radeon_ttm_tt_is_bound(bo->tbo.bdev, bo->tbo.ttm))
578c2ecf20Sopenharmony_ci		return true;
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci	if (!mmu_notifier_range_blockable(range))
608c2ecf20Sopenharmony_ci		return false;
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ci	r = radeon_bo_reserve(bo, true);
638c2ecf20Sopenharmony_ci	if (r) {
648c2ecf20Sopenharmony_ci		DRM_ERROR("(%ld) failed to reserve user bo\n", r);
658c2ecf20Sopenharmony_ci		return true;
668c2ecf20Sopenharmony_ci	}
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci	r = dma_resv_wait_timeout_rcu(bo->tbo.base.resv, true, false,
698c2ecf20Sopenharmony_ci				      MAX_SCHEDULE_TIMEOUT);
708c2ecf20Sopenharmony_ci	if (r <= 0)
718c2ecf20Sopenharmony_ci		DRM_ERROR("(%ld) failed to wait for user bo\n", r);
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci	radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU);
748c2ecf20Sopenharmony_ci	r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
758c2ecf20Sopenharmony_ci	if (r)
768c2ecf20Sopenharmony_ci		DRM_ERROR("(%ld) failed to validate user bo\n", r);
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_ci	radeon_bo_unreserve(bo);
798c2ecf20Sopenharmony_ci	return true;
808c2ecf20Sopenharmony_ci}
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_cistatic const struct mmu_interval_notifier_ops radeon_mn_ops = {
838c2ecf20Sopenharmony_ci	.invalidate = radeon_mn_invalidate,
848c2ecf20Sopenharmony_ci};
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci/**
878c2ecf20Sopenharmony_ci * radeon_mn_register - register a BO for notifier updates
888c2ecf20Sopenharmony_ci *
898c2ecf20Sopenharmony_ci * @bo: radeon buffer object
908c2ecf20Sopenharmony_ci * @addr: userptr addr we should monitor
918c2ecf20Sopenharmony_ci *
928c2ecf20Sopenharmony_ci * Registers an MMU notifier for the given BO at the specified address.
938c2ecf20Sopenharmony_ci * Returns 0 on success, -ERRNO if anything goes wrong.
948c2ecf20Sopenharmony_ci */
958c2ecf20Sopenharmony_ciint radeon_mn_register(struct radeon_bo *bo, unsigned long addr)
968c2ecf20Sopenharmony_ci{
978c2ecf20Sopenharmony_ci	int ret;
988c2ecf20Sopenharmony_ci
998c2ecf20Sopenharmony_ci	ret = mmu_interval_notifier_insert(&bo->notifier, current->mm, addr,
1008c2ecf20Sopenharmony_ci					   radeon_bo_size(bo), &radeon_mn_ops);
1018c2ecf20Sopenharmony_ci	if (ret)
1028c2ecf20Sopenharmony_ci		return ret;
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ci	/*
1058c2ecf20Sopenharmony_ci	 * FIXME: radeon appears to allow get_user_pages to run during
1068c2ecf20Sopenharmony_ci	 * invalidate_range_start/end, which is not a safe way to read the
1078c2ecf20Sopenharmony_ci	 * PTEs. It should use the mmu_interval_read_begin() scheme around the
1088c2ecf20Sopenharmony_ci	 * get_user_pages to ensure that the PTEs are read properly
1098c2ecf20Sopenharmony_ci	 */
1108c2ecf20Sopenharmony_ci	mmu_interval_read_begin(&bo->notifier);
1118c2ecf20Sopenharmony_ci	return 0;
1128c2ecf20Sopenharmony_ci}
1138c2ecf20Sopenharmony_ci
1148c2ecf20Sopenharmony_ci/**
1158c2ecf20Sopenharmony_ci * radeon_mn_unregister - unregister a BO for notifier updates
1168c2ecf20Sopenharmony_ci *
1178c2ecf20Sopenharmony_ci * @bo: radeon buffer object
1188c2ecf20Sopenharmony_ci *
1198c2ecf20Sopenharmony_ci * Remove any registration of MMU notifier updates from the buffer object.
1208c2ecf20Sopenharmony_ci */
1218c2ecf20Sopenharmony_civoid radeon_mn_unregister(struct radeon_bo *bo)
1228c2ecf20Sopenharmony_ci{
1238c2ecf20Sopenharmony_ci	if (!bo->notifier.mm)
1248c2ecf20Sopenharmony_ci		return;
1258c2ecf20Sopenharmony_ci	mmu_interval_notifier_remove(&bo->notifier);
1268c2ecf20Sopenharmony_ci	bo->notifier.mm = NULL;
1278c2ecf20Sopenharmony_ci}
128