18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ciconfig OMAP2_DSS_INIT 38c2ecf20Sopenharmony_ci bool 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciconfig OMAP_DSS_BASE 68c2ecf20Sopenharmony_ci tristate 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_cimenuconfig OMAP2_DSS 98c2ecf20Sopenharmony_ci tristate "OMAP2+ Display Subsystem support" 108c2ecf20Sopenharmony_ci select OMAP_DSS_BASE 118c2ecf20Sopenharmony_ci select VIDEOMODE_HELPERS 128c2ecf20Sopenharmony_ci select OMAP2_DSS_INIT 138c2ecf20Sopenharmony_ci select HDMI 148c2ecf20Sopenharmony_ci help 158c2ecf20Sopenharmony_ci OMAP2+ Display Subsystem support. 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciif OMAP2_DSS 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ciconfig OMAP2_DSS_DEBUG 208c2ecf20Sopenharmony_ci bool "Debug support" 218c2ecf20Sopenharmony_ci default n 228c2ecf20Sopenharmony_ci help 238c2ecf20Sopenharmony_ci This enables printing of debug messages. Alternatively, debug messages 248c2ecf20Sopenharmony_ci can also be enabled by setting CONFIG_DYNAMIC_DEBUG and then setting 258c2ecf20Sopenharmony_ci appropriate flags in <debugfs>/dynamic_debug/control. 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ciconfig OMAP2_DSS_DEBUGFS 288c2ecf20Sopenharmony_ci bool "Debugfs filesystem support" 298c2ecf20Sopenharmony_ci depends on DEBUG_FS 308c2ecf20Sopenharmony_ci default n 318c2ecf20Sopenharmony_ci help 328c2ecf20Sopenharmony_ci This enables debugfs for OMAPDSS at <debugfs>/omapdss. This enables 338c2ecf20Sopenharmony_ci querying about clock configuration and register configuration of dss, 348c2ecf20Sopenharmony_ci dispc, dsi, hdmi and rfbi. 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ciconfig OMAP2_DSS_COLLECT_IRQ_STATS 378c2ecf20Sopenharmony_ci bool "Collect DSS IRQ statistics" 388c2ecf20Sopenharmony_ci depends on OMAP2_DSS_DEBUGFS 398c2ecf20Sopenharmony_ci default n 408c2ecf20Sopenharmony_ci help 418c2ecf20Sopenharmony_ci Collect DSS IRQ statistics, printable via debugfs. 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci The statistics can be found from 448c2ecf20Sopenharmony_ci <debugfs>/omapdss/dispc_irq for DISPC interrupts, and 458c2ecf20Sopenharmony_ci <debugfs>/omapdss/dsi_irq for DSI interrupts. 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ciconfig OMAP2_DSS_DPI 488c2ecf20Sopenharmony_ci bool "DPI support" 498c2ecf20Sopenharmony_ci default y 508c2ecf20Sopenharmony_ci help 518c2ecf20Sopenharmony_ci DPI Interface. This is the Parallel Display Interface. 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ciconfig OMAP2_DSS_VENC 548c2ecf20Sopenharmony_ci bool "VENC support" 558c2ecf20Sopenharmony_ci default y 568c2ecf20Sopenharmony_ci help 578c2ecf20Sopenharmony_ci OMAP Video Encoder support for S-Video and composite TV-out. 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ciconfig OMAP2_DSS_HDMI_COMMON 608c2ecf20Sopenharmony_ci bool 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ciconfig OMAP4_DSS_HDMI 638c2ecf20Sopenharmony_ci bool "HDMI support for OMAP4" 648c2ecf20Sopenharmony_ci default y 658c2ecf20Sopenharmony_ci select OMAP2_DSS_HDMI_COMMON 668c2ecf20Sopenharmony_ci help 678c2ecf20Sopenharmony_ci HDMI support for OMAP4 based SoCs. 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ciconfig OMAP4_DSS_HDMI_CEC 708c2ecf20Sopenharmony_ci bool "Enable HDMI CEC support for OMAP4" 718c2ecf20Sopenharmony_ci depends on OMAP4_DSS_HDMI 728c2ecf20Sopenharmony_ci select CEC_CORE 738c2ecf20Sopenharmony_ci default y 748c2ecf20Sopenharmony_ci help 758c2ecf20Sopenharmony_ci When selected the HDMI transmitter will support the CEC feature. 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ciconfig OMAP5_DSS_HDMI 788c2ecf20Sopenharmony_ci bool "HDMI support for OMAP5" 798c2ecf20Sopenharmony_ci default n 808c2ecf20Sopenharmony_ci select OMAP2_DSS_HDMI_COMMON 818c2ecf20Sopenharmony_ci help 828c2ecf20Sopenharmony_ci HDMI Interface for OMAP5 and similar cores. This adds the High 838c2ecf20Sopenharmony_ci Definition Multimedia Interface. See http://www.hdmi.org/ for HDMI 848c2ecf20Sopenharmony_ci specification. 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ciconfig OMAP2_DSS_SDI 878c2ecf20Sopenharmony_ci bool "SDI support" 888c2ecf20Sopenharmony_ci default n 898c2ecf20Sopenharmony_ci help 908c2ecf20Sopenharmony_ci SDI (Serial Display Interface) support. 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_ci SDI is a high speed one-way display serial bus between the host 938c2ecf20Sopenharmony_ci processor and a display. 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ciconfig OMAP2_DSS_DSI 968c2ecf20Sopenharmony_ci bool "DSI support" 978c2ecf20Sopenharmony_ci default n 988c2ecf20Sopenharmony_ci help 998c2ecf20Sopenharmony_ci MIPI DSI (Display Serial Interface) support. 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ci DSI is a high speed half-duplex serial interface between the host 1028c2ecf20Sopenharmony_ci processor and a peripheral, such as a display or a framebuffer chip. 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci See http://www.mipi.org/ for DSI specifications. 1058c2ecf20Sopenharmony_ci 1068c2ecf20Sopenharmony_ciconfig OMAP2_DSS_MIN_FCK_PER_PCK 1078c2ecf20Sopenharmony_ci int "Minimum FCK/PCK ratio (for scaling)" 1088c2ecf20Sopenharmony_ci range 0 32 1098c2ecf20Sopenharmony_ci default 0 1108c2ecf20Sopenharmony_ci help 1118c2ecf20Sopenharmony_ci This can be used to adjust the minimum FCK/PCK ratio. 1128c2ecf20Sopenharmony_ci 1138c2ecf20Sopenharmony_ci With this you can make sure that DISPC FCK is at least 1148c2ecf20Sopenharmony_ci n x PCK. Video plane scaling requires higher FCK than 1158c2ecf20Sopenharmony_ci normally. 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci If this is set to 0, there's no extra constraint on the 1188c2ecf20Sopenharmony_ci DISPC FCK. However, the FCK will at minimum be 1198c2ecf20Sopenharmony_ci 2xPCK (if active matrix) or 3xPCK (if passive matrix). 1208c2ecf20Sopenharmony_ci 1218c2ecf20Sopenharmony_ci Max FCK is 173MHz, so this doesn't work if your PCK 1228c2ecf20Sopenharmony_ci is very high. 1238c2ecf20Sopenharmony_ci 1248c2ecf20Sopenharmony_ciconfig OMAP2_DSS_SLEEP_AFTER_VENC_RESET 1258c2ecf20Sopenharmony_ci bool "Sleep 20ms after VENC reset" 1268c2ecf20Sopenharmony_ci default y 1278c2ecf20Sopenharmony_ci help 1288c2ecf20Sopenharmony_ci There is a 20ms sleep after VENC reset which seemed to fix the 1298c2ecf20Sopenharmony_ci reset. The reason for the bug is unclear, and it's also unclear 1308c2ecf20Sopenharmony_ci on what platforms this happens. 1318c2ecf20Sopenharmony_ci 1328c2ecf20Sopenharmony_ci This option enables the sleep, and is enabled by default. You can 1338c2ecf20Sopenharmony_ci disable the sleep if it doesn't cause problems on your platform. 1348c2ecf20Sopenharmony_ci 1358c2ecf20Sopenharmony_ciendif 136