1/*
2 * Copyright 2018 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22#include "base.h"
23
24#include <nvif/push507c.h>
25
26#include <nvhw/class/cl907c.h>
27
28static int
29base907c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
30{
31	struct nvif_push *push = wndw->wndw.push;
32	int ret;
33
34	if ((ret = PUSH_WAIT(push, 10)))
35		return ret;
36
37	PUSH_MTHD(push, NV907C, SET_PRESENT_CONTROL,
38		  NVVAL(NV907C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
39		  NVDEF(NV907C, SET_PRESENT_CONTROL, TIMESTAMP_MODE, DISABLE) |
40		  NVVAL(NV907C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));
41
42	PUSH_MTHD(push, NV907C, SET_CONTEXT_DMAS_ISO(0), asyw->image.handle, 1);
43
44	PUSH_MTHD(push, NV907C, SURFACE_SET_OFFSET(0, 0), asyw->image.offset[0] >> 8,
45				SURFACE_SET_OFFSET(0, 1), 0x00000000,
46
47				SURFACE_SET_SIZE(0),
48		  NVVAL(NV907C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |
49		  NVVAL(NV907C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),
50
51				SURFACE_SET_STORAGE(0),
52		  NVVAL(NV907C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
53		  NVVAL(NV907C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) |
54		  NVVAL(NV907C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |
55		  NVVAL(NV907C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
56
57				SURFACE_SET_PARAMS(0),
58		  NVVAL(NV907C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |
59		  NVDEF(NV907C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) |
60		  NVDEF(NV907C, SURFACE_SET_PARAMS, GAMMA, LINEAR) |
61		  NVDEF(NV907C, SURFACE_SET_PARAMS, LAYOUT, FRM));
62	return 0;
63}
64
65static int
66base907c_xlut_clr(struct nv50_wndw *wndw)
67{
68	struct nvif_push *push = wndw->wndw.push;
69	int ret;
70
71	if ((ret = PUSH_WAIT(push, 6)))
72		return ret;
73
74	PUSH_MTHD(push, NV907C, SET_BASE_LUT_LO,
75		  NVDEF(NV907C, SET_BASE_LUT_LO, ENABLE, DISABLE));
76
77	PUSH_MTHD(push, NV907C, SET_OUTPUT_LUT_LO,
78		  NVDEF(NV907C, SET_OUTPUT_LUT_LO, ENABLE, DISABLE));
79
80	PUSH_MTHD(push, NV907C, SET_CONTEXT_DMA_LUT, 0x00000000);
81	return 0;
82}
83
84static int
85base907c_xlut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
86{
87	struct nvif_push *push = wndw->wndw.push;
88	int ret;
89
90	if ((ret = PUSH_WAIT(push, 6)))
91		return ret;
92
93	PUSH_MTHD(push, NV907C, SET_BASE_LUT_LO,
94		  NVVAL(NV907C, SET_BASE_LUT_LO, ENABLE, asyw->xlut.i.enable) |
95		  NVVAL(NV907C, SET_BASE_LUT_LO, MODE, asyw->xlut.i.mode),
96
97				SET_BASE_LUT_HI, asyw->xlut.i.offset >> 8,
98
99				SET_OUTPUT_LUT_LO,
100		  NVDEF(NV907C, SET_OUTPUT_LUT_LO, ENABLE, USE_CORE_LUT));
101
102	PUSH_MTHD(push, NV907C, SET_CONTEXT_DMA_LUT, asyw->xlut.handle);
103	return 0;
104}
105
106static bool
107base907c_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
108{
109	if (size != 256 && size != 1024)
110		return false;
111
112	if (size == 1024)
113		asyw->xlut.i.mode = NV907C_SET_BASE_LUT_LO_MODE_INTERPOLATE_1025_UNITY_RANGE;
114	else
115		asyw->xlut.i.mode = NV907C_SET_BASE_LUT_LO_MODE_INTERPOLATE_257_UNITY_RANGE;
116
117	asyw->xlut.i.enable = NV907C_SET_BASE_LUT_LO_ENABLE_ENABLE;
118	asyw->xlut.i.load = head907d_olut_load;
119	return true;
120}
121
122static inline u32
123csc_drm_to_base(u64 in)
124{
125	/* base takes a 19-bit 2's complement value in S3.16 format */
126	bool sign = in & BIT_ULL(63);
127	u32 integer = (in >> 32) & 0x7fffffff;
128	u32 fraction = in & 0xffffffff;
129
130	if (integer >= 4) {
131		return (1 << 18) - (sign ? 0 : 1);
132	} else {
133		u32 ret = (integer << 16) | (fraction >> 16);
134		if (sign)
135			ret = -ret;
136		return ret & GENMASK(18, 0);
137	}
138}
139
140void
141base907c_csc(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
142	     const struct drm_color_ctm *ctm)
143{
144	int i, j;
145
146	for (j = 0; j < 3; j++) {
147		for (i = 0; i < 4; i++) {
148			u32 *val = &asyw->csc.matrix[j * 4 + i];
149			/* DRM does not support constant offset, while
150			 * HW CSC does. Skip it. */
151			if (i == 3) {
152				*val = 0;
153			} else {
154				*val = csc_drm_to_base(ctm->matrix[j * 3 + i]);
155			}
156		}
157	}
158}
159
160static int
161base907c_csc_clr(struct nv50_wndw *wndw)
162{
163	struct nvif_push *push = wndw->wndw.push;
164	int ret;
165
166	if ((ret = PUSH_WAIT(push, 2)))
167		return ret;
168
169	PUSH_MTHD(push, NV907C, SET_CSC_RED2RED,
170		  NVDEF(NV907C, SET_CSC_RED2RED, OWNER, CORE));
171	return 0;
172}
173
174static int
175base907c_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
176{
177	struct nvif_push *push = wndw->wndw.push;
178	int ret;
179
180	if ((ret = PUSH_WAIT(push, 13)))
181		return ret;
182
183	PUSH_MTHD(push, NV907C, SET_CSC_RED2RED,
184		  NVDEF(NV907C, SET_CSC_RED2RED, OWNER, BASE) |
185		  NVVAL(NV907C, SET_CSC_RED2RED, COEFF, asyw->csc.matrix[0]),
186
187				SET_CSC_GRN2RED, &asyw->csc.matrix[1], 11);
188	return 0;
189}
190
191const struct nv50_wndw_func
192base907c = {
193	.acquire = base507c_acquire,
194	.release = base507c_release,
195	.sema_set = base507c_sema_set,
196	.sema_clr = base507c_sema_clr,
197	.ntfy_reset = base507c_ntfy_reset,
198	.ntfy_set = base507c_ntfy_set,
199	.ntfy_clr = base507c_ntfy_clr,
200	.ntfy_wait_begun = base507c_ntfy_wait_begun,
201	.ilut = base907c_ilut,
202	.csc = base907c_csc,
203	.csc_set = base907c_csc_set,
204	.csc_clr = base907c_csc_clr,
205	.olut_core = true,
206	.ilut_size = 1024,
207	.xlut_set = base907c_xlut_set,
208	.xlut_clr = base907c_xlut_clr,
209	.image_set = base907c_image_set,
210	.image_clr = base507c_image_clr,
211	.update = base507c_update,
212};
213
214int
215base907c_new(struct nouveau_drm *drm, int head, s32 oclass,
216	     struct nv50_wndw **pwndw)
217{
218	return base507c_new_(&base907c, base507c_format, drm, head, oclass,
219			     0x00000002 << (head * 4), pwndw);
220}
221