1/* SPDX-License-Identifier: GPL-2.0 */
2/* Copyright (c) 2017 The Linux Foundation. All rights reserved. */
3
4#ifndef _A6XX_HFI_H_
5#define _A6XX_HFI_H_
6
7struct a6xx_hfi_queue_table_header {
8	u32 version;
9	u32 size;		/* Size of the queue table in dwords */
10	u32 qhdr0_offset;	/* Offset of the first queue header */
11	u32 qhdr_size;		/* Size of the queue headers */
12	u32 num_queues;		/* Number of total queues */
13	u32 active_queues;	/* Number of active queues */
14};
15
16struct a6xx_hfi_queue_header {
17	u32 status;
18	u32 iova;
19	u32 type;
20	u32 size;
21	u32 msg_size;
22	u32 dropped;
23	u32 rx_watermark;
24	u32 tx_watermark;
25	u32 rx_request;
26	u32 tx_request;
27	u32 read_index;
28	u32 write_index;
29};
30
31struct a6xx_hfi_queue {
32	struct a6xx_hfi_queue_header *header;
33	spinlock_t lock;
34	u32 *data;
35	atomic_t seqnum;
36};
37
38/* This is the outgoing queue to the GMU */
39#define HFI_COMMAND_QUEUE 0
40
41/* THis is the incoming response queue from the GMU */
42#define HFI_RESPONSE_QUEUE 1
43
44#define HFI_HEADER_ID(msg) ((msg) & 0xff)
45#define HFI_HEADER_SIZE(msg) (((msg) >> 8) & 0xff)
46#define HFI_HEADER_SEQNUM(msg) (((msg) >> 20) & 0xfff)
47
48/* FIXME: Do we need this or can we use ARRAY_SIZE? */
49#define HFI_RESPONSE_PAYLOAD_SIZE 16
50
51/* HFI message types */
52
53#define HFI_MSG_CMD 0
54#define HFI_MSG_ACK 1
55#define HFI_MSG_ACK_V1 2
56
57#define HFI_F2H_MSG_ACK 126
58
59struct a6xx_hfi_msg_response {
60	u32 header;
61	u32 ret_header;
62	u32 error;
63	u32 payload[HFI_RESPONSE_PAYLOAD_SIZE];
64};
65
66#define HFI_F2H_MSG_ERROR 100
67
68struct a6xx_hfi_msg_error {
69	u32 header;
70	u32 code;
71	u32 payload[2];
72};
73
74#define HFI_H2F_MSG_INIT 0
75
76struct a6xx_hfi_msg_gmu_init_cmd {
77	u32 header;
78	u32 seg_id;
79	u32 dbg_buffer_addr;
80	u32 dbg_buffer_size;
81	u32 boot_state;
82};
83
84#define HFI_H2F_MSG_FW_VERSION 1
85
86struct a6xx_hfi_msg_fw_version {
87	u32 header;
88	u32 supported_version;
89};
90
91#define HFI_H2F_MSG_PERF_TABLE 4
92
93struct perf_level {
94	u32 vote;
95	u32 freq;
96};
97
98struct perf_gx_level {
99	u32 vote;
100	u32 acd;
101	u32 freq;
102};
103
104struct a6xx_hfi_msg_perf_table_v1 {
105	u32 header;
106	u32 num_gpu_levels;
107	u32 num_gmu_levels;
108
109	struct perf_level gx_votes[16];
110	struct perf_level cx_votes[4];
111};
112
113struct a6xx_hfi_msg_perf_table {
114	u32 header;
115	u32 num_gpu_levels;
116	u32 num_gmu_levels;
117
118	struct perf_gx_level gx_votes[16];
119	struct perf_level cx_votes[4];
120};
121
122#define HFI_H2F_MSG_BW_TABLE 3
123
124struct a6xx_hfi_msg_bw_table {
125	u32 header;
126	u32 bw_level_num;
127	u32 cnoc_cmds_num;
128	u32 ddr_cmds_num;
129	u32 cnoc_wait_bitmask;
130	u32 ddr_wait_bitmask;
131	u32 cnoc_cmds_addrs[6];
132	u32 cnoc_cmds_data[2][6];
133	u32 ddr_cmds_addrs[8];
134	u32 ddr_cmds_data[16][8];
135};
136
137#define HFI_H2F_MSG_TEST 5
138
139struct a6xx_hfi_msg_test {
140	u32 header;
141};
142
143#define HFI_H2F_MSG_START 10
144
145struct a6xx_hfi_msg_start {
146	u32 header;
147};
148
149#define HFI_H2F_MSG_CORE_FW_START 14
150
151struct a6xx_hfi_msg_core_fw_start {
152	u32 header;
153	u32 handle;
154};
155
156#define HFI_H2F_MSG_GX_BW_PERF_VOTE 30
157
158struct a6xx_hfi_gx_bw_perf_vote_cmd {
159	u32 header;
160	u32 ack_type;
161	u32 freq;
162	u32 bw;
163};
164
165#define HFI_H2F_MSG_PREPARE_SLUMBER 33
166
167struct a6xx_hfi_prep_slumber_cmd {
168	u32 header;
169	u32 bw;
170	u32 freq;
171};
172
173#endif
174