1// SPDX-License-Identifier: GPL-2.0
2/* Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
3 *
4 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
5 */
6
7#include <linux/component.h>
8#include <linux/mfd/syscon.h>
9#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
10#include <linux/module.h>
11#include <linux/platform_device.h>
12#include <linux/regmap.h>
13
14#include <video/imx-ipu-v3.h>
15
16#include <drm/bridge/dw_hdmi.h>
17#include <drm/drm_atomic_helper.h>
18#include <drm/drm_edid.h>
19#include <drm/drm_encoder.h>
20#include <drm/drm_of.h>
21#include <drm/drm_simple_kms_helper.h>
22
23#include "imx-drm.h"
24
25struct imx_hdmi {
26	struct device *dev;
27	struct drm_encoder encoder;
28	struct dw_hdmi *hdmi;
29	struct regmap *regmap;
30};
31
32static inline struct imx_hdmi *enc_to_imx_hdmi(struct drm_encoder *e)
33{
34	return container_of(e, struct imx_hdmi, encoder);
35}
36
37static const struct dw_hdmi_mpll_config imx_mpll_cfg[] = {
38	{
39		45250000, {
40			{ 0x01e0, 0x0000 },
41			{ 0x21e1, 0x0000 },
42			{ 0x41e2, 0x0000 }
43		},
44	}, {
45		92500000, {
46			{ 0x0140, 0x0005 },
47			{ 0x2141, 0x0005 },
48			{ 0x4142, 0x0005 },
49	},
50	}, {
51		148500000, {
52			{ 0x00a0, 0x000a },
53			{ 0x20a1, 0x000a },
54			{ 0x40a2, 0x000a },
55		},
56	}, {
57		216000000, {
58			{ 0x00a0, 0x000a },
59			{ 0x2001, 0x000f },
60			{ 0x4002, 0x000f },
61		},
62	}, {
63		~0UL, {
64			{ 0x0000, 0x0000 },
65			{ 0x0000, 0x0000 },
66			{ 0x0000, 0x0000 },
67		},
68	}
69};
70
71static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
72	/*      pixelclk     bpp8    bpp10   bpp12 */
73	{
74		54000000, { 0x091c, 0x091c, 0x06dc },
75	}, {
76		58400000, { 0x091c, 0x06dc, 0x06dc },
77	}, {
78		72000000, { 0x06dc, 0x06dc, 0x091c },
79	}, {
80		74250000, { 0x06dc, 0x0b5c, 0x091c },
81	}, {
82		118800000, { 0x091c, 0x091c, 0x06dc },
83	}, {
84		216000000, { 0x06dc, 0x0b5c, 0x091c },
85	}, {
86		~0UL, { 0x0000, 0x0000, 0x0000 },
87	},
88};
89
90/*
91 * Resistance term 133Ohm Cfg
92 * PREEMP config 0.00
93 * TX/CK level 10
94 */
95static const struct dw_hdmi_phy_config imx_phy_config[] = {
96	/*pixelclk   symbol   term   vlev */
97	{ 216000000, 0x800d, 0x0005, 0x01ad},
98	{ ~0UL,      0x0000, 0x0000, 0x0000}
99};
100
101static int dw_hdmi_imx_parse_dt(struct imx_hdmi *hdmi)
102{
103	struct device_node *np = hdmi->dev->of_node;
104
105	hdmi->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
106	if (IS_ERR(hdmi->regmap)) {
107		dev_err(hdmi->dev, "Unable to get gpr\n");
108		return PTR_ERR(hdmi->regmap);
109	}
110
111	return 0;
112}
113
114static void dw_hdmi_imx_encoder_enable(struct drm_encoder *encoder)
115{
116	struct imx_hdmi *hdmi = enc_to_imx_hdmi(encoder);
117	int mux = drm_of_encoder_active_port_id(hdmi->dev->of_node, encoder);
118
119	regmap_update_bits(hdmi->regmap, IOMUXC_GPR3,
120			   IMX6Q_GPR3_HDMI_MUX_CTL_MASK,
121			   mux << IMX6Q_GPR3_HDMI_MUX_CTL_SHIFT);
122}
123
124static int dw_hdmi_imx_atomic_check(struct drm_encoder *encoder,
125				    struct drm_crtc_state *crtc_state,
126				    struct drm_connector_state *conn_state)
127{
128	struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
129
130	imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
131	imx_crtc_state->di_hsync_pin = 2;
132	imx_crtc_state->di_vsync_pin = 3;
133
134	return 0;
135}
136
137static const struct drm_encoder_helper_funcs dw_hdmi_imx_encoder_helper_funcs = {
138	.enable     = dw_hdmi_imx_encoder_enable,
139	.atomic_check = dw_hdmi_imx_atomic_check,
140};
141
142static enum drm_mode_status
143imx6q_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
144		      const struct drm_display_info *info,
145		      const struct drm_display_mode *mode)
146{
147	if (mode->clock < 13500)
148		return MODE_CLOCK_LOW;
149	/* FIXME: Hardware is capable of 266MHz, but setup data is missing. */
150	if (mode->clock > 216000)
151		return MODE_CLOCK_HIGH;
152
153	return MODE_OK;
154}
155
156static enum drm_mode_status
157imx6dl_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data,
158		       const struct drm_display_info *info,
159		       const struct drm_display_mode *mode)
160{
161	if (mode->clock < 13500)
162		return MODE_CLOCK_LOW;
163	/* FIXME: Hardware is capable of 270MHz, but setup data is missing. */
164	if (mode->clock > 216000)
165		return MODE_CLOCK_HIGH;
166
167	return MODE_OK;
168}
169
170static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
171	.mpll_cfg   = imx_mpll_cfg,
172	.cur_ctr    = imx_cur_ctr,
173	.phy_config = imx_phy_config,
174	.mode_valid = imx6q_hdmi_mode_valid,
175};
176
177static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
178	.mpll_cfg = imx_mpll_cfg,
179	.cur_ctr  = imx_cur_ctr,
180	.phy_config = imx_phy_config,
181	.mode_valid = imx6dl_hdmi_mode_valid,
182};
183
184static const struct of_device_id dw_hdmi_imx_dt_ids[] = {
185	{ .compatible = "fsl,imx6q-hdmi",
186	  .data = &imx6q_hdmi_drv_data
187	}, {
188	  .compatible = "fsl,imx6dl-hdmi",
189	  .data = &imx6dl_hdmi_drv_data
190	},
191	{},
192};
193MODULE_DEVICE_TABLE(of, dw_hdmi_imx_dt_ids);
194
195static int dw_hdmi_imx_bind(struct device *dev, struct device *master,
196			    void *data)
197{
198	struct platform_device *pdev = to_platform_device(dev);
199	const struct dw_hdmi_plat_data *plat_data;
200	const struct of_device_id *match;
201	struct drm_device *drm = data;
202	struct drm_encoder *encoder;
203	struct imx_hdmi *hdmi;
204	int ret;
205
206	if (!pdev->dev.of_node)
207		return -ENODEV;
208
209	hdmi = dev_get_drvdata(dev);
210	memset(hdmi, 0, sizeof(*hdmi));
211
212	match = of_match_node(dw_hdmi_imx_dt_ids, pdev->dev.of_node);
213	plat_data = match->data;
214	hdmi->dev = &pdev->dev;
215	encoder = &hdmi->encoder;
216
217	ret = imx_drm_encoder_parse_of(drm, encoder, dev->of_node);
218	if (ret)
219		return ret;
220
221	ret = dw_hdmi_imx_parse_dt(hdmi);
222	if (ret < 0)
223		return ret;
224
225	drm_encoder_helper_add(encoder, &dw_hdmi_imx_encoder_helper_funcs);
226	drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
227
228	hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data);
229
230	/*
231	 * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
232	 * which would have called the encoder cleanup.  Do it manually.
233	 */
234	if (IS_ERR(hdmi->hdmi)) {
235		ret = PTR_ERR(hdmi->hdmi);
236		drm_encoder_cleanup(encoder);
237	}
238
239	return ret;
240}
241
242static void dw_hdmi_imx_unbind(struct device *dev, struct device *master,
243			       void *data)
244{
245	struct imx_hdmi *hdmi = dev_get_drvdata(dev);
246
247	dw_hdmi_unbind(hdmi->hdmi);
248}
249
250static const struct component_ops dw_hdmi_imx_ops = {
251	.bind	= dw_hdmi_imx_bind,
252	.unbind	= dw_hdmi_imx_unbind,
253};
254
255static int dw_hdmi_imx_probe(struct platform_device *pdev)
256{
257	struct imx_hdmi *hdmi;
258
259	hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
260	if (!hdmi)
261		return -ENOMEM;
262
263	platform_set_drvdata(pdev, hdmi);
264
265	return component_add(&pdev->dev, &dw_hdmi_imx_ops);
266}
267
268static int dw_hdmi_imx_remove(struct platform_device *pdev)
269{
270	component_del(&pdev->dev, &dw_hdmi_imx_ops);
271
272	return 0;
273}
274
275static struct platform_driver dw_hdmi_imx_platform_driver = {
276	.probe  = dw_hdmi_imx_probe,
277	.remove = dw_hdmi_imx_remove,
278	.driver = {
279		.name = "dwhdmi-imx",
280		.of_match_table = dw_hdmi_imx_dt_ids,
281	},
282};
283
284module_platform_driver(dw_hdmi_imx_platform_driver);
285
286MODULE_AUTHOR("Andy Yan <andy.yan@rock-chips.com>");
287MODULE_AUTHOR("Yakir Yang <ykk@rock-chips.com>");
288MODULE_DESCRIPTION("IMX6 Specific DW-HDMI Driver Extension");
289MODULE_LICENSE("GPL");
290MODULE_ALIAS("platform:dwhdmi-imx");
291