1/* 2 * Copyright © 2006-2010 Intel Corporation 3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: 25 * Eric Anholt <eric@anholt.net> 26 * Dave Airlie <airlied@linux.ie> 27 * Jesse Barnes <jesse.barnes@intel.com> 28 * Chris Wilson <chris@chris-wilson.co.uk> 29 */ 30 31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 32 33#include <linux/kernel.h> 34#include <linux/moduleparam.h> 35#include <linux/pwm.h> 36 37#include "intel_connector.h" 38#include "intel_display_types.h" 39#include "intel_dp_aux_backlight.h" 40#include "intel_dsi_dcs_backlight.h" 41#include "intel_panel.h" 42 43void 44intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode, 45 struct drm_display_mode *adjusted_mode) 46{ 47 drm_mode_copy(adjusted_mode, fixed_mode); 48 49 drm_mode_set_crtcinfo(adjusted_mode, 0); 50} 51 52static bool is_downclock_mode(const struct drm_display_mode *downclock_mode, 53 const struct drm_display_mode *fixed_mode) 54{ 55 return drm_mode_match(downclock_mode, fixed_mode, 56 DRM_MODE_MATCH_TIMINGS | 57 DRM_MODE_MATCH_FLAGS | 58 DRM_MODE_MATCH_3D_FLAGS) && 59 downclock_mode->clock < fixed_mode->clock; 60} 61 62struct drm_display_mode * 63intel_panel_edid_downclock_mode(struct intel_connector *connector, 64 const struct drm_display_mode *fixed_mode) 65{ 66 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 67 const struct drm_display_mode *scan, *best_mode = NULL; 68 struct drm_display_mode *downclock_mode; 69 int best_clock = fixed_mode->clock; 70 71 list_for_each_entry(scan, &connector->base.probed_modes, head) { 72 /* 73 * If one mode has the same resolution with the fixed_panel 74 * mode while they have the different refresh rate, it means 75 * that the reduced downclock is found. In such 76 * case we can set the different FPx0/1 to dynamically select 77 * between low and high frequency. 78 */ 79 if (is_downclock_mode(scan, fixed_mode) && 80 scan->clock < best_clock) { 81 /* 82 * The downclock is already found. But we 83 * expect to find the lower downclock. 84 */ 85 best_clock = scan->clock; 86 best_mode = scan; 87 } 88 } 89 90 if (!best_mode) 91 return NULL; 92 93 downclock_mode = drm_mode_duplicate(&dev_priv->drm, best_mode); 94 if (!downclock_mode) 95 return NULL; 96 97 drm_dbg_kms(&dev_priv->drm, 98 "[CONNECTOR:%d:%s] using downclock mode from EDID: ", 99 connector->base.base.id, connector->base.name); 100 drm_mode_debug_printmodeline(downclock_mode); 101 102 return downclock_mode; 103} 104 105struct drm_display_mode * 106intel_panel_edid_fixed_mode(struct intel_connector *connector) 107{ 108 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 109 const struct drm_display_mode *scan; 110 struct drm_display_mode *fixed_mode; 111 112 if (list_empty(&connector->base.probed_modes)) 113 return NULL; 114 115 /* prefer fixed mode from EDID if available */ 116 list_for_each_entry(scan, &connector->base.probed_modes, head) { 117 if ((scan->type & DRM_MODE_TYPE_PREFERRED) == 0) 118 continue; 119 120 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 121 if (!fixed_mode) 122 return NULL; 123 124 drm_dbg_kms(&dev_priv->drm, 125 "[CONNECTOR:%d:%s] using preferred mode from EDID: ", 126 connector->base.base.id, connector->base.name); 127 drm_mode_debug_printmodeline(fixed_mode); 128 129 return fixed_mode; 130 } 131 132 scan = list_first_entry(&connector->base.probed_modes, 133 typeof(*scan), head); 134 135 fixed_mode = drm_mode_duplicate(&dev_priv->drm, scan); 136 if (!fixed_mode) 137 return NULL; 138 139 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 140 141 drm_dbg_kms(&dev_priv->drm, 142 "[CONNECTOR:%d:%s] using first mode from EDID: ", 143 connector->base.base.id, connector->base.name); 144 drm_mode_debug_printmodeline(fixed_mode); 145 146 return fixed_mode; 147} 148 149struct drm_display_mode * 150intel_panel_vbt_fixed_mode(struct intel_connector *connector) 151{ 152 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 153 struct drm_display_info *info = &connector->base.display_info; 154 struct drm_display_mode *fixed_mode; 155 156 if (!dev_priv->vbt.lfp_lvds_vbt_mode) 157 return NULL; 158 159 fixed_mode = drm_mode_duplicate(&dev_priv->drm, 160 dev_priv->vbt.lfp_lvds_vbt_mode); 161 if (!fixed_mode) 162 return NULL; 163 164 fixed_mode->type |= DRM_MODE_TYPE_PREFERRED; 165 166 drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s] using mode from VBT: ", 167 connector->base.base.id, connector->base.name); 168 drm_mode_debug_printmodeline(fixed_mode); 169 170 info->width_mm = fixed_mode->width_mm; 171 info->height_mm = fixed_mode->height_mm; 172 173 return fixed_mode; 174} 175 176/* adjusted_mode has been preset to be the panel's fixed mode */ 177int intel_pch_panel_fitting(struct intel_crtc_state *crtc_state, 178 const struct drm_connector_state *conn_state) 179{ 180 const struct drm_display_mode *adjusted_mode = 181 &crtc_state->hw.adjusted_mode; 182 int x, y, width, height; 183 184 /* Native modes don't need fitting */ 185 if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w && 186 adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h && 187 crtc_state->output_format != INTEL_OUTPUT_FORMAT_YCBCR420) 188 return 0; 189 190 switch (conn_state->scaling_mode) { 191 case DRM_MODE_SCALE_CENTER: 192 width = crtc_state->pipe_src_w; 193 height = crtc_state->pipe_src_h; 194 x = (adjusted_mode->crtc_hdisplay - width + 1)/2; 195 y = (adjusted_mode->crtc_vdisplay - height + 1)/2; 196 break; 197 198 case DRM_MODE_SCALE_ASPECT: 199 /* Scale but preserve the aspect ratio */ 200 { 201 u32 scaled_width = adjusted_mode->crtc_hdisplay 202 * crtc_state->pipe_src_h; 203 u32 scaled_height = crtc_state->pipe_src_w 204 * adjusted_mode->crtc_vdisplay; 205 if (scaled_width > scaled_height) { /* pillar */ 206 width = scaled_height / crtc_state->pipe_src_h; 207 if (width & 1) 208 width++; 209 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 210 y = 0; 211 height = adjusted_mode->crtc_vdisplay; 212 } else if (scaled_width < scaled_height) { /* letter */ 213 height = scaled_width / crtc_state->pipe_src_w; 214 if (height & 1) 215 height++; 216 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 217 x = 0; 218 width = adjusted_mode->crtc_hdisplay; 219 } else { 220 x = y = 0; 221 width = adjusted_mode->crtc_hdisplay; 222 height = adjusted_mode->crtc_vdisplay; 223 } 224 } 225 break; 226 227 case DRM_MODE_SCALE_NONE: 228 WARN_ON(adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w); 229 WARN_ON(adjusted_mode->crtc_vdisplay != crtc_state->pipe_src_h); 230 fallthrough; 231 case DRM_MODE_SCALE_FULLSCREEN: 232 x = y = 0; 233 width = adjusted_mode->crtc_hdisplay; 234 height = adjusted_mode->crtc_vdisplay; 235 break; 236 237 default: 238 MISSING_CASE(conn_state->scaling_mode); 239 return -EINVAL; 240 } 241 242 drm_rect_init(&crtc_state->pch_pfit.dst, 243 x, y, width, height); 244 crtc_state->pch_pfit.enabled = true; 245 246 return 0; 247} 248 249static void 250centre_horizontally(struct drm_display_mode *adjusted_mode, 251 int width) 252{ 253 u32 border, sync_pos, blank_width, sync_width; 254 255 /* keep the hsync and hblank widths constant */ 256 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; 257 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start; 258 sync_pos = (blank_width - sync_width + 1) / 2; 259 260 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2; 261 border += border & 1; /* make the border even */ 262 263 adjusted_mode->crtc_hdisplay = width; 264 adjusted_mode->crtc_hblank_start = width + border; 265 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width; 266 267 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos; 268 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width; 269} 270 271static void 272centre_vertically(struct drm_display_mode *adjusted_mode, 273 int height) 274{ 275 u32 border, sync_pos, blank_width, sync_width; 276 277 /* keep the vsync and vblank widths constant */ 278 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; 279 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start; 280 sync_pos = (blank_width - sync_width + 1) / 2; 281 282 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2; 283 284 adjusted_mode->crtc_vdisplay = height; 285 adjusted_mode->crtc_vblank_start = height + border; 286 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width; 287 288 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos; 289 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width; 290} 291 292static u32 panel_fitter_scaling(u32 source, u32 target) 293{ 294 /* 295 * Floating point operation is not supported. So the FACTOR 296 * is defined, which can avoid the floating point computation 297 * when calculating the panel ratio. 298 */ 299#define ACCURACY 12 300#define FACTOR (1 << ACCURACY) 301 u32 ratio = source * FACTOR / target; 302 return (FACTOR * ratio + FACTOR/2) / FACTOR; 303} 304 305static void i965_scale_aspect(struct intel_crtc_state *crtc_state, 306 u32 *pfit_control) 307{ 308 const struct drm_display_mode *adjusted_mode = 309 &crtc_state->hw.adjusted_mode; 310 u32 scaled_width = adjusted_mode->crtc_hdisplay * 311 crtc_state->pipe_src_h; 312 u32 scaled_height = crtc_state->pipe_src_w * 313 adjusted_mode->crtc_vdisplay; 314 315 /* 965+ is easy, it does everything in hw */ 316 if (scaled_width > scaled_height) 317 *pfit_control |= PFIT_ENABLE | 318 PFIT_SCALING_PILLAR; 319 else if (scaled_width < scaled_height) 320 *pfit_control |= PFIT_ENABLE | 321 PFIT_SCALING_LETTER; 322 else if (adjusted_mode->crtc_hdisplay != crtc_state->pipe_src_w) 323 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO; 324} 325 326static void i9xx_scale_aspect(struct intel_crtc_state *crtc_state, 327 u32 *pfit_control, u32 *pfit_pgm_ratios, 328 u32 *border) 329{ 330 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 331 u32 scaled_width = adjusted_mode->crtc_hdisplay * 332 crtc_state->pipe_src_h; 333 u32 scaled_height = crtc_state->pipe_src_w * 334 adjusted_mode->crtc_vdisplay; 335 u32 bits; 336 337 /* 338 * For earlier chips we have to calculate the scaling 339 * ratio by hand and program it into the 340 * PFIT_PGM_RATIO register 341 */ 342 if (scaled_width > scaled_height) { /* pillar */ 343 centre_horizontally(adjusted_mode, 344 scaled_height / 345 crtc_state->pipe_src_h); 346 347 *border = LVDS_BORDER_ENABLE; 348 if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay) { 349 bits = panel_fitter_scaling(crtc_state->pipe_src_h, 350 adjusted_mode->crtc_vdisplay); 351 352 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 353 bits << PFIT_VERT_SCALE_SHIFT); 354 *pfit_control |= (PFIT_ENABLE | 355 VERT_INTERP_BILINEAR | 356 HORIZ_INTERP_BILINEAR); 357 } 358 } else if (scaled_width < scaled_height) { /* letter */ 359 centre_vertically(adjusted_mode, 360 scaled_width / 361 crtc_state->pipe_src_w); 362 363 *border = LVDS_BORDER_ENABLE; 364 if (crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) { 365 bits = panel_fitter_scaling(crtc_state->pipe_src_w, 366 adjusted_mode->crtc_hdisplay); 367 368 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT | 369 bits << PFIT_VERT_SCALE_SHIFT); 370 *pfit_control |= (PFIT_ENABLE | 371 VERT_INTERP_BILINEAR | 372 HORIZ_INTERP_BILINEAR); 373 } 374 } else { 375 /* Aspects match, Let hw scale both directions */ 376 *pfit_control |= (PFIT_ENABLE | 377 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | 378 VERT_INTERP_BILINEAR | 379 HORIZ_INTERP_BILINEAR); 380 } 381} 382 383int intel_gmch_panel_fitting(struct intel_crtc_state *crtc_state, 384 const struct drm_connector_state *conn_state) 385{ 386 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); 387 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); 388 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0; 389 struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; 390 391 /* Native modes don't need fitting */ 392 if (adjusted_mode->crtc_hdisplay == crtc_state->pipe_src_w && 393 adjusted_mode->crtc_vdisplay == crtc_state->pipe_src_h) 394 goto out; 395 396 switch (conn_state->scaling_mode) { 397 case DRM_MODE_SCALE_CENTER: 398 /* 399 * For centered modes, we have to calculate border widths & 400 * heights and modify the values programmed into the CRTC. 401 */ 402 centre_horizontally(adjusted_mode, crtc_state->pipe_src_w); 403 centre_vertically(adjusted_mode, crtc_state->pipe_src_h); 404 border = LVDS_BORDER_ENABLE; 405 break; 406 case DRM_MODE_SCALE_ASPECT: 407 /* Scale but preserve the aspect ratio */ 408 if (INTEL_GEN(dev_priv) >= 4) 409 i965_scale_aspect(crtc_state, &pfit_control); 410 else 411 i9xx_scale_aspect(crtc_state, &pfit_control, 412 &pfit_pgm_ratios, &border); 413 break; 414 case DRM_MODE_SCALE_FULLSCREEN: 415 /* 416 * Full scaling, even if it changes the aspect ratio. 417 * Fortunately this is all done for us in hw. 418 */ 419 if (crtc_state->pipe_src_h != adjusted_mode->crtc_vdisplay || 420 crtc_state->pipe_src_w != adjusted_mode->crtc_hdisplay) { 421 pfit_control |= PFIT_ENABLE; 422 if (INTEL_GEN(dev_priv) >= 4) 423 pfit_control |= PFIT_SCALING_AUTO; 424 else 425 pfit_control |= (VERT_AUTO_SCALE | 426 VERT_INTERP_BILINEAR | 427 HORIZ_AUTO_SCALE | 428 HORIZ_INTERP_BILINEAR); 429 } 430 break; 431 default: 432 MISSING_CASE(conn_state->scaling_mode); 433 return -EINVAL; 434 } 435 436 /* 965+ wants fuzzy fitting */ 437 /* FIXME: handle multiple panels by failing gracefully */ 438 if (INTEL_GEN(dev_priv) >= 4) 439 pfit_control |= PFIT_PIPE(crtc->pipe) | PFIT_FILTER_FUZZY; 440 441out: 442 if ((pfit_control & PFIT_ENABLE) == 0) { 443 pfit_control = 0; 444 pfit_pgm_ratios = 0; 445 } 446 447 /* Make sure pre-965 set dither correctly for 18bpp panels. */ 448 if (INTEL_GEN(dev_priv) < 4 && crtc_state->pipe_bpp == 18) 449 pfit_control |= PANEL_8TO6_DITHER_ENABLE; 450 451 crtc_state->gmch_pfit.control = pfit_control; 452 crtc_state->gmch_pfit.pgm_ratios = pfit_pgm_ratios; 453 crtc_state->gmch_pfit.lvds_border_bits = border; 454 455 return 0; 456} 457 458/** 459 * scale - scale values from one range to another 460 * @source_val: value in range [@source_min..@source_max] 461 * @source_min: minimum legal value for @source_val 462 * @source_max: maximum legal value for @source_val 463 * @target_min: corresponding target value for @source_min 464 * @target_max: corresponding target value for @source_max 465 * 466 * Return @source_val in range [@source_min..@source_max] scaled to range 467 * [@target_min..@target_max]. 468 */ 469static u32 scale(u32 source_val, 470 u32 source_min, u32 source_max, 471 u32 target_min, u32 target_max) 472{ 473 u64 target_val; 474 475 WARN_ON(source_min > source_max); 476 WARN_ON(target_min > target_max); 477 478 /* defensive */ 479 source_val = clamp(source_val, source_min, source_max); 480 481 /* avoid overflows */ 482 target_val = mul_u32_u32(source_val - source_min, 483 target_max - target_min); 484 target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min); 485 target_val += target_min; 486 487 return target_val; 488} 489 490/* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result 491 * to [hw_min..hw_max]. */ 492static u32 clamp_user_to_hw(struct intel_connector *connector, 493 u32 user_level, u32 user_max) 494{ 495 struct intel_panel *panel = &connector->panel; 496 u32 hw_level; 497 498 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max); 499 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max); 500 501 return hw_level; 502} 503 504/* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */ 505static u32 scale_hw_to_user(struct intel_connector *connector, 506 u32 hw_level, u32 user_max) 507{ 508 struct intel_panel *panel = &connector->panel; 509 510 return scale(hw_level, panel->backlight.min, panel->backlight.max, 511 0, user_max); 512} 513 514static u32 intel_panel_compute_brightness(struct intel_connector *connector, 515 u32 val) 516{ 517 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 518 struct intel_panel *panel = &connector->panel; 519 520 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 521 522 if (dev_priv->params.invert_brightness < 0) 523 return val; 524 525 if (dev_priv->params.invert_brightness > 0 || 526 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { 527 return panel->backlight.max - val + panel->backlight.min; 528 } 529 530 return val; 531} 532 533static u32 lpt_get_backlight(struct intel_connector *connector) 534{ 535 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 536 537 return intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK; 538} 539 540static u32 pch_get_backlight(struct intel_connector *connector) 541{ 542 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 543 544 return intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 545} 546 547static u32 i9xx_get_backlight(struct intel_connector *connector) 548{ 549 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 550 struct intel_panel *panel = &connector->panel; 551 u32 val; 552 553 val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; 554 if (INTEL_GEN(dev_priv) < 4) 555 val >>= 1; 556 557 if (panel->backlight.combination_mode) { 558 u8 lbpc; 559 560 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc); 561 val *= lbpc; 562 } 563 564 return val; 565} 566 567static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe) 568{ 569 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) 570 return 0; 571 572 return intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK; 573} 574 575static u32 vlv_get_backlight(struct intel_connector *connector) 576{ 577 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 578 enum pipe pipe = intel_connector_get_pipe(connector); 579 580 return _vlv_get_backlight(dev_priv, pipe); 581} 582 583static u32 bxt_get_backlight(struct intel_connector *connector) 584{ 585 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 586 struct intel_panel *panel = &connector->panel; 587 588 return intel_de_read(dev_priv, 589 BXT_BLC_PWM_DUTY(panel->backlight.controller)); 590} 591 592static u32 pwm_get_backlight(struct intel_connector *connector) 593{ 594 struct intel_panel *panel = &connector->panel; 595 struct pwm_state state; 596 597 pwm_get_state(panel->backlight.pwm, &state); 598 return pwm_get_relative_duty_cycle(&state, 100); 599} 600 601static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 602{ 603 struct intel_connector *connector = to_intel_connector(conn_state->connector); 604 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 605 606 u32 val = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK; 607 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, val | level); 608} 609 610static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level) 611{ 612 struct intel_connector *connector = to_intel_connector(conn_state->connector); 613 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 614 u32 tmp; 615 616 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; 617 intel_de_write(dev_priv, BLC_PWM_CPU_CTL, tmp | level); 618} 619 620static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level) 621{ 622 struct intel_connector *connector = to_intel_connector(conn_state->connector); 623 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 624 struct intel_panel *panel = &connector->panel; 625 u32 tmp, mask; 626 627 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 628 629 if (panel->backlight.combination_mode) { 630 u8 lbpc; 631 632 lbpc = level * 0xfe / panel->backlight.max + 1; 633 level /= lbpc; 634 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc); 635 } 636 637 if (IS_GEN(dev_priv, 4)) { 638 mask = BACKLIGHT_DUTY_CYCLE_MASK; 639 } else { 640 level <<= 1; 641 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV; 642 } 643 644 tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask; 645 intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level); 646} 647 648static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level) 649{ 650 struct intel_connector *connector = to_intel_connector(conn_state->connector); 651 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 652 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 653 u32 tmp; 654 655 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK; 656 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), tmp | level); 657} 658 659static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level) 660{ 661 struct intel_connector *connector = to_intel_connector(conn_state->connector); 662 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 663 struct intel_panel *panel = &connector->panel; 664 665 intel_de_write(dev_priv, 666 BXT_BLC_PWM_DUTY(panel->backlight.controller), level); 667} 668 669static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level) 670{ 671 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel; 672 673 pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); 674 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 675} 676 677static void 678intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level) 679{ 680 struct intel_connector *connector = to_intel_connector(conn_state->connector); 681 struct drm_i915_private *i915 = to_i915(connector->base.dev); 682 struct intel_panel *panel = &connector->panel; 683 684 drm_dbg_kms(&i915->drm, "set backlight PWM = %d\n", level); 685 686 level = intel_panel_compute_brightness(connector, level); 687 panel->backlight.set(conn_state, level); 688} 689 690/* set backlight brightness to level in range [0..max], assuming hw min is 691 * respected. 692 */ 693void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state, 694 u32 user_level, u32 user_max) 695{ 696 struct intel_connector *connector = to_intel_connector(conn_state->connector); 697 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 698 struct intel_panel *panel = &connector->panel; 699 u32 hw_level; 700 701 /* 702 * Lack of crtc may occur during driver init because 703 * connection_mutex isn't held across the entire backlight 704 * setup + modeset readout, and the BIOS can issue the 705 * requests at any time. 706 */ 707 if (!panel->backlight.present || !conn_state->crtc) 708 return; 709 710 mutex_lock(&dev_priv->backlight_lock); 711 712 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 713 714 hw_level = clamp_user_to_hw(connector, user_level, user_max); 715 panel->backlight.level = hw_level; 716 717 if (panel->backlight.device) 718 panel->backlight.device->props.brightness = 719 scale_hw_to_user(connector, 720 panel->backlight.level, 721 panel->backlight.device->props.max_brightness); 722 723 if (panel->backlight.enabled) 724 intel_panel_actually_set_backlight(conn_state, hw_level); 725 726 mutex_unlock(&dev_priv->backlight_lock); 727} 728 729static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state) 730{ 731 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 732 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 733 u32 tmp; 734 735 intel_panel_actually_set_backlight(old_conn_state, 0); 736 737 /* 738 * Although we don't support or enable CPU PWM with LPT/SPT based 739 * systems, it may have been enabled prior to loading the 740 * driver. Disable to avoid warnings on LCPLL disable. 741 * 742 * This needs rework if we need to add support for CPU PWM on PCH split 743 * platforms. 744 */ 745 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 746 if (tmp & BLM_PWM_ENABLE) { 747 drm_dbg_kms(&dev_priv->drm, 748 "cpu backlight was enabled, disabling\n"); 749 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, 750 tmp & ~BLM_PWM_ENABLE); 751 } 752 753 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 754 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 755} 756 757static void pch_disable_backlight(const struct drm_connector_state *old_conn_state) 758{ 759 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 760 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 761 u32 tmp; 762 763 intel_panel_actually_set_backlight(old_conn_state, 0); 764 765 tmp = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 766 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE); 767 768 tmp = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 769 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE); 770} 771 772static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state) 773{ 774 intel_panel_actually_set_backlight(old_conn_state, 0); 775} 776 777static void i965_disable_backlight(const struct drm_connector_state *old_conn_state) 778{ 779 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev); 780 u32 tmp; 781 782 intel_panel_actually_set_backlight(old_conn_state, 0); 783 784 tmp = intel_de_read(dev_priv, BLC_PWM_CTL2); 785 intel_de_write(dev_priv, BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE); 786} 787 788static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state) 789{ 790 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 791 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 792 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe; 793 u32 tmp; 794 795 intel_panel_actually_set_backlight(old_conn_state, 0); 796 797 tmp = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 798 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), 799 tmp & ~BLM_PWM_ENABLE); 800} 801 802static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state) 803{ 804 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 805 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 806 struct intel_panel *panel = &connector->panel; 807 u32 tmp, val; 808 809 intel_panel_actually_set_backlight(old_conn_state, 0); 810 811 tmp = intel_de_read(dev_priv, 812 BXT_BLC_PWM_CTL(panel->backlight.controller)); 813 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 814 tmp & ~BXT_BLC_PWM_ENABLE); 815 816 if (panel->backlight.controller == 1) { 817 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 818 val &= ~UTIL_PIN_ENABLE; 819 intel_de_write(dev_priv, UTIL_PIN_CTL, val); 820 } 821} 822 823static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state) 824{ 825 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 826 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 827 struct intel_panel *panel = &connector->panel; 828 u32 tmp; 829 830 intel_panel_actually_set_backlight(old_conn_state, 0); 831 832 tmp = intel_de_read(dev_priv, 833 BXT_BLC_PWM_CTL(panel->backlight.controller)); 834 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 835 tmp & ~BXT_BLC_PWM_ENABLE); 836} 837 838static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state) 839{ 840 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 841 struct intel_panel *panel = &connector->panel; 842 843 panel->backlight.pwm_state.enabled = false; 844 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 845} 846 847void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state) 848{ 849 struct intel_connector *connector = to_intel_connector(old_conn_state->connector); 850 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 851 struct intel_panel *panel = &connector->panel; 852 853 if (!panel->backlight.present) 854 return; 855 856 /* 857 * Do not disable backlight on the vga_switcheroo path. When switching 858 * away from i915, the other client may depend on i915 to handle the 859 * backlight. This will leave the backlight on unnecessarily when 860 * another client is not activated. 861 */ 862 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) { 863 drm_dbg_kms(&dev_priv->drm, 864 "Skipping backlight disable on vga switch\n"); 865 return; 866 } 867 868 mutex_lock(&dev_priv->backlight_lock); 869 870 if (panel->backlight.device) 871 panel->backlight.device->props.power = FB_BLANK_POWERDOWN; 872 panel->backlight.enabled = false; 873 panel->backlight.disable(old_conn_state); 874 875 mutex_unlock(&dev_priv->backlight_lock); 876} 877 878static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state, 879 const struct drm_connector_state *conn_state) 880{ 881 struct intel_connector *connector = to_intel_connector(conn_state->connector); 882 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 883 struct intel_panel *panel = &connector->panel; 884 u32 pch_ctl1, pch_ctl2, schicken; 885 886 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 887 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 888 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); 889 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 890 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 891 } 892 893 if (HAS_PCH_LPT(dev_priv)) { 894 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN2); 895 if (panel->backlight.alternate_pwm_increment) 896 schicken |= LPT_PWM_GRANULARITY; 897 else 898 schicken &= ~LPT_PWM_GRANULARITY; 899 intel_de_write(dev_priv, SOUTH_CHICKEN2, schicken); 900 } else { 901 schicken = intel_de_read(dev_priv, SOUTH_CHICKEN1); 902 if (panel->backlight.alternate_pwm_increment) 903 schicken |= SPT_PWM_GRANULARITY; 904 else 905 schicken &= ~SPT_PWM_GRANULARITY; 906 intel_de_write(dev_priv, SOUTH_CHICKEN1, schicken); 907 } 908 909 pch_ctl2 = panel->backlight.max << 16; 910 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); 911 912 pch_ctl1 = 0; 913 if (panel->backlight.active_low_pwm) 914 pch_ctl1 |= BLM_PCH_POLARITY; 915 916 /* After LPT, override is the default. */ 917 if (HAS_PCH_LPT(dev_priv)) 918 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE; 919 920 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 921 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); 922 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 923 pch_ctl1 | BLM_PCH_PWM_ENABLE); 924 925 /* This won't stick until the above enable. */ 926 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 927} 928 929static void pch_enable_backlight(const struct intel_crtc_state *crtc_state, 930 const struct drm_connector_state *conn_state) 931{ 932 struct intel_connector *connector = to_intel_connector(conn_state->connector); 933 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 934 struct intel_panel *panel = &connector->panel; 935 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; 936 u32 cpu_ctl2, pch_ctl1, pch_ctl2; 937 938 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 939 if (cpu_ctl2 & BLM_PWM_ENABLE) { 940 drm_dbg_kms(&dev_priv->drm, "cpu backlight already enabled\n"); 941 cpu_ctl2 &= ~BLM_PWM_ENABLE; 942 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); 943 } 944 945 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 946 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) { 947 drm_dbg_kms(&dev_priv->drm, "pch backlight already enabled\n"); 948 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE; 949 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 950 } 951 952 if (cpu_transcoder == TRANSCODER_EDP) 953 cpu_ctl2 = BLM_TRANSCODER_EDP; 954 else 955 cpu_ctl2 = BLM_PIPE(cpu_transcoder); 956 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2); 957 intel_de_posting_read(dev_priv, BLC_PWM_CPU_CTL2); 958 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE); 959 960 /* This won't stick until the above enable. */ 961 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 962 963 pch_ctl2 = panel->backlight.max << 16; 964 intel_de_write(dev_priv, BLC_PWM_PCH_CTL2, pch_ctl2); 965 966 pch_ctl1 = 0; 967 if (panel->backlight.active_low_pwm) 968 pch_ctl1 |= BLM_PCH_POLARITY; 969 970 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, pch_ctl1); 971 intel_de_posting_read(dev_priv, BLC_PWM_PCH_CTL1); 972 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 973 pch_ctl1 | BLM_PCH_PWM_ENABLE); 974} 975 976static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state, 977 const struct drm_connector_state *conn_state) 978{ 979 struct intel_connector *connector = to_intel_connector(conn_state->connector); 980 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 981 struct intel_panel *panel = &connector->panel; 982 u32 ctl, freq; 983 984 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 985 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) { 986 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 987 intel_de_write(dev_priv, BLC_PWM_CTL, 0); 988 } 989 990 freq = panel->backlight.max; 991 if (panel->backlight.combination_mode) 992 freq /= 0xff; 993 994 ctl = freq << 17; 995 if (panel->backlight.combination_mode) 996 ctl |= BLM_LEGACY_MODE; 997 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm) 998 ctl |= BLM_POLARITY_PNV; 999 1000 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); 1001 intel_de_posting_read(dev_priv, BLC_PWM_CTL); 1002 1003 /* XXX: combine this into above write? */ 1004 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1005 1006 /* 1007 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is 1008 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2 1009 * that has backlight. 1010 */ 1011 if (IS_GEN(dev_priv, 2)) 1012 intel_de_write(dev_priv, BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE); 1013} 1014 1015static void i965_enable_backlight(const struct intel_crtc_state *crtc_state, 1016 const struct drm_connector_state *conn_state) 1017{ 1018 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1019 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1020 struct intel_panel *panel = &connector->panel; 1021 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe; 1022 u32 ctl, ctl2, freq; 1023 1024 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); 1025 if (ctl2 & BLM_PWM_ENABLE) { 1026 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1027 ctl2 &= ~BLM_PWM_ENABLE; 1028 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); 1029 } 1030 1031 freq = panel->backlight.max; 1032 if (panel->backlight.combination_mode) 1033 freq /= 0xff; 1034 1035 ctl = freq << 16; 1036 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); 1037 1038 ctl2 = BLM_PIPE(pipe); 1039 if (panel->backlight.combination_mode) 1040 ctl2 |= BLM_COMBINATION_MODE; 1041 if (panel->backlight.active_low_pwm) 1042 ctl2 |= BLM_POLARITY_I965; 1043 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2); 1044 intel_de_posting_read(dev_priv, BLC_PWM_CTL2); 1045 intel_de_write(dev_priv, BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE); 1046 1047 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1048} 1049 1050static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state, 1051 const struct drm_connector_state *conn_state) 1052{ 1053 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1054 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1055 struct intel_panel *panel = &connector->panel; 1056 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1057 u32 ctl, ctl2; 1058 1059 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1060 if (ctl2 & BLM_PWM_ENABLE) { 1061 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1062 ctl2 &= ~BLM_PWM_ENABLE; 1063 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); 1064 } 1065 1066 ctl = panel->backlight.max << 16; 1067 intel_de_write(dev_priv, VLV_BLC_PWM_CTL(pipe), ctl); 1068 1069 /* XXX: combine this into above write? */ 1070 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1071 1072 ctl2 = 0; 1073 if (panel->backlight.active_low_pwm) 1074 ctl2 |= BLM_POLARITY_I965; 1075 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), ctl2); 1076 intel_de_posting_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1077 intel_de_write(dev_priv, VLV_BLC_PWM_CTL2(pipe), 1078 ctl2 | BLM_PWM_ENABLE); 1079} 1080 1081static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state, 1082 const struct drm_connector_state *conn_state) 1083{ 1084 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1085 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1086 struct intel_panel *panel = &connector->panel; 1087 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1088 u32 pwm_ctl, val; 1089 1090 /* Controller 1 uses the utility pin. */ 1091 if (panel->backlight.controller == 1) { 1092 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 1093 if (val & UTIL_PIN_ENABLE) { 1094 drm_dbg_kms(&dev_priv->drm, 1095 "util pin already enabled\n"); 1096 val &= ~UTIL_PIN_ENABLE; 1097 intel_de_write(dev_priv, UTIL_PIN_CTL, val); 1098 } 1099 1100 val = 0; 1101 if (panel->backlight.util_pin_active_low) 1102 val |= UTIL_PIN_POLARITY; 1103 intel_de_write(dev_priv, UTIL_PIN_CTL, 1104 val | UTIL_PIN_PIPE(pipe) | UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE); 1105 } 1106 1107 pwm_ctl = intel_de_read(dev_priv, 1108 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1109 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1110 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1111 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1112 intel_de_write(dev_priv, 1113 BXT_BLC_PWM_CTL(panel->backlight.controller), 1114 pwm_ctl); 1115 } 1116 1117 intel_de_write(dev_priv, 1118 BXT_BLC_PWM_FREQ(panel->backlight.controller), 1119 panel->backlight.max); 1120 1121 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1122 1123 pwm_ctl = 0; 1124 if (panel->backlight.active_low_pwm) 1125 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1126 1127 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1128 pwm_ctl); 1129 intel_de_posting_read(dev_priv, 1130 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1131 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1132 pwm_ctl | BXT_BLC_PWM_ENABLE); 1133} 1134 1135static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state, 1136 const struct drm_connector_state *conn_state) 1137{ 1138 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1139 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1140 struct intel_panel *panel = &connector->panel; 1141 u32 pwm_ctl; 1142 1143 pwm_ctl = intel_de_read(dev_priv, 1144 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1145 if (pwm_ctl & BXT_BLC_PWM_ENABLE) { 1146 drm_dbg_kms(&dev_priv->drm, "backlight already enabled\n"); 1147 pwm_ctl &= ~BXT_BLC_PWM_ENABLE; 1148 intel_de_write(dev_priv, 1149 BXT_BLC_PWM_CTL(panel->backlight.controller), 1150 pwm_ctl); 1151 } 1152 1153 intel_de_write(dev_priv, 1154 BXT_BLC_PWM_FREQ(panel->backlight.controller), 1155 panel->backlight.max); 1156 1157 intel_panel_actually_set_backlight(conn_state, panel->backlight.level); 1158 1159 pwm_ctl = 0; 1160 if (panel->backlight.active_low_pwm) 1161 pwm_ctl |= BXT_BLC_PWM_POLARITY; 1162 1163 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1164 pwm_ctl); 1165 intel_de_posting_read(dev_priv, 1166 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1167 intel_de_write(dev_priv, BXT_BLC_PWM_CTL(panel->backlight.controller), 1168 pwm_ctl | BXT_BLC_PWM_ENABLE); 1169} 1170 1171static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state, 1172 const struct drm_connector_state *conn_state) 1173{ 1174 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1175 struct intel_panel *panel = &connector->panel; 1176 int level = panel->backlight.level; 1177 1178 level = intel_panel_compute_brightness(connector, level); 1179 pwm_set_relative_duty_cycle(&panel->backlight.pwm_state, level, 100); 1180 panel->backlight.pwm_state.enabled = true; 1181 pwm_apply_state(panel->backlight.pwm, &panel->backlight.pwm_state); 1182} 1183 1184static void __intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1185 const struct drm_connector_state *conn_state) 1186{ 1187 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1188 struct intel_panel *panel = &connector->panel; 1189 1190 WARN_ON(panel->backlight.max == 0); 1191 1192 if (panel->backlight.level <= panel->backlight.min) { 1193 panel->backlight.level = panel->backlight.max; 1194 if (panel->backlight.device) 1195 panel->backlight.device->props.brightness = 1196 scale_hw_to_user(connector, 1197 panel->backlight.level, 1198 panel->backlight.device->props.max_brightness); 1199 } 1200 1201 panel->backlight.enable(crtc_state, conn_state); 1202 panel->backlight.enabled = true; 1203 if (panel->backlight.device) 1204 panel->backlight.device->props.power = FB_BLANK_UNBLANK; 1205} 1206 1207void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state, 1208 const struct drm_connector_state *conn_state) 1209{ 1210 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1211 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1212 struct intel_panel *panel = &connector->panel; 1213 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; 1214 1215 if (!panel->backlight.present) 1216 return; 1217 1218 drm_dbg_kms(&dev_priv->drm, "pipe %c\n", pipe_name(pipe)); 1219 1220 mutex_lock(&dev_priv->backlight_lock); 1221 1222 __intel_panel_enable_backlight(crtc_state, conn_state); 1223 1224 mutex_unlock(&dev_priv->backlight_lock); 1225} 1226 1227#if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE) 1228static u32 intel_panel_get_backlight(struct intel_connector *connector) 1229{ 1230 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1231 struct intel_panel *panel = &connector->panel; 1232 u32 val = 0; 1233 1234 mutex_lock(&dev_priv->backlight_lock); 1235 1236 if (panel->backlight.enabled) { 1237 val = panel->backlight.get(connector); 1238 val = intel_panel_compute_brightness(connector, val); 1239 } 1240 1241 mutex_unlock(&dev_priv->backlight_lock); 1242 1243 drm_dbg_kms(&dev_priv->drm, "get backlight PWM = %d\n", val); 1244 return val; 1245} 1246 1247/* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */ 1248static u32 scale_user_to_hw(struct intel_connector *connector, 1249 u32 user_level, u32 user_max) 1250{ 1251 struct intel_panel *panel = &connector->panel; 1252 1253 return scale(user_level, 0, user_max, 1254 panel->backlight.min, panel->backlight.max); 1255} 1256 1257/* set backlight brightness to level in range [0..max], scaling wrt hw min */ 1258static void intel_panel_set_backlight(const struct drm_connector_state *conn_state, 1259 u32 user_level, u32 user_max) 1260{ 1261 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1262 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1263 struct intel_panel *panel = &connector->panel; 1264 u32 hw_level; 1265 1266 if (!panel->backlight.present) 1267 return; 1268 1269 mutex_lock(&dev_priv->backlight_lock); 1270 1271 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 1272 1273 hw_level = scale_user_to_hw(connector, user_level, user_max); 1274 panel->backlight.level = hw_level; 1275 1276 if (panel->backlight.enabled) 1277 intel_panel_actually_set_backlight(conn_state, hw_level); 1278 1279 mutex_unlock(&dev_priv->backlight_lock); 1280} 1281 1282static int intel_backlight_device_update_status(struct backlight_device *bd) 1283{ 1284 struct intel_connector *connector = bl_get_data(bd); 1285 struct intel_panel *panel = &connector->panel; 1286 struct drm_device *dev = connector->base.dev; 1287 1288 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1289 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n", 1290 bd->props.brightness, bd->props.max_brightness); 1291 intel_panel_set_backlight(connector->base.state, bd->props.brightness, 1292 bd->props.max_brightness); 1293 1294 /* 1295 * Allow flipping bl_power as a sub-state of enabled. Sadly the 1296 * backlight class device does not make it easy to to differentiate 1297 * between callbacks for brightness and bl_power, so our backlight_power 1298 * callback needs to take this into account. 1299 */ 1300 if (panel->backlight.enabled) { 1301 if (panel->backlight.power) { 1302 bool enable = bd->props.power == FB_BLANK_UNBLANK && 1303 bd->props.brightness != 0; 1304 panel->backlight.power(connector, enable); 1305 } 1306 } else { 1307 bd->props.power = FB_BLANK_POWERDOWN; 1308 } 1309 1310 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1311 return 0; 1312} 1313 1314static int intel_backlight_device_get_brightness(struct backlight_device *bd) 1315{ 1316 struct intel_connector *connector = bl_get_data(bd); 1317 struct drm_device *dev = connector->base.dev; 1318 struct drm_i915_private *dev_priv = to_i915(dev); 1319 intel_wakeref_t wakeref; 1320 int ret = 0; 1321 1322 with_intel_runtime_pm(&dev_priv->runtime_pm, wakeref) { 1323 u32 hw_level; 1324 1325 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); 1326 1327 hw_level = intel_panel_get_backlight(connector); 1328 ret = scale_hw_to_user(connector, 1329 hw_level, bd->props.max_brightness); 1330 1331 drm_modeset_unlock(&dev->mode_config.connection_mutex); 1332 } 1333 1334 return ret; 1335} 1336 1337static const struct backlight_ops intel_backlight_device_ops = { 1338 .update_status = intel_backlight_device_update_status, 1339 .get_brightness = intel_backlight_device_get_brightness, 1340}; 1341 1342int intel_backlight_device_register(struct intel_connector *connector) 1343{ 1344 struct drm_i915_private *i915 = to_i915(connector->base.dev); 1345 struct intel_panel *panel = &connector->panel; 1346 struct backlight_properties props; 1347 1348 if (WARN_ON(panel->backlight.device)) 1349 return -ENODEV; 1350 1351 if (!panel->backlight.present) 1352 return 0; 1353 1354 WARN_ON(panel->backlight.max == 0); 1355 1356 memset(&props, 0, sizeof(props)); 1357 props.type = BACKLIGHT_RAW; 1358 1359 /* 1360 * Note: Everything should work even if the backlight device max 1361 * presented to the userspace is arbitrarily chosen. 1362 */ 1363 props.max_brightness = panel->backlight.max; 1364 props.brightness = scale_hw_to_user(connector, 1365 panel->backlight.level, 1366 props.max_brightness); 1367 1368 if (panel->backlight.enabled) 1369 props.power = FB_BLANK_UNBLANK; 1370 else 1371 props.power = FB_BLANK_POWERDOWN; 1372 1373 /* 1374 * Note: using the same name independent of the connector prevents 1375 * registration of multiple backlight devices in the driver. 1376 */ 1377 panel->backlight.device = 1378 backlight_device_register("intel_backlight", 1379 connector->base.kdev, 1380 connector, 1381 &intel_backlight_device_ops, &props); 1382 1383 if (IS_ERR(panel->backlight.device)) { 1384 drm_err(&i915->drm, "Failed to register backlight: %ld\n", 1385 PTR_ERR(panel->backlight.device)); 1386 panel->backlight.device = NULL; 1387 return -ENODEV; 1388 } 1389 1390 drm_dbg_kms(&i915->drm, 1391 "Connector %s backlight sysfs interface registered\n", 1392 connector->base.name); 1393 1394 return 0; 1395} 1396 1397void intel_backlight_device_unregister(struct intel_connector *connector) 1398{ 1399 struct intel_panel *panel = &connector->panel; 1400 1401 if (panel->backlight.device) { 1402 backlight_device_unregister(panel->backlight.device); 1403 panel->backlight.device = NULL; 1404 } 1405} 1406#endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */ 1407 1408/* 1409 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz. 1410 * PWM increment = 1 1411 */ 1412static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1413{ 1414 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1415 1416 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), 1417 pwm_freq_hz); 1418} 1419 1420/* 1421 * BXT: PWM clock frequency = 19.2 MHz. 1422 */ 1423static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1424{ 1425 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz); 1426} 1427 1428/* 1429 * SPT: This value represents the period of the PWM stream in clock periods 1430 * multiplied by 16 (default increment) or 128 (alternate increment selected in 1431 * SCHICKEN_1 bit 0). PWM clock is 24 MHz. 1432 */ 1433static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1434{ 1435 struct intel_panel *panel = &connector->panel; 1436 u32 mul; 1437 1438 if (panel->backlight.alternate_pwm_increment) 1439 mul = 128; 1440 else 1441 mul = 16; 1442 1443 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul); 1444} 1445 1446/* 1447 * LPT: This value represents the period of the PWM stream in clock periods 1448 * multiplied by 128 (default increment) or 16 (alternate increment, selected in 1449 * LPT SOUTH_CHICKEN2 register bit 5). 1450 */ 1451static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1452{ 1453 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1454 struct intel_panel *panel = &connector->panel; 1455 u32 mul, clock; 1456 1457 if (panel->backlight.alternate_pwm_increment) 1458 mul = 16; 1459 else 1460 mul = 128; 1461 1462 if (HAS_PCH_LPT_H(dev_priv)) 1463 clock = MHz(135); /* LPT:H */ 1464 else 1465 clock = MHz(24); /* LPT:LP */ 1466 1467 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1468} 1469 1470/* 1471 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH 1472 * display raw clocks multiplied by 128. 1473 */ 1474static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1475{ 1476 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1477 1478 return DIV_ROUND_CLOSEST(KHz(RUNTIME_INFO(dev_priv)->rawclk_freq), 1479 pwm_freq_hz * 128); 1480} 1481 1482/* 1483 * Gen2: This field determines the number of time base events (display core 1484 * clock frequency/32) in total for a complete cycle of modulated backlight 1485 * control. 1486 * 1487 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock) 1488 * divided by 32. 1489 */ 1490static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1491{ 1492 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1493 int clock; 1494 1495 if (IS_PINEVIEW(dev_priv)) 1496 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1497 else 1498 clock = KHz(dev_priv->cdclk.hw.cdclk); 1499 1500 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32); 1501} 1502 1503/* 1504 * Gen4: This value represents the period of the PWM stream in display core 1505 * clocks ([DevCTG] HRAW clocks) multiplied by 128. 1506 * 1507 */ 1508static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1509{ 1510 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1511 int clock; 1512 1513 if (IS_G4X(dev_priv)) 1514 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1515 else 1516 clock = KHz(dev_priv->cdclk.hw.cdclk); 1517 1518 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128); 1519} 1520 1521/* 1522 * VLV: This value represents the period of the PWM stream in display core 1523 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks 1524 * multiplied by 16. CHV uses a 19.2MHz S0IX clock. 1525 */ 1526static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz) 1527{ 1528 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1529 int mul, clock; 1530 1531 if ((intel_de_read(dev_priv, CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) { 1532 if (IS_CHERRYVIEW(dev_priv)) 1533 clock = KHz(19200); 1534 else 1535 clock = MHz(25); 1536 mul = 16; 1537 } else { 1538 clock = KHz(RUNTIME_INFO(dev_priv)->rawclk_freq); 1539 mul = 128; 1540 } 1541 1542 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul); 1543} 1544 1545static u16 get_vbt_pwm_freq(struct drm_i915_private *dev_priv) 1546{ 1547 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz; 1548 1549 if (pwm_freq_hz) { 1550 drm_dbg_kms(&dev_priv->drm, 1551 "VBT defined backlight frequency %u Hz\n", 1552 pwm_freq_hz); 1553 } else { 1554 pwm_freq_hz = 200; 1555 drm_dbg_kms(&dev_priv->drm, 1556 "default backlight frequency %u Hz\n", 1557 pwm_freq_hz); 1558 } 1559 1560 return pwm_freq_hz; 1561} 1562 1563static u32 get_backlight_max_vbt(struct intel_connector *connector) 1564{ 1565 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1566 struct intel_panel *panel = &connector->panel; 1567 u16 pwm_freq_hz = get_vbt_pwm_freq(dev_priv); 1568 u32 pwm; 1569 1570 if (!panel->backlight.hz_to_pwm) { 1571 drm_dbg_kms(&dev_priv->drm, 1572 "backlight frequency conversion not supported\n"); 1573 return 0; 1574 } 1575 1576 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz); 1577 if (!pwm) { 1578 drm_dbg_kms(&dev_priv->drm, 1579 "backlight frequency conversion failed\n"); 1580 return 0; 1581 } 1582 1583 return pwm; 1584} 1585 1586/* 1587 * Note: The setup hooks can't assume pipe is set! 1588 */ 1589static u32 get_backlight_min_vbt(struct intel_connector *connector) 1590{ 1591 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1592 struct intel_panel *panel = &connector->panel; 1593 int min; 1594 1595 drm_WARN_ON(&dev_priv->drm, panel->backlight.max == 0); 1596 1597 /* 1598 * XXX: If the vbt value is 255, it makes min equal to max, which leads 1599 * to problems. There are such machines out there. Either our 1600 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard 1601 * against this by letting the minimum be at most (arbitrarily chosen) 1602 * 25% of the max. 1603 */ 1604 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64); 1605 if (min != dev_priv->vbt.backlight.min_brightness) { 1606 drm_dbg_kms(&dev_priv->drm, 1607 "clamping VBT min backlight %d/255 to %d/255\n", 1608 dev_priv->vbt.backlight.min_brightness, min); 1609 } 1610 1611 /* vbt value is a coefficient in range [0..255] */ 1612 return scale(min, 0, 255, 0, panel->backlight.max); 1613} 1614 1615static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1616{ 1617 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1618 struct intel_panel *panel = &connector->panel; 1619 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1620 bool alt, cpu_mode; 1621 1622 if (HAS_PCH_LPT(dev_priv)) 1623 alt = intel_de_read(dev_priv, SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY; 1624 else 1625 alt = intel_de_read(dev_priv, SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY; 1626 panel->backlight.alternate_pwm_increment = alt; 1627 1628 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 1629 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1630 1631 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); 1632 panel->backlight.max = pch_ctl2 >> 16; 1633 1634 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 1635 1636 if (!panel->backlight.max) 1637 panel->backlight.max = get_backlight_max_vbt(connector); 1638 1639 if (!panel->backlight.max) 1640 return -ENODEV; 1641 1642 panel->backlight.min = get_backlight_min_vbt(connector); 1643 1644 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE; 1645 1646 cpu_mode = panel->backlight.enabled && HAS_PCH_LPT(dev_priv) && 1647 !(pch_ctl1 & BLM_PCH_OVERRIDE_ENABLE) && 1648 (cpu_ctl2 & BLM_PWM_ENABLE); 1649 if (cpu_mode) 1650 val = pch_get_backlight(connector); 1651 else 1652 val = lpt_get_backlight(connector); 1653 1654 if (cpu_mode) { 1655 drm_dbg_kms(&dev_priv->drm, 1656 "CPU backlight register was enabled, switching to PCH override\n"); 1657 1658 /* Write converted CPU PWM value to PCH override register */ 1659 lpt_set_backlight(connector->base.state, val); 1660 intel_de_write(dev_priv, BLC_PWM_PCH_CTL1, 1661 pch_ctl1 | BLM_PCH_OVERRIDE_ENABLE); 1662 1663 intel_de_write(dev_priv, BLC_PWM_CPU_CTL2, 1664 cpu_ctl2 & ~BLM_PWM_ENABLE); 1665 } 1666 1667 val = intel_panel_compute_brightness(connector, val); 1668 panel->backlight.level = clamp(val, panel->backlight.min, 1669 panel->backlight.max); 1670 1671 return 0; 1672} 1673 1674static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused) 1675{ 1676 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1677 struct intel_panel *panel = &connector->panel; 1678 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val; 1679 1680 pch_ctl1 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL1); 1681 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY; 1682 1683 pch_ctl2 = intel_de_read(dev_priv, BLC_PWM_PCH_CTL2); 1684 panel->backlight.max = pch_ctl2 >> 16; 1685 1686 if (!panel->backlight.max) 1687 panel->backlight.max = get_backlight_max_vbt(connector); 1688 1689 if (!panel->backlight.max) 1690 return -ENODEV; 1691 1692 panel->backlight.min = get_backlight_min_vbt(connector); 1693 1694 val = pch_get_backlight(connector); 1695 val = intel_panel_compute_brightness(connector, val); 1696 panel->backlight.level = clamp(val, panel->backlight.min, 1697 panel->backlight.max); 1698 1699 cpu_ctl2 = intel_de_read(dev_priv, BLC_PWM_CPU_CTL2); 1700 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) && 1701 (pch_ctl1 & BLM_PCH_PWM_ENABLE); 1702 1703 return 0; 1704} 1705 1706static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused) 1707{ 1708 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1709 struct intel_panel *panel = &connector->panel; 1710 u32 ctl, val; 1711 1712 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1713 1714 if (IS_GEN(dev_priv, 2) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv)) 1715 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE; 1716 1717 if (IS_PINEVIEW(dev_priv)) 1718 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV; 1719 1720 panel->backlight.max = ctl >> 17; 1721 1722 if (!panel->backlight.max) { 1723 panel->backlight.max = get_backlight_max_vbt(connector); 1724 panel->backlight.max >>= 1; 1725 } 1726 1727 if (!panel->backlight.max) 1728 return -ENODEV; 1729 1730 if (panel->backlight.combination_mode) 1731 panel->backlight.max *= 0xff; 1732 1733 panel->backlight.min = get_backlight_min_vbt(connector); 1734 1735 val = i9xx_get_backlight(connector); 1736 val = intel_panel_compute_brightness(connector, val); 1737 panel->backlight.level = clamp(val, panel->backlight.min, 1738 panel->backlight.max); 1739 1740 panel->backlight.enabled = val != 0; 1741 1742 return 0; 1743} 1744 1745static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused) 1746{ 1747 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1748 struct intel_panel *panel = &connector->panel; 1749 u32 ctl, ctl2, val; 1750 1751 ctl2 = intel_de_read(dev_priv, BLC_PWM_CTL2); 1752 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE; 1753 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1754 1755 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); 1756 panel->backlight.max = ctl >> 16; 1757 1758 if (!panel->backlight.max) 1759 panel->backlight.max = get_backlight_max_vbt(connector); 1760 1761 if (!panel->backlight.max) 1762 return -ENODEV; 1763 1764 if (panel->backlight.combination_mode) 1765 panel->backlight.max *= 0xff; 1766 1767 panel->backlight.min = get_backlight_min_vbt(connector); 1768 1769 val = i9xx_get_backlight(connector); 1770 val = intel_panel_compute_brightness(connector, val); 1771 panel->backlight.level = clamp(val, panel->backlight.min, 1772 panel->backlight.max); 1773 1774 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE; 1775 1776 return 0; 1777} 1778 1779static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe) 1780{ 1781 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1782 struct intel_panel *panel = &connector->panel; 1783 u32 ctl, ctl2, val; 1784 1785 if (drm_WARN_ON(&dev_priv->drm, pipe != PIPE_A && pipe != PIPE_B)) 1786 return -ENODEV; 1787 1788 ctl2 = intel_de_read(dev_priv, VLV_BLC_PWM_CTL2(pipe)); 1789 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965; 1790 1791 ctl = intel_de_read(dev_priv, VLV_BLC_PWM_CTL(pipe)); 1792 panel->backlight.max = ctl >> 16; 1793 1794 if (!panel->backlight.max) 1795 panel->backlight.max = get_backlight_max_vbt(connector); 1796 1797 if (!panel->backlight.max) 1798 return -ENODEV; 1799 1800 panel->backlight.min = get_backlight_min_vbt(connector); 1801 1802 val = _vlv_get_backlight(dev_priv, pipe); 1803 val = intel_panel_compute_brightness(connector, val); 1804 panel->backlight.level = clamp(val, panel->backlight.min, 1805 panel->backlight.max); 1806 1807 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE; 1808 1809 return 0; 1810} 1811 1812static int 1813bxt_setup_backlight(struct intel_connector *connector, enum pipe unused) 1814{ 1815 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1816 struct intel_panel *panel = &connector->panel; 1817 u32 pwm_ctl, val; 1818 1819 panel->backlight.controller = dev_priv->vbt.backlight.controller; 1820 1821 pwm_ctl = intel_de_read(dev_priv, 1822 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1823 1824 /* Controller 1 uses the utility pin. */ 1825 if (panel->backlight.controller == 1) { 1826 val = intel_de_read(dev_priv, UTIL_PIN_CTL); 1827 panel->backlight.util_pin_active_low = 1828 val & UTIL_PIN_POLARITY; 1829 } 1830 1831 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1832 panel->backlight.max = 1833 intel_de_read(dev_priv, 1834 BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1835 1836 if (!panel->backlight.max) 1837 panel->backlight.max = get_backlight_max_vbt(connector); 1838 1839 if (!panel->backlight.max) 1840 return -ENODEV; 1841 1842 panel->backlight.min = get_backlight_min_vbt(connector); 1843 1844 val = bxt_get_backlight(connector); 1845 val = intel_panel_compute_brightness(connector, val); 1846 panel->backlight.level = clamp(val, panel->backlight.min, 1847 panel->backlight.max); 1848 1849 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1850 1851 return 0; 1852} 1853 1854static int 1855cnp_setup_backlight(struct intel_connector *connector, enum pipe unused) 1856{ 1857 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1858 struct intel_panel *panel = &connector->panel; 1859 u32 pwm_ctl, val; 1860 1861 /* 1862 * CNP has the BXT implementation of backlight, but with only one 1863 * controller. TODO: ICP has multiple controllers but we only use 1864 * controller 0 for now. 1865 */ 1866 panel->backlight.controller = 0; 1867 1868 pwm_ctl = intel_de_read(dev_priv, 1869 BXT_BLC_PWM_CTL(panel->backlight.controller)); 1870 1871 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY; 1872 panel->backlight.max = 1873 intel_de_read(dev_priv, 1874 BXT_BLC_PWM_FREQ(panel->backlight.controller)); 1875 1876 if (!panel->backlight.max) 1877 panel->backlight.max = get_backlight_max_vbt(connector); 1878 1879 if (!panel->backlight.max) 1880 return -ENODEV; 1881 1882 panel->backlight.min = get_backlight_min_vbt(connector); 1883 1884 val = bxt_get_backlight(connector); 1885 val = intel_panel_compute_brightness(connector, val); 1886 panel->backlight.level = clamp(val, panel->backlight.min, 1887 panel->backlight.max); 1888 1889 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE; 1890 1891 return 0; 1892} 1893 1894static int pwm_setup_backlight(struct intel_connector *connector, 1895 enum pipe pipe) 1896{ 1897 struct drm_device *dev = connector->base.dev; 1898 struct drm_i915_private *dev_priv = to_i915(dev); 1899 struct intel_panel *panel = &connector->panel; 1900 const char *desc; 1901 u32 level; 1902 1903 /* Get the right PWM chip for DSI backlight according to VBT */ 1904 if (dev_priv->vbt.dsi.config->pwm_blc == PPS_BLC_PMIC) { 1905 panel->backlight.pwm = pwm_get(dev->dev, "pwm_pmic_backlight"); 1906 desc = "PMIC"; 1907 } else { 1908 panel->backlight.pwm = pwm_get(dev->dev, "pwm_soc_backlight"); 1909 desc = "SoC"; 1910 } 1911 1912 if (IS_ERR(panel->backlight.pwm)) { 1913 drm_err(&dev_priv->drm, "Failed to get the %s PWM chip\n", 1914 desc); 1915 panel->backlight.pwm = NULL; 1916 return -ENODEV; 1917 } 1918 1919 panel->backlight.max = 100; /* 100% */ 1920 panel->backlight.min = get_backlight_min_vbt(connector); 1921 1922 if (pwm_is_enabled(panel->backlight.pwm)) { 1923 /* PWM is already enabled, use existing settings */ 1924 pwm_get_state(panel->backlight.pwm, &panel->backlight.pwm_state); 1925 1926 level = pwm_get_relative_duty_cycle(&panel->backlight.pwm_state, 1927 100); 1928 level = intel_panel_compute_brightness(connector, level); 1929 panel->backlight.level = clamp(level, panel->backlight.min, 1930 panel->backlight.max); 1931 panel->backlight.enabled = true; 1932 1933 drm_dbg_kms(&dev_priv->drm, "PWM already enabled at freq %ld, VBT freq %d, level %d\n", 1934 NSEC_PER_SEC / (unsigned long)panel->backlight.pwm_state.period, 1935 get_vbt_pwm_freq(dev_priv), level); 1936 } else { 1937 /* Set period from VBT frequency, leave other settings at 0. */ 1938 panel->backlight.pwm_state.period = 1939 NSEC_PER_SEC / get_vbt_pwm_freq(dev_priv); 1940 } 1941 1942 drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n", 1943 desc); 1944 return 0; 1945} 1946 1947void intel_panel_update_backlight(struct intel_atomic_state *state, 1948 struct intel_encoder *encoder, 1949 const struct intel_crtc_state *crtc_state, 1950 const struct drm_connector_state *conn_state) 1951{ 1952 struct intel_connector *connector = to_intel_connector(conn_state->connector); 1953 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 1954 struct intel_panel *panel = &connector->panel; 1955 1956 if (!panel->backlight.present) 1957 return; 1958 1959 mutex_lock(&dev_priv->backlight_lock); 1960 if (!panel->backlight.enabled) 1961 __intel_panel_enable_backlight(crtc_state, conn_state); 1962 1963 mutex_unlock(&dev_priv->backlight_lock); 1964} 1965 1966int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe) 1967{ 1968 struct drm_i915_private *dev_priv = to_i915(connector->dev); 1969 struct intel_connector *intel_connector = to_intel_connector(connector); 1970 struct intel_panel *panel = &intel_connector->panel; 1971 int ret; 1972 1973 if (!dev_priv->vbt.backlight.present) { 1974 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) { 1975 drm_dbg_kms(&dev_priv->drm, 1976 "no backlight present per VBT, but present per quirk\n"); 1977 } else { 1978 drm_dbg_kms(&dev_priv->drm, 1979 "no backlight present per VBT\n"); 1980 return 0; 1981 } 1982 } 1983 1984 /* ensure intel_panel has been initialized first */ 1985 if (drm_WARN_ON(&dev_priv->drm, !panel->backlight.setup)) 1986 return -ENODEV; 1987 1988 /* set level and max in panel struct */ 1989 mutex_lock(&dev_priv->backlight_lock); 1990 ret = panel->backlight.setup(intel_connector, pipe); 1991 mutex_unlock(&dev_priv->backlight_lock); 1992 1993 if (ret) { 1994 drm_dbg_kms(&dev_priv->drm, 1995 "failed to setup backlight for connector %s\n", 1996 connector->name); 1997 return ret; 1998 } 1999 2000 panel->backlight.present = true; 2001 2002 drm_dbg_kms(&dev_priv->drm, 2003 "Connector %s backlight initialized, %s, brightness %u/%u\n", 2004 connector->name, 2005 enableddisabled(panel->backlight.enabled), 2006 panel->backlight.level, panel->backlight.max); 2007 2008 return 0; 2009} 2010 2011static void intel_panel_destroy_backlight(struct intel_panel *panel) 2012{ 2013 /* dispose of the pwm */ 2014 if (panel->backlight.pwm) 2015 pwm_put(panel->backlight.pwm); 2016 2017 panel->backlight.present = false; 2018} 2019 2020/* Set up chip specific backlight functions */ 2021static void 2022intel_panel_init_backlight_funcs(struct intel_panel *panel) 2023{ 2024 struct intel_connector *connector = 2025 container_of(panel, struct intel_connector, panel); 2026 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); 2027 2028 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP && 2029 intel_dp_aux_init_backlight_funcs(connector) == 0) 2030 return; 2031 2032 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI && 2033 intel_dsi_dcs_init_backlight_funcs(connector) == 0) 2034 return; 2035 2036 if (IS_GEN9_LP(dev_priv)) { 2037 panel->backlight.setup = bxt_setup_backlight; 2038 panel->backlight.enable = bxt_enable_backlight; 2039 panel->backlight.disable = bxt_disable_backlight; 2040 panel->backlight.set = bxt_set_backlight; 2041 panel->backlight.get = bxt_get_backlight; 2042 panel->backlight.hz_to_pwm = bxt_hz_to_pwm; 2043 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_CNP) { 2044 panel->backlight.setup = cnp_setup_backlight; 2045 panel->backlight.enable = cnp_enable_backlight; 2046 panel->backlight.disable = cnp_disable_backlight; 2047 panel->backlight.set = bxt_set_backlight; 2048 panel->backlight.get = bxt_get_backlight; 2049 panel->backlight.hz_to_pwm = cnp_hz_to_pwm; 2050 } else if (INTEL_PCH_TYPE(dev_priv) >= PCH_LPT) { 2051 panel->backlight.setup = lpt_setup_backlight; 2052 panel->backlight.enable = lpt_enable_backlight; 2053 panel->backlight.disable = lpt_disable_backlight; 2054 panel->backlight.set = lpt_set_backlight; 2055 panel->backlight.get = lpt_get_backlight; 2056 if (HAS_PCH_LPT(dev_priv)) 2057 panel->backlight.hz_to_pwm = lpt_hz_to_pwm; 2058 else 2059 panel->backlight.hz_to_pwm = spt_hz_to_pwm; 2060 } else if (HAS_PCH_SPLIT(dev_priv)) { 2061 panel->backlight.setup = pch_setup_backlight; 2062 panel->backlight.enable = pch_enable_backlight; 2063 panel->backlight.disable = pch_disable_backlight; 2064 panel->backlight.set = pch_set_backlight; 2065 panel->backlight.get = pch_get_backlight; 2066 panel->backlight.hz_to_pwm = pch_hz_to_pwm; 2067 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { 2068 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) { 2069 panel->backlight.setup = pwm_setup_backlight; 2070 panel->backlight.enable = pwm_enable_backlight; 2071 panel->backlight.disable = pwm_disable_backlight; 2072 panel->backlight.set = pwm_set_backlight; 2073 panel->backlight.get = pwm_get_backlight; 2074 } else { 2075 panel->backlight.setup = vlv_setup_backlight; 2076 panel->backlight.enable = vlv_enable_backlight; 2077 panel->backlight.disable = vlv_disable_backlight; 2078 panel->backlight.set = vlv_set_backlight; 2079 panel->backlight.get = vlv_get_backlight; 2080 panel->backlight.hz_to_pwm = vlv_hz_to_pwm; 2081 } 2082 } else if (IS_GEN(dev_priv, 4)) { 2083 panel->backlight.setup = i965_setup_backlight; 2084 panel->backlight.enable = i965_enable_backlight; 2085 panel->backlight.disable = i965_disable_backlight; 2086 panel->backlight.set = i9xx_set_backlight; 2087 panel->backlight.get = i9xx_get_backlight; 2088 panel->backlight.hz_to_pwm = i965_hz_to_pwm; 2089 } else { 2090 panel->backlight.setup = i9xx_setup_backlight; 2091 panel->backlight.enable = i9xx_enable_backlight; 2092 panel->backlight.disable = i9xx_disable_backlight; 2093 panel->backlight.set = i9xx_set_backlight; 2094 panel->backlight.get = i9xx_get_backlight; 2095 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm; 2096 } 2097} 2098 2099enum drm_connector_status 2100intel_panel_detect(struct drm_connector *connector, bool force) 2101{ 2102 struct drm_i915_private *i915 = to_i915(connector->dev); 2103 2104 if (!INTEL_DISPLAY_ENABLED(i915)) 2105 return connector_status_disconnected; 2106 2107 return connector_status_connected; 2108} 2109 2110int intel_panel_init(struct intel_panel *panel, 2111 struct drm_display_mode *fixed_mode, 2112 struct drm_display_mode *downclock_mode) 2113{ 2114 intel_panel_init_backlight_funcs(panel); 2115 2116 panel->fixed_mode = fixed_mode; 2117 panel->downclock_mode = downclock_mode; 2118 2119 return 0; 2120} 2121 2122void intel_panel_fini(struct intel_panel *panel) 2123{ 2124 struct intel_connector *intel_connector = 2125 container_of(panel, struct intel_connector, panel); 2126 2127 intel_panel_destroy_backlight(panel); 2128 2129 if (panel->fixed_mode) 2130 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode); 2131 2132 if (panel->downclock_mode) 2133 drm_mode_destroy(intel_connector->base.dev, 2134 panel->downclock_mode); 2135} 2136