1/* SPDX-License-Identifier: MIT */ 2/* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6#ifndef __INTEL_DP_H__ 7#define __INTEL_DP_H__ 8 9#include <linux/types.h> 10 11#include "i915_reg.h" 12 13enum pipe; 14enum port; 15struct drm_connector_state; 16struct drm_encoder; 17struct drm_i915_private; 18struct drm_modeset_acquire_ctx; 19struct drm_dp_vsc_sdp; 20struct intel_atomic_state; 21struct intel_connector; 22struct intel_crtc_state; 23struct intel_digital_port; 24struct intel_dp; 25struct intel_encoder; 26 27struct link_config_limits { 28 int min_clock, max_clock; 29 int min_lane_count, max_lane_count; 30 int min_bpp, max_bpp; 31}; 32 33void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp, 34 struct intel_crtc_state *pipe_config, 35 struct link_config_limits *limits); 36bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state, 37 const struct drm_connector_state *conn_state); 38int intel_dp_min_bpp(const struct intel_crtc_state *crtc_state); 39bool intel_dp_port_enabled(struct drm_i915_private *dev_priv, 40 i915_reg_t dp_reg, enum port port, 41 enum pipe *pipe); 42bool intel_dp_init(struct drm_i915_private *dev_priv, i915_reg_t output_reg, 43 enum port port); 44bool intel_dp_init_connector(struct intel_digital_port *dig_port, 45 struct intel_connector *intel_connector); 46void intel_dp_set_link_params(struct intel_dp *intel_dp, 47 int link_rate, u8 lane_count, 48 bool link_mst); 49int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp, 50 int link_rate, u8 lane_count); 51int intel_dp_retrain_link(struct intel_encoder *encoder, 52 struct drm_modeset_acquire_ctx *ctx); 53void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode); 54void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp, 55 const struct intel_crtc_state *crtc_state); 56void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp, 57 const struct intel_crtc_state *crtc_state, 58 bool enable); 59void intel_dp_encoder_reset(struct drm_encoder *encoder); 60void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder); 61void intel_dp_encoder_flush_work(struct drm_encoder *encoder); 62int intel_dp_compute_config(struct intel_encoder *encoder, 63 struct intel_crtc_state *pipe_config, 64 struct drm_connector_state *conn_state); 65bool intel_dp_is_edp(struct intel_dp *intel_dp); 66bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port); 67enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port, 68 bool long_hpd); 69void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state, 70 const struct drm_connector_state *conn_state); 71void intel_edp_backlight_off(const struct drm_connector_state *conn_state); 72void intel_edp_panel_vdd_on(struct intel_dp *intel_dp); 73void intel_edp_panel_on(struct intel_dp *intel_dp); 74void intel_edp_panel_off(struct intel_dp *intel_dp); 75void intel_dp_mst_suspend(struct drm_i915_private *dev_priv); 76void intel_dp_mst_resume(struct drm_i915_private *dev_priv); 77int intel_dp_max_link_rate(struct intel_dp *intel_dp); 78int intel_dp_max_lane_count(struct intel_dp *intel_dp); 79int intel_dp_rate_select(struct intel_dp *intel_dp, int rate); 80void intel_power_sequencer_reset(struct drm_i915_private *dev_priv); 81u32 intel_dp_pack_aux(const u8 *src, int src_bytes); 82 83void intel_edp_drrs_enable(struct intel_dp *intel_dp, 84 const struct intel_crtc_state *crtc_state); 85void intel_edp_drrs_disable(struct intel_dp *intel_dp, 86 const struct intel_crtc_state *crtc_state); 87void intel_edp_drrs_update(struct intel_dp *intel_dp, 88 const struct intel_crtc_state *crtc_state); 89void intel_edp_drrs_invalidate(struct drm_i915_private *dev_priv, 90 unsigned int frontbuffer_bits); 91void intel_edp_drrs_flush(struct drm_i915_private *dev_priv, 92 unsigned int frontbuffer_bits); 93 94void 95intel_dp_program_link_training_pattern(struct intel_dp *intel_dp, 96 u8 dp_train_pat); 97void 98intel_dp_set_signal_levels(struct intel_dp *intel_dp); 99void intel_dp_set_idle_link_train(struct intel_dp *intel_dp); 100void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, 101 u8 *link_bw, u8 *rate_select); 102bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp); 103bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp); 104bool 105intel_dp_get_link_status(struct intel_dp *intel_dp, u8 *link_status); 106 107bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp); 108int intel_dp_link_required(int pixel_clock, int bpp); 109int intel_dp_max_data_rate(int max_link_clock, int max_lanes); 110bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state, 111 const struct drm_connector_state *conn_state); 112void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp, 113 const struct intel_crtc_state *crtc_state, 114 const struct drm_connector_state *conn_state, 115 struct drm_dp_vsc_sdp *vsc); 116void intel_write_dp_vsc_sdp(struct intel_encoder *encoder, 117 const struct intel_crtc_state *crtc_state, 118 struct drm_dp_vsc_sdp *vsc); 119void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable, 120 const struct intel_crtc_state *crtc_state, 121 const struct drm_connector_state *conn_state); 122void intel_read_dp_sdp(struct intel_encoder *encoder, 123 struct intel_crtc_state *crtc_state, 124 unsigned int type); 125bool intel_digital_port_connected(struct intel_encoder *encoder); 126void intel_dp_process_phy_request(struct intel_dp *intel_dp); 127 128static inline unsigned int intel_dp_unused_lane_mask(int lane_count) 129{ 130 return ~((1 << lane_count) - 1) & 0xf; 131} 132 133u32 intel_dp_mode_to_fec_clock(u32 mode_clock); 134 135void intel_ddi_update_pipe(struct intel_atomic_state *state, 136 struct intel_encoder *encoder, 137 const struct intel_crtc_state *crtc_state, 138 const struct drm_connector_state *conn_state); 139 140int intel_dp_init_hdcp(struct intel_digital_port *dig_port, 141 struct intel_connector *intel_connector); 142 143#endif /* __INTEL_DP_H__ */ 144