18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (c) 2009-2011, Intel Corporation. 48c2ecf20Sopenharmony_ci */ 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci#ifndef __INTEL_DRV_H__ 78c2ecf20Sopenharmony_ci#define __INTEL_DRV_H__ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#include <linux/i2c.h> 108c2ecf20Sopenharmony_ci#include <linux/i2c-algo-bit.h> 118c2ecf20Sopenharmony_ci#include <drm/drm_crtc.h> 128c2ecf20Sopenharmony_ci#include <drm/drm_crtc_helper.h> 138c2ecf20Sopenharmony_ci#include <drm/drm_encoder.h> 148c2ecf20Sopenharmony_ci#include <drm/drm_probe_helper.h> 158c2ecf20Sopenharmony_ci#include <drm/drm_vblank.h> 168c2ecf20Sopenharmony_ci#include "gma_display.h" 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci/* 198c2ecf20Sopenharmony_ci * Display related stuff 208c2ecf20Sopenharmony_ci */ 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci/* maximum connectors per crtcs in the mode set */ 238c2ecf20Sopenharmony_ci#define INTELFB_CONN_LIMIT 4 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci/* Intel Pipe Clone Bit */ 268c2ecf20Sopenharmony_ci#define INTEL_HDMIB_CLONE_BIT 1 278c2ecf20Sopenharmony_ci#define INTEL_HDMIC_CLONE_BIT 2 288c2ecf20Sopenharmony_ci#define INTEL_HDMID_CLONE_BIT 3 298c2ecf20Sopenharmony_ci#define INTEL_HDMIE_CLONE_BIT 4 308c2ecf20Sopenharmony_ci#define INTEL_HDMIF_CLONE_BIT 5 318c2ecf20Sopenharmony_ci#define INTEL_SDVO_NON_TV_CLONE_BIT 6 328c2ecf20Sopenharmony_ci#define INTEL_SDVO_TV_CLONE_BIT 7 338c2ecf20Sopenharmony_ci#define INTEL_SDVO_LVDS_CLONE_BIT 8 348c2ecf20Sopenharmony_ci#define INTEL_ANALOG_CLONE_BIT 9 358c2ecf20Sopenharmony_ci#define INTEL_TV_CLONE_BIT 10 368c2ecf20Sopenharmony_ci#define INTEL_DP_B_CLONE_BIT 11 378c2ecf20Sopenharmony_ci#define INTEL_DP_C_CLONE_BIT 12 388c2ecf20Sopenharmony_ci#define INTEL_DP_D_CLONE_BIT 13 398c2ecf20Sopenharmony_ci#define INTEL_LVDS_CLONE_BIT 14 408c2ecf20Sopenharmony_ci#define INTEL_DVO_TMDS_CLONE_BIT 15 418c2ecf20Sopenharmony_ci#define INTEL_DVO_LVDS_CLONE_BIT 16 428c2ecf20Sopenharmony_ci#define INTEL_EDP_CLONE_BIT 17 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ci/* these are outputs from the chip - integrated only 458c2ecf20Sopenharmony_ci * external chips are via DVO or SDVO output */ 468c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_UNUSED 0 478c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_ANALOG 1 488c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_DVO 2 498c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_SDVO 3 508c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_LVDS 4 518c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_TVOUT 5 528c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_HDMI 6 538c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_MIPI 7 548c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_MIPI2 8 558c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_DISPLAYPORT 9 568c2ecf20Sopenharmony_ci#define INTEL_OUTPUT_EDP 10 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci/* 598c2ecf20Sopenharmony_ci * Hold information useally put on the device driver privates here, 608c2ecf20Sopenharmony_ci * since it needs to be shared across multiple of devices drivers privates. 618c2ecf20Sopenharmony_ci */ 628c2ecf20Sopenharmony_cistruct psb_intel_mode_device { 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci /* 658c2ecf20Sopenharmony_ci * Abstracted memory manager operations 668c2ecf20Sopenharmony_ci */ 678c2ecf20Sopenharmony_ci size_t(*bo_offset) (struct drm_device *dev, void *bo); 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci /* 708c2ecf20Sopenharmony_ci * LVDS info 718c2ecf20Sopenharmony_ci */ 728c2ecf20Sopenharmony_ci int backlight_duty_cycle; /* restore backlight to this value */ 738c2ecf20Sopenharmony_ci bool panel_wants_dither; 748c2ecf20Sopenharmony_ci struct drm_display_mode *panel_fixed_mode; 758c2ecf20Sopenharmony_ci struct drm_display_mode *panel_fixed_mode2; 768c2ecf20Sopenharmony_ci struct drm_display_mode *vbt_mode; /* if any */ 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_ci uint32_t saveBLC_PWM_CTL; 798c2ecf20Sopenharmony_ci}; 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_cistruct psb_intel_i2c_chan { 828c2ecf20Sopenharmony_ci /* for getting at dev. private (mmio etc.) */ 838c2ecf20Sopenharmony_ci struct drm_device *drm_dev; 848c2ecf20Sopenharmony_ci u32 reg; /* GPIO reg */ 858c2ecf20Sopenharmony_ci struct i2c_adapter adapter; 868c2ecf20Sopenharmony_ci struct i2c_algo_bit_data algo; 878c2ecf20Sopenharmony_ci u8 slave_addr; 888c2ecf20Sopenharmony_ci}; 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_cistruct gma_encoder { 918c2ecf20Sopenharmony_ci struct drm_encoder base; 928c2ecf20Sopenharmony_ci int type; 938c2ecf20Sopenharmony_ci bool needs_tv_clock; 948c2ecf20Sopenharmony_ci void (*hot_plug)(struct gma_encoder *); 958c2ecf20Sopenharmony_ci int crtc_mask; 968c2ecf20Sopenharmony_ci int clone_mask; 978c2ecf20Sopenharmony_ci u32 ddi_select; /* Channel info */ 988c2ecf20Sopenharmony_ci#define DDI0_SELECT 0x01 998c2ecf20Sopenharmony_ci#define DDI1_SELECT 0x02 1008c2ecf20Sopenharmony_ci#define DP_MASK 0x8000 1018c2ecf20Sopenharmony_ci#define DDI_MASK 0x03 1028c2ecf20Sopenharmony_ci void *dev_priv; /* For sdvo_priv, lvds_priv, etc... */ 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci /* FIXME: Either make SDVO and LVDS store it's i2c here or give CDV it's 1058c2ecf20Sopenharmony_ci own set of output privates */ 1068c2ecf20Sopenharmony_ci struct psb_intel_i2c_chan *i2c_bus; 1078c2ecf20Sopenharmony_ci struct psb_intel_i2c_chan *ddc_bus; 1088c2ecf20Sopenharmony_ci}; 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_cistruct gma_connector { 1118c2ecf20Sopenharmony_ci struct drm_connector base; 1128c2ecf20Sopenharmony_ci struct gma_encoder *encoder; 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci void (*save)(struct drm_connector *connector); 1158c2ecf20Sopenharmony_ci void (*restore)(struct drm_connector *connector); 1168c2ecf20Sopenharmony_ci}; 1178c2ecf20Sopenharmony_ci 1188c2ecf20Sopenharmony_cistruct psb_intel_crtc_state { 1198c2ecf20Sopenharmony_ci uint32_t saveDSPCNTR; 1208c2ecf20Sopenharmony_ci uint32_t savePIPECONF; 1218c2ecf20Sopenharmony_ci uint32_t savePIPESRC; 1228c2ecf20Sopenharmony_ci uint32_t saveDPLL; 1238c2ecf20Sopenharmony_ci uint32_t saveFP0; 1248c2ecf20Sopenharmony_ci uint32_t saveFP1; 1258c2ecf20Sopenharmony_ci uint32_t saveHTOTAL; 1268c2ecf20Sopenharmony_ci uint32_t saveHBLANK; 1278c2ecf20Sopenharmony_ci uint32_t saveHSYNC; 1288c2ecf20Sopenharmony_ci uint32_t saveVTOTAL; 1298c2ecf20Sopenharmony_ci uint32_t saveVBLANK; 1308c2ecf20Sopenharmony_ci uint32_t saveVSYNC; 1318c2ecf20Sopenharmony_ci uint32_t saveDSPSTRIDE; 1328c2ecf20Sopenharmony_ci uint32_t saveDSPSIZE; 1338c2ecf20Sopenharmony_ci uint32_t saveDSPPOS; 1348c2ecf20Sopenharmony_ci uint32_t saveDSPBASE; 1358c2ecf20Sopenharmony_ci uint32_t savePalette[256]; 1368c2ecf20Sopenharmony_ci}; 1378c2ecf20Sopenharmony_ci 1388c2ecf20Sopenharmony_cistruct gma_crtc { 1398c2ecf20Sopenharmony_ci struct drm_crtc base; 1408c2ecf20Sopenharmony_ci int pipe; 1418c2ecf20Sopenharmony_ci int plane; 1428c2ecf20Sopenharmony_ci uint32_t cursor_addr; 1438c2ecf20Sopenharmony_ci struct gtt_range *cursor_gt; 1448c2ecf20Sopenharmony_ci u8 lut_adj[256]; 1458c2ecf20Sopenharmony_ci struct psb_intel_framebuffer *fbdev_fb; 1468c2ecf20Sopenharmony_ci /* a mode_set for fbdev users on this crtc */ 1478c2ecf20Sopenharmony_ci struct drm_mode_set mode_set; 1488c2ecf20Sopenharmony_ci 1498c2ecf20Sopenharmony_ci /* GEM object that holds our cursor */ 1508c2ecf20Sopenharmony_ci struct drm_gem_object *cursor_obj; 1518c2ecf20Sopenharmony_ci 1528c2ecf20Sopenharmony_ci struct drm_display_mode saved_mode; 1538c2ecf20Sopenharmony_ci struct drm_display_mode saved_adjusted_mode; 1548c2ecf20Sopenharmony_ci 1558c2ecf20Sopenharmony_ci struct psb_intel_mode_device *mode_dev; 1568c2ecf20Sopenharmony_ci 1578c2ecf20Sopenharmony_ci /*crtc mode setting flags*/ 1588c2ecf20Sopenharmony_ci u32 mode_flags; 1598c2ecf20Sopenharmony_ci 1608c2ecf20Sopenharmony_ci bool active; 1618c2ecf20Sopenharmony_ci 1628c2ecf20Sopenharmony_ci /* Saved Crtc HW states */ 1638c2ecf20Sopenharmony_ci struct psb_intel_crtc_state *crtc_state; 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_ci const struct gma_clock_funcs *clock_funcs; 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci struct drm_pending_vblank_event *page_flip_event; 1688c2ecf20Sopenharmony_ci}; 1698c2ecf20Sopenharmony_ci 1708c2ecf20Sopenharmony_ci#define to_gma_crtc(x) \ 1718c2ecf20Sopenharmony_ci container_of(x, struct gma_crtc, base) 1728c2ecf20Sopenharmony_ci#define to_gma_connector(x) \ 1738c2ecf20Sopenharmony_ci container_of(x, struct gma_connector, base) 1748c2ecf20Sopenharmony_ci#define to_gma_encoder(x) \ 1758c2ecf20Sopenharmony_ci container_of(x, struct gma_encoder, base) 1768c2ecf20Sopenharmony_ci#define to_psb_intel_framebuffer(x) \ 1778c2ecf20Sopenharmony_ci container_of(x, struct psb_intel_framebuffer, base) 1788c2ecf20Sopenharmony_ci 1798c2ecf20Sopenharmony_cistruct psb_intel_i2c_chan *psb_intel_i2c_create(struct drm_device *dev, 1808c2ecf20Sopenharmony_ci const u32 reg, const char *name); 1818c2ecf20Sopenharmony_civoid psb_intel_i2c_destroy(struct psb_intel_i2c_chan *chan); 1828c2ecf20Sopenharmony_ciint psb_intel_ddc_get_modes(struct drm_connector *connector, 1838c2ecf20Sopenharmony_ci struct i2c_adapter *adapter); 1848c2ecf20Sopenharmony_ciextern bool psb_intel_ddc_probe(struct i2c_adapter *adapter); 1858c2ecf20Sopenharmony_ci 1868c2ecf20Sopenharmony_ciextern void psb_intel_crtc_init(struct drm_device *dev, int pipe, 1878c2ecf20Sopenharmony_ci struct psb_intel_mode_device *mode_dev); 1888c2ecf20Sopenharmony_ciextern void psb_intel_crt_init(struct drm_device *dev); 1898c2ecf20Sopenharmony_ciextern bool psb_intel_sdvo_init(struct drm_device *dev, int output_device); 1908c2ecf20Sopenharmony_ciextern void psb_intel_dvo_init(struct drm_device *dev); 1918c2ecf20Sopenharmony_ciextern void psb_intel_tv_init(struct drm_device *dev); 1928c2ecf20Sopenharmony_ciextern void psb_intel_lvds_init(struct drm_device *dev, 1938c2ecf20Sopenharmony_ci struct psb_intel_mode_device *mode_dev); 1948c2ecf20Sopenharmony_ciextern void psb_intel_lvds_set_brightness(struct drm_device *dev, int level); 1958c2ecf20Sopenharmony_ciextern void oaktrail_lvds_init(struct drm_device *dev, 1968c2ecf20Sopenharmony_ci struct psb_intel_mode_device *mode_dev); 1978c2ecf20Sopenharmony_ciextern void oaktrail_wait_for_INTR_PKT_SENT(struct drm_device *dev); 1988c2ecf20Sopenharmony_ciextern void oaktrail_dsi_init(struct drm_device *dev, 1998c2ecf20Sopenharmony_ci struct psb_intel_mode_device *mode_dev); 2008c2ecf20Sopenharmony_ciextern void oaktrail_lvds_i2c_init(struct drm_encoder *encoder); 2018c2ecf20Sopenharmony_ciextern void mid_dsi_init(struct drm_device *dev, 2028c2ecf20Sopenharmony_ci struct psb_intel_mode_device *mode_dev, int dsi_num); 2038c2ecf20Sopenharmony_ci 2048c2ecf20Sopenharmony_ciextern struct drm_encoder *gma_best_encoder(struct drm_connector *connector); 2058c2ecf20Sopenharmony_ciextern void gma_connector_attach_encoder(struct gma_connector *connector, 2068c2ecf20Sopenharmony_ci struct gma_encoder *encoder); 2078c2ecf20Sopenharmony_ci 2088c2ecf20Sopenharmony_cistatic inline struct gma_encoder *gma_attached_encoder( 2098c2ecf20Sopenharmony_ci struct drm_connector *connector) 2108c2ecf20Sopenharmony_ci{ 2118c2ecf20Sopenharmony_ci return to_gma_connector(connector)->encoder; 2128c2ecf20Sopenharmony_ci} 2138c2ecf20Sopenharmony_ci 2148c2ecf20Sopenharmony_ciextern struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev, 2158c2ecf20Sopenharmony_ci struct drm_crtc *crtc); 2168c2ecf20Sopenharmony_ciextern struct drm_crtc *psb_intel_get_crtc_from_pipe(struct drm_device *dev, 2178c2ecf20Sopenharmony_ci int pipe); 2188c2ecf20Sopenharmony_ciextern struct drm_connector *psb_intel_sdvo_find(struct drm_device *dev, 2198c2ecf20Sopenharmony_ci int sdvoB); 2208c2ecf20Sopenharmony_ciextern int psb_intel_sdvo_supports_hotplug(struct drm_connector *connector); 2218c2ecf20Sopenharmony_ciextern void psb_intel_sdvo_set_hotplug(struct drm_connector *connector, 2228c2ecf20Sopenharmony_ci int enable); 2238c2ecf20Sopenharmony_ciextern int intelfb_probe(struct drm_device *dev); 2248c2ecf20Sopenharmony_ciextern int intelfb_remove(struct drm_device *dev, 2258c2ecf20Sopenharmony_ci struct drm_framebuffer *fb); 2268c2ecf20Sopenharmony_ciextern bool psb_intel_lvds_mode_fixup(struct drm_encoder *encoder, 2278c2ecf20Sopenharmony_ci const struct drm_display_mode *mode, 2288c2ecf20Sopenharmony_ci struct drm_display_mode *adjusted_mode); 2298c2ecf20Sopenharmony_ciextern enum drm_mode_status psb_intel_lvds_mode_valid(struct drm_connector *connector, 2308c2ecf20Sopenharmony_ci struct drm_display_mode *mode); 2318c2ecf20Sopenharmony_ciextern int psb_intel_lvds_set_property(struct drm_connector *connector, 2328c2ecf20Sopenharmony_ci struct drm_property *property, 2338c2ecf20Sopenharmony_ci uint64_t value); 2348c2ecf20Sopenharmony_ciextern void psb_intel_lvds_destroy(struct drm_connector *connector); 2358c2ecf20Sopenharmony_ci 2368c2ecf20Sopenharmony_ci/* intel_gmbus.c */ 2378c2ecf20Sopenharmony_ciextern void gma_intel_i2c_reset(struct drm_device *dev); 2388c2ecf20Sopenharmony_ciextern int gma_intel_setup_gmbus(struct drm_device *dev); 2398c2ecf20Sopenharmony_ciextern void gma_intel_gmbus_set_speed(struct i2c_adapter *adapter, int speed); 2408c2ecf20Sopenharmony_ciextern void gma_intel_gmbus_force_bit(struct i2c_adapter *adapter, bool force_bit); 2418c2ecf20Sopenharmony_ciextern void gma_intel_teardown_gmbus(struct drm_device *dev); 2428c2ecf20Sopenharmony_ci 2438c2ecf20Sopenharmony_ci/* DP support */ 2448c2ecf20Sopenharmony_ciextern void cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev, int output_reg); 2458c2ecf20Sopenharmony_ciextern void cdv_intel_dp_set_m_n(struct drm_crtc *crtc, 2468c2ecf20Sopenharmony_ci struct drm_display_mode *mode, 2478c2ecf20Sopenharmony_ci struct drm_display_mode *adjusted_mode); 2488c2ecf20Sopenharmony_ci 2498c2ecf20Sopenharmony_ciextern void psb_intel_attach_force_audio_property(struct drm_connector *connector); 2508c2ecf20Sopenharmony_ciextern void psb_intel_attach_broadcast_rgb_property(struct drm_connector *connector); 2518c2ecf20Sopenharmony_ci 2528c2ecf20Sopenharmony_ciextern int cdv_sb_read(struct drm_device *dev, u32 reg, u32 *val); 2538c2ecf20Sopenharmony_ciextern int cdv_sb_write(struct drm_device *dev, u32 reg, u32 val); 2548c2ecf20Sopenharmony_ciextern void cdv_sb_reset(struct drm_device *dev); 2558c2ecf20Sopenharmony_ci 2568c2ecf20Sopenharmony_ciextern void cdv_intel_attach_force_audio_property(struct drm_connector *connector); 2578c2ecf20Sopenharmony_ciextern void cdv_intel_attach_broadcast_rgb_property(struct drm_connector *connector); 2588c2ecf20Sopenharmony_ci 2598c2ecf20Sopenharmony_ci#endif /* __INTEL_DRV_H__ */ 260