18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * Copyright © 2006-2007 Intel Corporation 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * Permission is hereby granted, free of charge, to any person obtaining a 58c2ecf20Sopenharmony_ci * copy of this software and associated documentation files (the "Software"), 68c2ecf20Sopenharmony_ci * to deal in the Software without restriction, including without limitation 78c2ecf20Sopenharmony_ci * the rights to use, copy, modify, merge, publish, distribute, sublicense, 88c2ecf20Sopenharmony_ci * and/or sell copies of the Software, and to permit persons to whom the 98c2ecf20Sopenharmony_ci * Software is furnished to do so, subject to the following conditions: 108c2ecf20Sopenharmony_ci * 118c2ecf20Sopenharmony_ci * The above copyright notice and this permission notice (including the next 128c2ecf20Sopenharmony_ci * paragraph) shall be included in all copies or substantial portions of the 138c2ecf20Sopenharmony_ci * Software. 148c2ecf20Sopenharmony_ci * 158c2ecf20Sopenharmony_ci * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 168c2ecf20Sopenharmony_ci * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 178c2ecf20Sopenharmony_ci * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 188c2ecf20Sopenharmony_ci * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 198c2ecf20Sopenharmony_ci * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 208c2ecf20Sopenharmony_ci * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 218c2ecf20Sopenharmony_ci * DEALINGS IN THE SOFTWARE. 228c2ecf20Sopenharmony_ci * 238c2ecf20Sopenharmony_ci * Authors: 248c2ecf20Sopenharmony_ci * Eric Anholt <eric@anholt.net> 258c2ecf20Sopenharmony_ci */ 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci#include <linux/delay.h> 288c2ecf20Sopenharmony_ci#include <linux/i2c.h> 298c2ecf20Sopenharmony_ci#include <linux/pm_runtime.h> 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci#include <drm/drm_simple_kms_helper.h> 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#include "cdv_device.h" 348c2ecf20Sopenharmony_ci#include "intel_bios.h" 358c2ecf20Sopenharmony_ci#include "power.h" 368c2ecf20Sopenharmony_ci#include "psb_drv.h" 378c2ecf20Sopenharmony_ci#include "psb_intel_drv.h" 388c2ecf20Sopenharmony_ci#include "psb_intel_reg.h" 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_cistatic void cdv_intel_crt_dpms(struct drm_encoder *encoder, int mode) 428c2ecf20Sopenharmony_ci{ 438c2ecf20Sopenharmony_ci struct drm_device *dev = encoder->dev; 448c2ecf20Sopenharmony_ci u32 temp, reg; 458c2ecf20Sopenharmony_ci reg = ADPA; 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci temp = REG_READ(reg); 488c2ecf20Sopenharmony_ci temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE); 498c2ecf20Sopenharmony_ci temp &= ~ADPA_DAC_ENABLE; 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci switch (mode) { 528c2ecf20Sopenharmony_ci case DRM_MODE_DPMS_ON: 538c2ecf20Sopenharmony_ci temp |= ADPA_DAC_ENABLE; 548c2ecf20Sopenharmony_ci break; 558c2ecf20Sopenharmony_ci case DRM_MODE_DPMS_STANDBY: 568c2ecf20Sopenharmony_ci temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE; 578c2ecf20Sopenharmony_ci break; 588c2ecf20Sopenharmony_ci case DRM_MODE_DPMS_SUSPEND: 598c2ecf20Sopenharmony_ci temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE; 608c2ecf20Sopenharmony_ci break; 618c2ecf20Sopenharmony_ci case DRM_MODE_DPMS_OFF: 628c2ecf20Sopenharmony_ci temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE; 638c2ecf20Sopenharmony_ci break; 648c2ecf20Sopenharmony_ci } 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci REG_WRITE(reg, temp); 678c2ecf20Sopenharmony_ci} 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_cistatic enum drm_mode_status cdv_intel_crt_mode_valid(struct drm_connector *connector, 708c2ecf20Sopenharmony_ci struct drm_display_mode *mode) 718c2ecf20Sopenharmony_ci{ 728c2ecf20Sopenharmony_ci if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 738c2ecf20Sopenharmony_ci return MODE_NO_DBLESCAN; 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ci /* The lowest clock for CDV is 20000KHz */ 768c2ecf20Sopenharmony_ci if (mode->clock < 20000) 778c2ecf20Sopenharmony_ci return MODE_CLOCK_LOW; 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci /* The max clock for CDV is 355 instead of 400 */ 808c2ecf20Sopenharmony_ci if (mode->clock > 355000) 818c2ecf20Sopenharmony_ci return MODE_CLOCK_HIGH; 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ci return MODE_OK; 848c2ecf20Sopenharmony_ci} 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_cistatic void cdv_intel_crt_mode_set(struct drm_encoder *encoder, 878c2ecf20Sopenharmony_ci struct drm_display_mode *mode, 888c2ecf20Sopenharmony_ci struct drm_display_mode *adjusted_mode) 898c2ecf20Sopenharmony_ci{ 908c2ecf20Sopenharmony_ci 918c2ecf20Sopenharmony_ci struct drm_device *dev = encoder->dev; 928c2ecf20Sopenharmony_ci struct drm_crtc *crtc = encoder->crtc; 938c2ecf20Sopenharmony_ci struct gma_crtc *gma_crtc = to_gma_crtc(crtc); 948c2ecf20Sopenharmony_ci int dpll_md_reg; 958c2ecf20Sopenharmony_ci u32 adpa, dpll_md; 968c2ecf20Sopenharmony_ci u32 adpa_reg; 978c2ecf20Sopenharmony_ci 988c2ecf20Sopenharmony_ci if (gma_crtc->pipe == 0) 998c2ecf20Sopenharmony_ci dpll_md_reg = DPLL_A_MD; 1008c2ecf20Sopenharmony_ci else 1018c2ecf20Sopenharmony_ci dpll_md_reg = DPLL_B_MD; 1028c2ecf20Sopenharmony_ci 1038c2ecf20Sopenharmony_ci adpa_reg = ADPA; 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ci /* 1068c2ecf20Sopenharmony_ci * Disable separate mode multiplier used when cloning SDVO to CRT 1078c2ecf20Sopenharmony_ci * XXX this needs to be adjusted when we really are cloning 1088c2ecf20Sopenharmony_ci */ 1098c2ecf20Sopenharmony_ci { 1108c2ecf20Sopenharmony_ci dpll_md = REG_READ(dpll_md_reg); 1118c2ecf20Sopenharmony_ci REG_WRITE(dpll_md_reg, 1128c2ecf20Sopenharmony_ci dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); 1138c2ecf20Sopenharmony_ci } 1148c2ecf20Sopenharmony_ci 1158c2ecf20Sopenharmony_ci adpa = 0; 1168c2ecf20Sopenharmony_ci if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) 1178c2ecf20Sopenharmony_ci adpa |= ADPA_HSYNC_ACTIVE_HIGH; 1188c2ecf20Sopenharmony_ci if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) 1198c2ecf20Sopenharmony_ci adpa |= ADPA_VSYNC_ACTIVE_HIGH; 1208c2ecf20Sopenharmony_ci 1218c2ecf20Sopenharmony_ci if (gma_crtc->pipe == 0) 1228c2ecf20Sopenharmony_ci adpa |= ADPA_PIPE_A_SELECT; 1238c2ecf20Sopenharmony_ci else 1248c2ecf20Sopenharmony_ci adpa |= ADPA_PIPE_B_SELECT; 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ci REG_WRITE(adpa_reg, adpa); 1278c2ecf20Sopenharmony_ci} 1288c2ecf20Sopenharmony_ci 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ci/** 1318c2ecf20Sopenharmony_ci * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence. 1328c2ecf20Sopenharmony_ci * 1338c2ecf20Sopenharmony_ci * \return true if CRT is connected. 1348c2ecf20Sopenharmony_ci * \return false if CRT is disconnected. 1358c2ecf20Sopenharmony_ci */ 1368c2ecf20Sopenharmony_cistatic bool cdv_intel_crt_detect_hotplug(struct drm_connector *connector, 1378c2ecf20Sopenharmony_ci bool force) 1388c2ecf20Sopenharmony_ci{ 1398c2ecf20Sopenharmony_ci struct drm_device *dev = connector->dev; 1408c2ecf20Sopenharmony_ci u32 hotplug_en; 1418c2ecf20Sopenharmony_ci int i, tries = 0, ret = false; 1428c2ecf20Sopenharmony_ci u32 orig; 1438c2ecf20Sopenharmony_ci 1448c2ecf20Sopenharmony_ci /* 1458c2ecf20Sopenharmony_ci * On a CDV thep, CRT detect sequence need to be done twice 1468c2ecf20Sopenharmony_ci * to get a reliable result. 1478c2ecf20Sopenharmony_ci */ 1488c2ecf20Sopenharmony_ci tries = 2; 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_ci orig = hotplug_en = REG_READ(PORT_HOTPLUG_EN); 1518c2ecf20Sopenharmony_ci hotplug_en &= ~(CRT_HOTPLUG_DETECT_MASK); 1528c2ecf20Sopenharmony_ci hotplug_en |= CRT_HOTPLUG_FORCE_DETECT; 1538c2ecf20Sopenharmony_ci 1548c2ecf20Sopenharmony_ci hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64; 1558c2ecf20Sopenharmony_ci hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50; 1568c2ecf20Sopenharmony_ci 1578c2ecf20Sopenharmony_ci for (i = 0; i < tries ; i++) { 1588c2ecf20Sopenharmony_ci unsigned long timeout; 1598c2ecf20Sopenharmony_ci /* turn on the FORCE_DETECT */ 1608c2ecf20Sopenharmony_ci REG_WRITE(PORT_HOTPLUG_EN, hotplug_en); 1618c2ecf20Sopenharmony_ci timeout = jiffies + msecs_to_jiffies(1000); 1628c2ecf20Sopenharmony_ci /* wait for FORCE_DETECT to go off */ 1638c2ecf20Sopenharmony_ci do { 1648c2ecf20Sopenharmony_ci if (!(REG_READ(PORT_HOTPLUG_EN) & 1658c2ecf20Sopenharmony_ci CRT_HOTPLUG_FORCE_DETECT)) 1668c2ecf20Sopenharmony_ci break; 1678c2ecf20Sopenharmony_ci msleep(1); 1688c2ecf20Sopenharmony_ci } while (time_after(timeout, jiffies)); 1698c2ecf20Sopenharmony_ci } 1708c2ecf20Sopenharmony_ci 1718c2ecf20Sopenharmony_ci if ((REG_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) != 1728c2ecf20Sopenharmony_ci CRT_HOTPLUG_MONITOR_NONE) 1738c2ecf20Sopenharmony_ci ret = true; 1748c2ecf20Sopenharmony_ci 1758c2ecf20Sopenharmony_ci /* clear the interrupt we just generated, if any */ 1768c2ecf20Sopenharmony_ci REG_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS); 1778c2ecf20Sopenharmony_ci 1788c2ecf20Sopenharmony_ci /* and put the bits back */ 1798c2ecf20Sopenharmony_ci REG_WRITE(PORT_HOTPLUG_EN, orig); 1808c2ecf20Sopenharmony_ci return ret; 1818c2ecf20Sopenharmony_ci} 1828c2ecf20Sopenharmony_ci 1838c2ecf20Sopenharmony_cistatic enum drm_connector_status cdv_intel_crt_detect( 1848c2ecf20Sopenharmony_ci struct drm_connector *connector, bool force) 1858c2ecf20Sopenharmony_ci{ 1868c2ecf20Sopenharmony_ci if (cdv_intel_crt_detect_hotplug(connector, force)) 1878c2ecf20Sopenharmony_ci return connector_status_connected; 1888c2ecf20Sopenharmony_ci else 1898c2ecf20Sopenharmony_ci return connector_status_disconnected; 1908c2ecf20Sopenharmony_ci} 1918c2ecf20Sopenharmony_ci 1928c2ecf20Sopenharmony_cistatic void cdv_intel_crt_destroy(struct drm_connector *connector) 1938c2ecf20Sopenharmony_ci{ 1948c2ecf20Sopenharmony_ci struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 1958c2ecf20Sopenharmony_ci 1968c2ecf20Sopenharmony_ci psb_intel_i2c_destroy(gma_encoder->ddc_bus); 1978c2ecf20Sopenharmony_ci drm_connector_unregister(connector); 1988c2ecf20Sopenharmony_ci drm_connector_cleanup(connector); 1998c2ecf20Sopenharmony_ci kfree(connector); 2008c2ecf20Sopenharmony_ci} 2018c2ecf20Sopenharmony_ci 2028c2ecf20Sopenharmony_cistatic int cdv_intel_crt_get_modes(struct drm_connector *connector) 2038c2ecf20Sopenharmony_ci{ 2048c2ecf20Sopenharmony_ci struct gma_encoder *gma_encoder = gma_attached_encoder(connector); 2058c2ecf20Sopenharmony_ci return psb_intel_ddc_get_modes(connector, 2068c2ecf20Sopenharmony_ci &gma_encoder->ddc_bus->adapter); 2078c2ecf20Sopenharmony_ci} 2088c2ecf20Sopenharmony_ci 2098c2ecf20Sopenharmony_cistatic int cdv_intel_crt_set_property(struct drm_connector *connector, 2108c2ecf20Sopenharmony_ci struct drm_property *property, 2118c2ecf20Sopenharmony_ci uint64_t value) 2128c2ecf20Sopenharmony_ci{ 2138c2ecf20Sopenharmony_ci return 0; 2148c2ecf20Sopenharmony_ci} 2158c2ecf20Sopenharmony_ci 2168c2ecf20Sopenharmony_ci/* 2178c2ecf20Sopenharmony_ci * Routines for controlling stuff on the analog port 2188c2ecf20Sopenharmony_ci */ 2198c2ecf20Sopenharmony_ci 2208c2ecf20Sopenharmony_cistatic const struct drm_encoder_helper_funcs cdv_intel_crt_helper_funcs = { 2218c2ecf20Sopenharmony_ci .dpms = cdv_intel_crt_dpms, 2228c2ecf20Sopenharmony_ci .prepare = gma_encoder_prepare, 2238c2ecf20Sopenharmony_ci .commit = gma_encoder_commit, 2248c2ecf20Sopenharmony_ci .mode_set = cdv_intel_crt_mode_set, 2258c2ecf20Sopenharmony_ci}; 2268c2ecf20Sopenharmony_ci 2278c2ecf20Sopenharmony_cistatic const struct drm_connector_funcs cdv_intel_crt_connector_funcs = { 2288c2ecf20Sopenharmony_ci .dpms = drm_helper_connector_dpms, 2298c2ecf20Sopenharmony_ci .detect = cdv_intel_crt_detect, 2308c2ecf20Sopenharmony_ci .fill_modes = drm_helper_probe_single_connector_modes, 2318c2ecf20Sopenharmony_ci .destroy = cdv_intel_crt_destroy, 2328c2ecf20Sopenharmony_ci .set_property = cdv_intel_crt_set_property, 2338c2ecf20Sopenharmony_ci}; 2348c2ecf20Sopenharmony_ci 2358c2ecf20Sopenharmony_cistatic const struct drm_connector_helper_funcs 2368c2ecf20Sopenharmony_ci cdv_intel_crt_connector_helper_funcs = { 2378c2ecf20Sopenharmony_ci .mode_valid = cdv_intel_crt_mode_valid, 2388c2ecf20Sopenharmony_ci .get_modes = cdv_intel_crt_get_modes, 2398c2ecf20Sopenharmony_ci .best_encoder = gma_best_encoder, 2408c2ecf20Sopenharmony_ci}; 2418c2ecf20Sopenharmony_ci 2428c2ecf20Sopenharmony_civoid cdv_intel_crt_init(struct drm_device *dev, 2438c2ecf20Sopenharmony_ci struct psb_intel_mode_device *mode_dev) 2448c2ecf20Sopenharmony_ci{ 2458c2ecf20Sopenharmony_ci 2468c2ecf20Sopenharmony_ci struct gma_connector *gma_connector; 2478c2ecf20Sopenharmony_ci struct gma_encoder *gma_encoder; 2488c2ecf20Sopenharmony_ci struct drm_connector *connector; 2498c2ecf20Sopenharmony_ci struct drm_encoder *encoder; 2508c2ecf20Sopenharmony_ci 2518c2ecf20Sopenharmony_ci u32 i2c_reg; 2528c2ecf20Sopenharmony_ci 2538c2ecf20Sopenharmony_ci gma_encoder = kzalloc(sizeof(struct gma_encoder), GFP_KERNEL); 2548c2ecf20Sopenharmony_ci if (!gma_encoder) 2558c2ecf20Sopenharmony_ci return; 2568c2ecf20Sopenharmony_ci 2578c2ecf20Sopenharmony_ci gma_connector = kzalloc(sizeof(struct gma_connector), GFP_KERNEL); 2588c2ecf20Sopenharmony_ci if (!gma_connector) 2598c2ecf20Sopenharmony_ci goto failed_connector; 2608c2ecf20Sopenharmony_ci 2618c2ecf20Sopenharmony_ci connector = &gma_connector->base; 2628c2ecf20Sopenharmony_ci connector->polled = DRM_CONNECTOR_POLL_HPD; 2638c2ecf20Sopenharmony_ci drm_connector_init(dev, connector, 2648c2ecf20Sopenharmony_ci &cdv_intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); 2658c2ecf20Sopenharmony_ci 2668c2ecf20Sopenharmony_ci encoder = &gma_encoder->base; 2678c2ecf20Sopenharmony_ci drm_simple_encoder_init(dev, encoder, DRM_MODE_ENCODER_DAC); 2688c2ecf20Sopenharmony_ci 2698c2ecf20Sopenharmony_ci gma_connector_attach_encoder(gma_connector, gma_encoder); 2708c2ecf20Sopenharmony_ci 2718c2ecf20Sopenharmony_ci /* Set up the DDC bus. */ 2728c2ecf20Sopenharmony_ci i2c_reg = GPIOA; 2738c2ecf20Sopenharmony_ci /* Remove the following code for CDV */ 2748c2ecf20Sopenharmony_ci /* 2758c2ecf20Sopenharmony_ci if (dev_priv->crt_ddc_bus != 0) 2768c2ecf20Sopenharmony_ci i2c_reg = dev_priv->crt_ddc_bus; 2778c2ecf20Sopenharmony_ci }*/ 2788c2ecf20Sopenharmony_ci gma_encoder->ddc_bus = psb_intel_i2c_create(dev, 2798c2ecf20Sopenharmony_ci i2c_reg, "CRTDDC_A"); 2808c2ecf20Sopenharmony_ci if (!gma_encoder->ddc_bus) { 2818c2ecf20Sopenharmony_ci dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " 2828c2ecf20Sopenharmony_ci "failed.\n"); 2838c2ecf20Sopenharmony_ci goto failed_ddc; 2848c2ecf20Sopenharmony_ci } 2858c2ecf20Sopenharmony_ci 2868c2ecf20Sopenharmony_ci gma_encoder->type = INTEL_OUTPUT_ANALOG; 2878c2ecf20Sopenharmony_ci /* 2888c2ecf20Sopenharmony_ci psb_intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT); 2898c2ecf20Sopenharmony_ci psb_intel_output->crtc_mask = (1 << 0) | (1 << 1); 2908c2ecf20Sopenharmony_ci */ 2918c2ecf20Sopenharmony_ci connector->interlace_allowed = 0; 2928c2ecf20Sopenharmony_ci connector->doublescan_allowed = 0; 2938c2ecf20Sopenharmony_ci 2948c2ecf20Sopenharmony_ci drm_encoder_helper_add(encoder, &cdv_intel_crt_helper_funcs); 2958c2ecf20Sopenharmony_ci drm_connector_helper_add(connector, 2968c2ecf20Sopenharmony_ci &cdv_intel_crt_connector_helper_funcs); 2978c2ecf20Sopenharmony_ci 2988c2ecf20Sopenharmony_ci drm_connector_register(connector); 2998c2ecf20Sopenharmony_ci 3008c2ecf20Sopenharmony_ci return; 3018c2ecf20Sopenharmony_cifailed_ddc: 3028c2ecf20Sopenharmony_ci drm_encoder_cleanup(&gma_encoder->base); 3038c2ecf20Sopenharmony_ci drm_connector_cleanup(&gma_connector->base); 3048c2ecf20Sopenharmony_ci kfree(gma_connector); 3058c2ecf20Sopenharmony_cifailed_connector: 3068c2ecf20Sopenharmony_ci kfree(gma_encoder); 3078c2ecf20Sopenharmony_ci return; 3088c2ecf20Sopenharmony_ci} 309