18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: MIT 28c2ecf20Sopenharmony_cimenu "Display Engine Configuration" 38c2ecf20Sopenharmony_ci depends on DRM && DRM_AMDGPU 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ciconfig DRM_AMD_DC 68c2ecf20Sopenharmony_ci bool "AMD DC - Enable new display engine" 78c2ecf20Sopenharmony_ci default y 88c2ecf20Sopenharmony_ci depends on BROKEN || !CC_IS_CLANG || X86_64 || SPARC64 || ARM64 98c2ecf20Sopenharmony_ci select SND_HDA_COMPONENT if SND_HDA_CORE 108c2ecf20Sopenharmony_ci select DRM_AMD_DC_DCN if (X86 || PPC64) && !(KCOV_INSTRUMENT_ALL && KCOV_ENABLE_COMPARISONS) 118c2ecf20Sopenharmony_ci help 128c2ecf20Sopenharmony_ci Choose this option if you want to use the new display engine 138c2ecf20Sopenharmony_ci support for AMDGPU. This adds required support for Vega and 148c2ecf20Sopenharmony_ci Raven ASICs. 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 || ARM64) 178c2ecf20Sopenharmony_ci architectures built with Clang (all released versions), whereby the stack 188c2ecf20Sopenharmony_ci frame gets blown up to well over 5k. This would cause an immediate kernel 198c2ecf20Sopenharmony_ci panic on most architectures. We'll revert this when the following bug report 208c2ecf20Sopenharmony_ci has been resolved: https://github.com/llvm/llvm-project/issues/41896. 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciconfig DRM_AMD_DC_DCN 238c2ecf20Sopenharmony_ci def_bool n 248c2ecf20Sopenharmony_ci help 258c2ecf20Sopenharmony_ci Raven, Navi and Renoir family support for display engine 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ciconfig DRM_AMD_DC_DCN3_0 288c2ecf20Sopenharmony_ci bool "DCN 3.0 family" 298c2ecf20Sopenharmony_ci depends on DRM_AMD_DC && (X86 || LOONGARCH) 308c2ecf20Sopenharmony_ci depends on DRM_AMD_DC_DCN 318c2ecf20Sopenharmony_ci help 328c2ecf20Sopenharmony_ci Choose this option if you want to have 338c2ecf20Sopenharmony_ci sienna_cichlid support for display engine 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ciconfig DRM_AMD_DC_HDCP 368c2ecf20Sopenharmony_ci bool "Enable HDCP support in DC" 378c2ecf20Sopenharmony_ci depends on DRM_AMD_DC 388c2ecf20Sopenharmony_ci help 398c2ecf20Sopenharmony_ci Choose this option if you want to support HDCP authentication. 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ciconfig DRM_AMD_DC_SI 428c2ecf20Sopenharmony_ci bool "AMD DC support for Southern Islands ASICs" 438c2ecf20Sopenharmony_ci depends on DRM_AMDGPU_SI 448c2ecf20Sopenharmony_ci depends on DRM_AMD_DC 458c2ecf20Sopenharmony_ci default n 468c2ecf20Sopenharmony_ci help 478c2ecf20Sopenharmony_ci Choose this option to enable new AMD DC support for SI asics 488c2ecf20Sopenharmony_ci by default. This includes Tahiti, Pitcairn, Cape Verde, Oland. 498c2ecf20Sopenharmony_ci Hainan is not supported by AMD DC and it has no physical DCE6. 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ciconfig DEBUG_KERNEL_DC 528c2ecf20Sopenharmony_ci bool "Enable kgdb break in DC" 538c2ecf20Sopenharmony_ci depends on DRM_AMD_DC 548c2ecf20Sopenharmony_ci depends on KGDB 558c2ecf20Sopenharmony_ci help 568c2ecf20Sopenharmony_ci Choose this option if you want to hit kdgb_break in assert. 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ciendmenu 59