18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * GPIO driver for EXAR XRA1403 16-bit GPIO expander
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (c) 2017, General Electric Company
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#include <linux/bitops.h>
98c2ecf20Sopenharmony_ci#include <linux/gpio/driver.h>
108c2ecf20Sopenharmony_ci#include <linux/kernel.h>
118c2ecf20Sopenharmony_ci#include <linux/module.h>
128c2ecf20Sopenharmony_ci#include <linux/mutex.h>
138c2ecf20Sopenharmony_ci#include <linux/of_device.h>
148c2ecf20Sopenharmony_ci#include <linux/of_gpio.h>
158c2ecf20Sopenharmony_ci#include <linux/seq_file.h>
168c2ecf20Sopenharmony_ci#include <linux/spi/spi.h>
178c2ecf20Sopenharmony_ci#include <linux/regmap.h>
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci/* XRA1403 registers */
208c2ecf20Sopenharmony_ci#define XRA_GSR   0x00 /* GPIO State */
218c2ecf20Sopenharmony_ci#define XRA_OCR   0x02 /* Output Control */
228c2ecf20Sopenharmony_ci#define XRA_PIR   0x04 /* Input Polarity Inversion */
238c2ecf20Sopenharmony_ci#define XRA_GCR   0x06 /* GPIO Configuration */
248c2ecf20Sopenharmony_ci#define XRA_PUR   0x08 /* Input Internal Pull-up Resistor Enable/Disable */
258c2ecf20Sopenharmony_ci#define XRA_IER   0x0A /* Input Interrupt Enable */
268c2ecf20Sopenharmony_ci#define XRA_TSCR  0x0C /* Output Three-State Control */
278c2ecf20Sopenharmony_ci#define XRA_ISR   0x0E /* Input Interrupt Status */
288c2ecf20Sopenharmony_ci#define XRA_REIR  0x10 /* Input Rising Edge Interrupt Enable */
298c2ecf20Sopenharmony_ci#define XRA_FEIR  0x12 /* Input Falling Edge Interrupt Enable */
308c2ecf20Sopenharmony_ci#define XRA_IFR   0x14 /* Input Filter Enable/Disable */
318c2ecf20Sopenharmony_ci#define XRA_LAST  0x15 /* Bounds */
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_cistruct xra1403 {
348c2ecf20Sopenharmony_ci	struct gpio_chip  chip;
358c2ecf20Sopenharmony_ci	struct regmap     *regmap;
368c2ecf20Sopenharmony_ci};
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_cistatic const struct regmap_config xra1403_regmap_cfg = {
398c2ecf20Sopenharmony_ci		.reg_bits = 7,
408c2ecf20Sopenharmony_ci		.pad_bits = 1,
418c2ecf20Sopenharmony_ci		.val_bits = 8,
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci		.max_register = XRA_LAST,
448c2ecf20Sopenharmony_ci};
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_cistatic unsigned int to_reg(unsigned int reg, unsigned int offset)
478c2ecf20Sopenharmony_ci{
488c2ecf20Sopenharmony_ci	return reg + (offset > 7);
498c2ecf20Sopenharmony_ci}
508c2ecf20Sopenharmony_ci
518c2ecf20Sopenharmony_cistatic int xra1403_direction_input(struct gpio_chip *chip, unsigned int offset)
528c2ecf20Sopenharmony_ci{
538c2ecf20Sopenharmony_ci	struct xra1403 *xra = gpiochip_get_data(chip);
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci	return regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
568c2ecf20Sopenharmony_ci			BIT(offset % 8), BIT(offset % 8));
578c2ecf20Sopenharmony_ci}
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_cistatic int xra1403_direction_output(struct gpio_chip *chip, unsigned int offset,
608c2ecf20Sopenharmony_ci				    int value)
618c2ecf20Sopenharmony_ci{
628c2ecf20Sopenharmony_ci	int ret;
638c2ecf20Sopenharmony_ci	struct xra1403 *xra = gpiochip_get_data(chip);
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci	ret = regmap_update_bits(xra->regmap, to_reg(XRA_GCR, offset),
668c2ecf20Sopenharmony_ci			BIT(offset % 8), 0);
678c2ecf20Sopenharmony_ci	if (ret)
688c2ecf20Sopenharmony_ci		return ret;
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci	ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
718c2ecf20Sopenharmony_ci			BIT(offset % 8), value ? BIT(offset % 8) : 0);
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci	return ret;
748c2ecf20Sopenharmony_ci}
758c2ecf20Sopenharmony_ci
768c2ecf20Sopenharmony_cistatic int xra1403_get_direction(struct gpio_chip *chip, unsigned int offset)
778c2ecf20Sopenharmony_ci{
788c2ecf20Sopenharmony_ci	int ret;
798c2ecf20Sopenharmony_ci	unsigned int val;
808c2ecf20Sopenharmony_ci	struct xra1403 *xra = gpiochip_get_data(chip);
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ci	ret = regmap_read(xra->regmap, to_reg(XRA_GCR, offset), &val);
838c2ecf20Sopenharmony_ci	if (ret)
848c2ecf20Sopenharmony_ci		return ret;
858c2ecf20Sopenharmony_ci
868c2ecf20Sopenharmony_ci	if (val & BIT(offset % 8))
878c2ecf20Sopenharmony_ci		return GPIO_LINE_DIRECTION_IN;
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_ci	return GPIO_LINE_DIRECTION_OUT;
908c2ecf20Sopenharmony_ci}
918c2ecf20Sopenharmony_ci
928c2ecf20Sopenharmony_cistatic int xra1403_get(struct gpio_chip *chip, unsigned int offset)
938c2ecf20Sopenharmony_ci{
948c2ecf20Sopenharmony_ci	int ret;
958c2ecf20Sopenharmony_ci	unsigned int val;
968c2ecf20Sopenharmony_ci	struct xra1403 *xra = gpiochip_get_data(chip);
978c2ecf20Sopenharmony_ci
988c2ecf20Sopenharmony_ci	ret = regmap_read(xra->regmap, to_reg(XRA_GSR, offset), &val);
998c2ecf20Sopenharmony_ci	if (ret)
1008c2ecf20Sopenharmony_ci		return ret;
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci	return !!(val & BIT(offset % 8));
1038c2ecf20Sopenharmony_ci}
1048c2ecf20Sopenharmony_ci
1058c2ecf20Sopenharmony_cistatic void xra1403_set(struct gpio_chip *chip, unsigned int offset, int value)
1068c2ecf20Sopenharmony_ci{
1078c2ecf20Sopenharmony_ci	int ret;
1088c2ecf20Sopenharmony_ci	struct xra1403 *xra = gpiochip_get_data(chip);
1098c2ecf20Sopenharmony_ci
1108c2ecf20Sopenharmony_ci	ret = regmap_update_bits(xra->regmap, to_reg(XRA_OCR, offset),
1118c2ecf20Sopenharmony_ci			BIT(offset % 8), value ? BIT(offset % 8) : 0);
1128c2ecf20Sopenharmony_ci	if (ret)
1138c2ecf20Sopenharmony_ci		dev_err(chip->parent, "Failed to set pin: %d, ret: %d\n",
1148c2ecf20Sopenharmony_ci				offset, ret);
1158c2ecf20Sopenharmony_ci}
1168c2ecf20Sopenharmony_ci
1178c2ecf20Sopenharmony_ci#ifdef CONFIG_DEBUG_FS
1188c2ecf20Sopenharmony_cistatic void xra1403_dbg_show(struct seq_file *s, struct gpio_chip *chip)
1198c2ecf20Sopenharmony_ci{
1208c2ecf20Sopenharmony_ci	int reg;
1218c2ecf20Sopenharmony_ci	struct xra1403 *xra = gpiochip_get_data(chip);
1228c2ecf20Sopenharmony_ci	int value[XRA_LAST];
1238c2ecf20Sopenharmony_ci	int i;
1248c2ecf20Sopenharmony_ci	const char *label;
1258c2ecf20Sopenharmony_ci	unsigned int gcr;
1268c2ecf20Sopenharmony_ci	unsigned int gsr;
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci	seq_puts(s, "xra reg:");
1298c2ecf20Sopenharmony_ci	for (reg = 0; reg <= XRA_LAST; reg++)
1308c2ecf20Sopenharmony_ci		seq_printf(s, " %2.2x", reg);
1318c2ecf20Sopenharmony_ci	seq_puts(s, "\n  value:");
1328c2ecf20Sopenharmony_ci	for (reg = 0; reg < XRA_LAST; reg++) {
1338c2ecf20Sopenharmony_ci		regmap_read(xra->regmap, reg, &value[reg]);
1348c2ecf20Sopenharmony_ci		seq_printf(s, " %2.2x", value[reg]);
1358c2ecf20Sopenharmony_ci	}
1368c2ecf20Sopenharmony_ci	seq_puts(s, "\n");
1378c2ecf20Sopenharmony_ci
1388c2ecf20Sopenharmony_ci	gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR];
1398c2ecf20Sopenharmony_ci	gsr = value[XRA_GSR + 1] << 8 | value[XRA_GSR];
1408c2ecf20Sopenharmony_ci	for_each_requested_gpio(chip, i, label) {
1418c2ecf20Sopenharmony_ci		seq_printf(s, " gpio-%-3d (%-12s) %s %s\n",
1428c2ecf20Sopenharmony_ci			   chip->base + i, label,
1438c2ecf20Sopenharmony_ci			   (gcr & BIT(i)) ? "in" : "out",
1448c2ecf20Sopenharmony_ci			   (gsr & BIT(i)) ? "hi" : "lo");
1458c2ecf20Sopenharmony_ci	}
1468c2ecf20Sopenharmony_ci}
1478c2ecf20Sopenharmony_ci#else
1488c2ecf20Sopenharmony_ci#define xra1403_dbg_show NULL
1498c2ecf20Sopenharmony_ci#endif
1508c2ecf20Sopenharmony_ci
1518c2ecf20Sopenharmony_cistatic int xra1403_probe(struct spi_device *spi)
1528c2ecf20Sopenharmony_ci{
1538c2ecf20Sopenharmony_ci	struct xra1403 *xra;
1548c2ecf20Sopenharmony_ci	struct gpio_desc *reset_gpio;
1558c2ecf20Sopenharmony_ci	int ret;
1568c2ecf20Sopenharmony_ci
1578c2ecf20Sopenharmony_ci	xra = devm_kzalloc(&spi->dev, sizeof(*xra), GFP_KERNEL);
1588c2ecf20Sopenharmony_ci	if (!xra)
1598c2ecf20Sopenharmony_ci		return -ENOMEM;
1608c2ecf20Sopenharmony_ci
1618c2ecf20Sopenharmony_ci	/* bring the chip out of reset if reset pin is provided*/
1628c2ecf20Sopenharmony_ci	reset_gpio = devm_gpiod_get_optional(&spi->dev, "reset", GPIOD_OUT_LOW);
1638c2ecf20Sopenharmony_ci	if (IS_ERR(reset_gpio))
1648c2ecf20Sopenharmony_ci		dev_warn(&spi->dev, "Could not get reset-gpios\n");
1658c2ecf20Sopenharmony_ci
1668c2ecf20Sopenharmony_ci	xra->chip.direction_input = xra1403_direction_input;
1678c2ecf20Sopenharmony_ci	xra->chip.direction_output = xra1403_direction_output;
1688c2ecf20Sopenharmony_ci	xra->chip.get_direction = xra1403_get_direction;
1698c2ecf20Sopenharmony_ci	xra->chip.get = xra1403_get;
1708c2ecf20Sopenharmony_ci	xra->chip.set = xra1403_set;
1718c2ecf20Sopenharmony_ci
1728c2ecf20Sopenharmony_ci	xra->chip.dbg_show = xra1403_dbg_show;
1738c2ecf20Sopenharmony_ci
1748c2ecf20Sopenharmony_ci	xra->chip.ngpio = 16;
1758c2ecf20Sopenharmony_ci	xra->chip.label = "xra1403";
1768c2ecf20Sopenharmony_ci
1778c2ecf20Sopenharmony_ci	xra->chip.base = -1;
1788c2ecf20Sopenharmony_ci	xra->chip.can_sleep = true;
1798c2ecf20Sopenharmony_ci	xra->chip.parent = &spi->dev;
1808c2ecf20Sopenharmony_ci	xra->chip.owner = THIS_MODULE;
1818c2ecf20Sopenharmony_ci
1828c2ecf20Sopenharmony_ci	xra->regmap = devm_regmap_init_spi(spi, &xra1403_regmap_cfg);
1838c2ecf20Sopenharmony_ci	if (IS_ERR(xra->regmap)) {
1848c2ecf20Sopenharmony_ci		ret = PTR_ERR(xra->regmap);
1858c2ecf20Sopenharmony_ci		dev_err(&spi->dev, "Failed to allocate regmap: %d\n", ret);
1868c2ecf20Sopenharmony_ci		return ret;
1878c2ecf20Sopenharmony_ci	}
1888c2ecf20Sopenharmony_ci
1898c2ecf20Sopenharmony_ci	ret = devm_gpiochip_add_data(&spi->dev, &xra->chip, xra);
1908c2ecf20Sopenharmony_ci	if (ret < 0) {
1918c2ecf20Sopenharmony_ci		dev_err(&spi->dev, "Unable to register gpiochip\n");
1928c2ecf20Sopenharmony_ci		return ret;
1938c2ecf20Sopenharmony_ci	}
1948c2ecf20Sopenharmony_ci
1958c2ecf20Sopenharmony_ci	spi_set_drvdata(spi, xra);
1968c2ecf20Sopenharmony_ci
1978c2ecf20Sopenharmony_ci	return 0;
1988c2ecf20Sopenharmony_ci}
1998c2ecf20Sopenharmony_ci
2008c2ecf20Sopenharmony_cistatic const struct spi_device_id xra1403_ids[] = {
2018c2ecf20Sopenharmony_ci	{ "xra1403" },
2028c2ecf20Sopenharmony_ci	{},
2038c2ecf20Sopenharmony_ci};
2048c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(spi, xra1403_ids);
2058c2ecf20Sopenharmony_ci
2068c2ecf20Sopenharmony_cistatic const struct of_device_id xra1403_spi_of_match[] = {
2078c2ecf20Sopenharmony_ci	{ .compatible = "exar,xra1403" },
2088c2ecf20Sopenharmony_ci	{},
2098c2ecf20Sopenharmony_ci};
2108c2ecf20Sopenharmony_ciMODULE_DEVICE_TABLE(of, xra1403_spi_of_match);
2118c2ecf20Sopenharmony_ci
2128c2ecf20Sopenharmony_cistatic struct spi_driver xra1403_driver = {
2138c2ecf20Sopenharmony_ci	.probe    = xra1403_probe,
2148c2ecf20Sopenharmony_ci	.id_table = xra1403_ids,
2158c2ecf20Sopenharmony_ci	.driver   = {
2168c2ecf20Sopenharmony_ci		.name           = "xra1403",
2178c2ecf20Sopenharmony_ci		.of_match_table = of_match_ptr(xra1403_spi_of_match),
2188c2ecf20Sopenharmony_ci	},
2198c2ecf20Sopenharmony_ci};
2208c2ecf20Sopenharmony_ci
2218c2ecf20Sopenharmony_cimodule_spi_driver(xra1403_driver);
2228c2ecf20Sopenharmony_ci
2238c2ecf20Sopenharmony_ciMODULE_AUTHOR("Nandor Han <nandor.han@ge.com>");
2248c2ecf20Sopenharmony_ciMODULE_AUTHOR("Semi Malinen <semi.malinen@ge.com>");
2258c2ecf20Sopenharmony_ciMODULE_DESCRIPTION("GPIO expander driver for EXAR XRA1403");
2268c2ecf20Sopenharmony_ciMODULE_LICENSE("GPL v2");
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